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ORCIDMartin Schoeberl
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- affiliation: Technical University of Denmark
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2020 – today
- 2024
[j34]Emad Jacob Maroun
, Martin Schoeberl, Peter P. Puschner:
Predictable and optimized single-path code for predicated processors. J. Syst. Archit. 154: 103214 (2024)- [c161]Martin Schoeberl, Hans Jakob Damsgaard, Luca Pezzarossa, Oliver Keszöcze, Erling Rennemo Jellum:
Hardware Generators with Chisel. DSD 2024: 168-175 - [c160]Alessandro Cerioli, Riccardo Miccini, Clément Laroche, Tobias Piechowiak, Luca Pezzarossa, Jens Sparsø, Martin Schoeberl:
NeuralCasting: A Front-End Compilation Infrastructure for Neural Networks. IOTSMS 2024: 161-168 - [c159]Ehsan Khodadad, Luca Pezzarossa, Martin Schoeberl:
Towards Lingua Franca on the Patmos Processor. ISORC 2024: 1-5 - [c158]Emad Jacob Maroun, Martin Schoeberl, Peter P. Puschner:
Two-Step Register Allocation for Implementing Single-Path Code. ISORC 2024: 1-12 - [c157]Martin Schoeberl:
Exploration of Network Interface Architectures for a Real-Time Network-on-Chip. ISORC 2024: 1-8 - [c156]Emad Jacob Maroun, Eva Dengler, Christian Dietrich, Stefan Hepp, Henriette Herzog, Benedikt Huber, Jens Knoop, Daniel Wiltsche-Prokesch, Peter P. Puschner, Phillip Raffeck, Martin Schoeberl, Simon Schuster, Peter Wägemann:
The Platin Multi-Target Worst-Case Analysis Tool. WCET 2024: 2:1-2:14 - [c155]Martin Schoeberl, Ehsan Khodadad, Shaokai Lin, Emad Jacob Maroun, Luca Pezzarossa, Edward A. Lee:
Invited Paper: Worst-Case Execution Time Analysis of Lingua Franca Applications. WCET 2024: 4:1-4:13 - 2023
- [j33]Martin Schoeberl, Luca Pezzarossa:
Chip Design and Verification in a Computer Engineering Education. Computer 56(11): 20-29 (2023) - [j32]Andrew Dobis, Kevin Laeufer, Hans Jakob Damsgaard, Tjark Petersen, Kasper Juul Hesse Rasmussen, Enrico Tolotto, Simon Thye Andersen, Richard Lin, Martin Schoeberl:
Verification of Chisel Hardware Designs with ChiselVerify. Microprocess. Microsystems 96: 104737 (2023) - [c154]Erling Rennemo Jellum, Shaokai Lin, Peter Donovan, Chadlia Jerad, Edward Wang, Marten Lohstroh, Edward A. Lee, Martin Schoeberl:
InterPRET: a Time-predictable Multicore Processor. CPS-IoT Week Workshops 2023: 331-336 - [c153]Erling Rennemo Jellum, Yaman Umuruglu, Milica Orlandic, Martin Schoeberl:
FPGA-tidbits: Rapid Prototyping of FPGA Accelerators in Chisel. DSD 2023: 153-160 - [c152]Kasper Hesse, Martin Schoeberl, Niels Aage, Erik Träff:
On the Feasibility of using FPGA's for Efficient Topology Optimization. DSD 2023: 242-250 - [c151]Emad Jacob Maroun, Martin Schoeberl, Peter P. Puschner:
Compiler-Directed Constant Execution Time on Flat Memory Systems. ISORC 2023: 64-75 - [c150]Riccardo Miccini, Alaa Zniber, Clément Laroche, Tobias Piechowiak, Martin Schoeberl, Luca Pezzarossa, Ouassim Karrakchou, Jens Sparsø, Mounir Ghogho:
Dynamic nsNET2: Efficient Deep Noise Suppression with Early Exiting. MLSP 2023: 1-6 - [c149]Luca Pezzarossa, Martin Schoeberl:
Transitioning to Chisel in University Education: Experiences and Lessons Learned. NorCAS 2023: 1-7 - [c148]Emad Jacob Maroun, Martin Schoeberl, Peter P. Puschner:
Constant-Loop Dominators for Single-Path Code Optimization. WCET 2023: 7:1-7:13 - [i4]Riccardo Miccini, Alaa Zniber, Clément Laroche, Tobias Piechowiak, Martin Schoeberl, Luca Pezzarossa, Ouassim Karrakchou, Jens Sparsø, Mounir Ghogho:
Dynamic nsNet2: Efficient Deep Noise Suppression with Early Exiting. CoRR abs/2308.16678 (2023) - 2022
- [j31]Jens Sparsø, Hans Jakob Damsgaard, Dimitrios Katsamanis, Martin Schoeberl:
Comparing timed-division multiplexing and best-effort networks-on-chip. J. Syst. Archit. 133: 102766 (2022) - [c147]Martin Schoeberl:
Open-Source Research on Time-predictable Computer Architecture. DSD 2022: 292-297 - [c146]Martin Schoeberl:
Keynote Speakers. DSD 2022: xxxvii-xl - [c145]Andrew Dobis, Hans Jakob Damsgaard, Enrico Tolotto, Kasper Hesse, Tjark Petersen, Martin Schoeberl:
Enabling Coverage-Based Verification in Chisel. ETS 2022: 1-6 - [c144]Syed Anas Alam, Jakob Furbo Enevoldsen, Andreas Alkjaer Eriksen, Niels William Hartmann, Ulrik Helk, Jphirgen Kragh Jakobsen, Christa Skytte Jensen, Nicolai Dyre Bülow Jespersen, Karl Herman Krause, Mads Rumle Nordstrphim, Tjark Petersen, Luca Pezzarossa, Simon Winther Rasmussen, Martin Schoeberl, Jonas Ingerslev Sphirensen:
Open-Source Chip Design in Academic Education. NorCAS 2022: 1-6 - [c143]Patrick Denzler, Thomas Frühwirth, Daniel Scheuchenstuhl, Martin Schoeberl, Wolfgang Kastner:
Timing Analysis of TSN-Enabled OPC UA PubSub. WFCS 2022: 1-8 - [i3]Maja H. Kirkeby, Martin Schoeberl:
Towards Comparing Performance of Algorithms in Hardware and Software. CoRR abs/2204.03394 (2022) - [i2]Maja H. Kirkeby, Thomas Krabben, Mathias Marquar Arhipenko Larsen, Maria Bendix Mikkelsen, Tjark Petersen, Mads Rosendahl, Martin Schoeberl, Martin Sundman:
Energy Consumption and Performance of Heapsort in Hardware and Software. CoRR abs/2204.03401 (2022) - 2021
- [j30]Emad Jacob Maroun, Martin Schoeberl, Peter P. Puschner:
Compiling for time-predictability with dual-issue single-path code. J. Syst. Archit. 118: 102230 (2021) - [c142]Eleftherios Kyriakakis, Jens Sparsø, Martin Schoeberl:
Evaluating a Time-Triggered Runtime System by Distributing a Flight Controller. ETFA 2021: 1-8 - [c141]Eleftherios Kyriakakis, Jens Sparsø, Peter P. Puschner, Martin Schoeberl:
Synchronizing Real-Time Tasks in Time-Triggered Networks. ISORC 2021: 11-19 - [c140]Patrick Denzler, Thomas Frühwirth, Andreas Kirchberger, Martin Schoeberl, Wolfgang Kastner:
Experiences from Adjusting Industrial Software for Worst-Case Execution Time Analysis. ISORC 2021: 62-70 - [c139]Eleftherios Kyriakakis, Koen Tange, Niklas Reusch, Eder Ollora Zaballa, Xenofon Fafoutis, Martin Schoeberl, Nicola Dragoni:
Fault-tolerant Clock Synchronization using Precise Time Protocol Multi-Domain Aggregation. ISORC 2021: 114-122 - [c138]Andrew Dobis, Tjark Petersen, Hans Jakob Damsgaard, Kasper Juul Hesse Rasmussen, Enrico Tolotto, Simon Thye Andersen, Richard Lin, Martin Schoeberl:
ChiselVerify: An Open-Source Hardware Verification Library for Chisel and Scala. NorCAS 2021: 1-7 - [c137]Clemens Pircher, Alexander Baranyai, Christoph Lehr, Martin Schoeberl:
Accelerator Interface for Patmos. NorCAS 2021: 1-7 - [c136]Patrick Denzler, Thomas Frühwirth, Andreas Kirchberger, Martin Schoeberl, Wolfgang Kastner:
Static Timing Analysis of OPC UA PubSub. WFCS 2021: 167-174 - [i1]Andrew Dobis, Tjark Petersen, Kasper Juul Hesse Rasmussen, Enrico Tolotto, Hans Jakob Damsgaard, Simon Thye Andersen, Richard Lin, Martin Schoeberl:
Open-Source Verification with Chisel and Scala. CoRR abs/2102.13460 (2021) - 2020
- [j29]Eleftherios Kyriakakis, Maja Lund, Luca Pezzarossa, Jens Sparsø, Martin Schoeberl:
A time-predictable open-source TTEthernet end-system. J. Syst. Archit. 108: 101744 (2020) - [c135]Mathieu Jan, Mihail Asavoae, Martin Schoeberl, Edward A. Lee:
Formal Semantics of Predictable Pipelines: a Comparative Study. ASP-DAC 2020: 103-108 - [c134]Eleftherios Kyriakakis, Jens Sparsø, Peter P. Puschner, Martin Schoeberl:
Synchronizing Real-Time Tasks in Time-Aware Networks: Work-in-Progress. EMSOFT 2020: 15-17 - [c133]Emad Jacob Maroun, Martin Schoeberl, Peter P. Puschner:
Towards Dual-Issue Single-Path Code. ISORC 2020: 176-183
2010 – 2019
- 2019
- [j28]Tórur Biskopstø Strøm, Jens Sparsø, Martin Schoeberl:
Hardlock: Real-time multicore locking. J. Syst. Archit. 97: 467-476 (2019) - [j27]Emad Jacob Maroun, Henrik Enggaard Hansen, Andreas Toftegaard Kristensen, Martin Schoeberl:
Time-predictable synchronization support with a shared scratchpad memory. Microprocess. Microsystems 64: 34-42 (2019) - [j26]Morten B. Petersen, Anthon V. Riber, Simon T. Andersen, Martin Schoeberl:
Time-predictable distributed shared on-chip memory. Microprocess. Microsystems 71 (2019) - [c132]Martin Schoeberl, Morten Borup Petersen:
Leros: The Return of the Accumulator Machine. ARCS 2019: 115-127 - [c131]Martin Schoeberl, Luca Pezzarossa, Jens Sparsø:
A Minimal Network Interface for a Simple Network-on-Chip. ARCS 2019: 295-307 - [c130]Martin Schoeberl:
Multicore Models of Communication for Cyber-Physical Systems. CyPhy/WESE 2019: 28-43 - [c129]Mihail Asavoae, Imane Haur, Mathieu Jan, Belgacem Ben Hedia, Martin Schoeberl:
Towards Formal Co-validation of Hardware and Software Timing Models of CPSs. CyPhy/WESE 2019: 203-227 - [c128]Marten Lohstroh, Martin Schoeberl, Andrés Goens, Armin Wasicek, Christopher D. Gill, Marjan Sirjani, Edward A. Lee:
Actors Revisited for Time-Critical Systems. DAC 2019: 152 - [c127]Martin Schoeberl, Tórur Biskopstø Strøm, Oktay Baris, Jens Sparsø:
Scratchpad Memories with Ownership. DATE 2019: 1216-1221 - [c126]Marten Lohstroh, Martin Schoeberl, Mathieu Jan, Edward Wang, Edward A. Lee:
Programs with ironclad timing guarantees: work-in-progress. EMSOFT Companion 2019: 1 - [c125]Eleftherios Kyriakakis, Jens Sparsø, Martin Schoeberl:
Implementing time-triggered communication over a standard ethernet switch. IoT-Fog@IoTDI 2019: 21-25 - [c124]Oktay Baris, Shibarchi Majumder, Tórur Biskopstø Strøm, Anders la Cour-Harbo, Jens Sparsø, Thomas Bak, Martin Schoeberl:
Demonstration of a Time-predictable Flight Controller on a Multicore Processor. ISORC 2019: 95-96 - [c123]Maja Lund, Luca Pezzarossa, Jens Sparsø, Martin Schoeberl:
A Time-predictable TTEthenet Node. ISORC 2019: 229-233 - [c122]Martin Schoeberl, Luca Pezzarossa, Jens Sparsø:
S4NOC: a minimalistic network-on-chip for real-time multicores. NoCArc@MICRO 2019: 8:1-8:6 - [c121]Christos Gkiokas, Martin Schoeberl:
A Fault-Tolerant Time-Predictable Processor. NORCAS 2019: 1-6 - [c120]Martin Schoeberl, Benjamin Rouxel, Isabelle Puaut:
A time-predictable branch predictor. SAC 2019: 607-616 - [e5]Martin Schoeberl, Christian Hochberger, Sascha Uhrig, Jürgen Brehm, Thilo Pionteck:
Architecture of Computing Systems - ARCS 2019 - 32nd International Conference, Copenhagen, Denmark, May 20-23, 2019, Proceedings. Lecture Notes in Computer Science 11479, Springer 2019, ISBN 978-3-030-18655-5 [contents] - 2018
- [j25]Martin Schoeberl, Luca Pezzarossa, Jens Sparsø:
A Multicore Processor for Time-Critical Applications. IEEE Des. Test 35(2): 38-47 (2018) - [j24]Rasmus Ulslev Pedersen, Martin Schoeberl:
Direct garbage collection: two-fold speedup for managed language embedded systems. Int. J. Embed. Syst. 10(5): 394-405 (2018) - [j23]Luca Pezzarossa, Andreas Toftegaard Kristensen, Martin Schoeberl, Jens Sparsø:
Using dynamic partial reconfiguration of FPGAs in real-Time systems. Microprocess. Microsystems 61: 198-206 (2018) - [j22]Martin Schoeberl, Wolfgang Puffitsch, Stefan Hepp, Benedikt Huber, Daniel Prokesch:
Patmos: a time-predictable microprocessor. Real Time Syst. 54(2): 389-423 (2018) - [c119]Martin Schoeberl:
Lipsi: Probably the Smallest Processor in the World. ARCS 2018: 18-30 - [c118]Martin Schoeberl:
One-way shared memory. DATE 2018: 269-272 - [c117]Martin Schoeberl:
Design of a time-predictable multicore processor: The T-CREST project. DATE 2018: 909-912 - [c116]Tórur Biskopstø Strøm, Martin Schoeberl:
Hardlock: A Concurrent Real-Time Multicore Locking Unit. ISORC 2018: 9-16 - [c115]Hammond A. Pearce, Partha S. Roop, Morteza Biglari-Abhari, Martin Schoeberl:
Faster Function Blocks for Precision Timed Industrial Automation. ISORC 2018: 67-74 - [c114]Martin Schoeberl, Rasmus Ulslev Pedersen:
tpIP: A Time-Predictable TCP/IP Stack for Cyber-Physical Systems. ISORC 2018: 75-82 - [c113]Morten B. Petersen, Anthon V. Riber, Simon T. Andersen, Martin Schoeberl:
Time-Predictable Distributed Shared Memory for Multi-Core Processors. NORCAS 2018: 1-7 - [c112]Eleftherios Kyriakakis, Jens Sparsø, Martin Schoeberl:
Hardware Assisted Clock Synchronization with the IEEE 1588-2008 Precision Time Protocol. RTNS 2018: 51-60 - 2017
- [j21]Tórur Biskopstø Strøm, Wolfgang Puffitsch, Martin Schoeberl:
Hardware locks for a real-time Java chip multiprocessor. Concurr. Comput. Pract. Exp. 29(6) (2017) - [j20]Martin Schoeberl, Andreas Engelbredt Dalsgaard, René Rydhof Hansen, Stephan Erbs Korsholm, Anders P. Ravn, Juan Ricardo Rios Rivas, Tórur Biskopstø Strøm, Hans Søndergaard, Andy J. Wellings, Shuai Zhao:
Safety-critical Java for embedded systems. Concurr. Comput. Pract. Exp. 29(22) (2017) - [j19]Rasmus Bo Sørensen, Luca Pezzarossa, Martin Schoeberl, Jens Sparsø:
A resource-efficient network interface supporting low latency reconfiguration of virtual circuits in time-division multiplexing networks-on-chip. J. Syst. Archit. 74: 1-13 (2017) - [c111]Bekim Cilku, Wolfgang Puffitsch, Daniel Prokesch, Martin Schoeberl, Peter P. Puschner:
Improving Performance of Single-Path Code through a Time-Predictable Memory Hierarchy. ISORC 2017: 76-83 - [c110]Luca Pezzarossa, Martin Schoeberl, Jens Sparsø:
A Controller for Dynamic Partial Reconfiguration in FPGA-Based Real-Time Systems. ISORC 2017: 92-100 - [c109]Daniel Sanz Ausin, Luca Pezzarossa, Martin Schoeberl:
Real-Time Audio Processing on the T-Crest Multicore Platform. MCSoC 2017: 120-127 - [c108]Martin Schoeberl, Jens Sparsø:
Timing Organization of a Real-Time Multicore Processor. NGCAS 2017: 89-92 - [c107]Henrik Enggaard Hansen, Emad Jacob Maroun, Andreas Toftegaard Kristensen, Jimmi Marquart, Martin Schoeberl:
A shared scratchpad memory with synchronization support. NORCAS 2017: 1-6 - [c106]Luca Pezzarossa, Andreas Toftegaard Kristensen, Martin Schoeberl, Jens Sparsø:
Can real-time systems benefit from dynamic partial reconfiguration? NORCAS 2017: 1-6 - [c105]Martin Schoeberl, Bekim Cilku, Daniel Prokesch, Peter P. Puschner:
Best Practice for Caching of Single-Path Code. WCET 2017: 2:1-2:12 - 2016
- [j18]Florian Kluge, Martin Schoeberl, Theo Ungerer:
Support for the logical execution time model on a time-predictable multicore processor. SIGBED Rev. 13(4): 61-66 (2016) - [j17]Evangelia Kasapaki, Martin Schoeberl, Rasmus Bo Sørensen, Christoph Thomas Muller, Kees Goossens, Jens Sparsø:
Argo: A Real-Time Network-on-Chip Architecture With an Efficient GALS Implementation. IEEE Trans. Very Large Scale Integr. Syst. 24(2): 479-492 (2016) - [c104]Martin Schoeberl:
Lessons learned from the EU project T-CREST. DATE 2016: 870-875 - [c103]Martin Schoeberl, Carsten Nielsen:
A Stack Cache for Real-Time Systems. ISORC 2016: 150-157 - [c102]Wolfgang Puffitsch, Martin Schoeberl:
Time-Predictable Virtual Memory. ISORC 2016: 158-165 - [c101]André Rocha, Cláudio Silva, Rasmus Bo Sørensen, Jens Sparsø, Martin Schoeberl:
Avionics Applications on a Time-Predictable Chip-Multiprocessor. PDP 2016: 777-785 - [c100]Luca Pezzarossa, Martin Schoeberl, Jens Sparsø:
Reconfiguration in FPGA-based multi-core platforms for hard real-time applications. ReCoSoC 2016: 1-8 - [c99]Rasmus Bo Sørensen, Martin Schoeberl, Jens Sparsø:
State-based Communication on Time-predictable Multicore Processors. RTNS 2016: 225-234 - [c98]Alexander Jordan, Sahar Abbaspour, Martin Schoeberl:
A Software Managed Stack Cache for Real-Time Systems. RTNS 2016: 319-326 - [c97]Heiko Falk, Sebastian Altmeyer, Peter Hellinckx, Björn Lisper, Wolfgang Puffitsch, Christine Rochange, Martin Schoeberl, Rasmus Bo Sørensen, Peter Wägemann, Simon Wegener:
TACLeBench: A Benchmark Collection to Support Worst-Case Execution Time Research. WCET 2016: 2:1-2:10 - [e4]Martin Schoeberl:
Proceedings of the 14th International Workshop on Java Technologies for Real-Time and Embedded Systems, JTRES 2016, Lugano, Switzerland, August 29 - September 2, 2016. ACM 2016, ISBN 978-1-4503-4800-3 [contents] - [e3]Martin Schoeberl:
16th International Workshop on Worst-Case Execution Time Analysis, WCET 2016, July 5, 2016, Toulouse, France. OASIcs 55, Schloss Dagstuhl - Leibniz-Zentrum für Informatik 2016, ISBN 978-3-95977-025-5 [contents] - 2015
- [j16]Martin Schoeberl, Sahar Abbaspour, Benny Akesson, Neil C. Audsley, Raffaele Capasso, Jamie Garside, Kees Goossens, Sven Goossens, Scott Hansen, Reinhold Heckmann, Stefan Hepp, Benedikt Huber, Alexander Jordan, Evangelia Kasapaki, Jens Knoop, Yonghui Li, Daniel Prokesch, Wolfgang Puffitsch, Peter P. Puschner, André Rocha, Cláudio Silva, Jens Sparsø, Alessandro Tocchi:
T-CREST: Time-predictable multi-core architecture for embedded systems. J. Syst. Archit. 61(9): 449-471 (2015) - [c96]Martin Schoeberl, Rasmus Bo Sørensen, Jens Sparsø:
Models of Communication for Multicore Processors. ISORC Workshops 2015: 9-16 - [c95]Rasmus Bo Sørensen, Wolfgang Puffitsch, Martin Schoeberl, Jens Sparsø:
Message Passing on a Time-predictable Multicore Processor. ISORC 2015: 51-59 - [c94]Carsten Nielsen, Martin Schoeberl:
Stack Caching Using Split Data Caches. ISORC Workshops 2015: 66-73 - [c93]Tórur Biskopstø Strøm, Martin Schoeberl:
Hardware Locks with Priority Ceiling Emulation for a Java Chip-Multiprocessor. ISORC 2015: 268-271 - [c92]Tórur Biskopstø Strøm, Martin Schoeberl:
Multiprocessor Priority Ceiling Emulation for Safety-Critical Java. JTRES 2015: 2:1-2:10 - [c91]Stephan Erbs Korsholm, Martin Schoeberl, Wolfgang Puffitsch:
Safety-Critical Java on a Time-Predictable Processor. JTRES 2015: 3:1-3:9 - [c90]Martin Schoeberl:
Scala for Real-Time Systems? JTRES 2015: 13:1-13:5 - [c89]Luca Pezzarossa, Rasmus Bo Sørensen, Martin Schoeberl, Jens Sparsø:
Interfacing hardware accelerators to a time-division multiplexing network-on-chip. NORCAS 2015: 1-4 - [c88]Wolfgang Puffitsch, Rasmus Bo Sørensen, Martin Schoeberl:
Time-division multiplexing vs network calculus: a comparison. RTNS 2015: 289-296 - [c87]Marco Ziccardi, Martin Schoeberl, Tullio Vardanega:
A time-composable operating system for the Patmos processor. SAC 2015: 1892-1897 - 2014
- [c86]Philipp Degasperi, Stefan Hepp, Wolfgang Puffitsch, Martin Schoeberl:
A Method Cache for Patmos. ISORC 2014: 100-108 - [c85]Juan Ricardo Rios, Martin Schoeberl:
Reusable Libraries for Safety-Critical Java. ISORC 2014: 188-197 - [c84]Juan Ricardo Rios, Martin Schoeberl:
An Evaluation of Safety-Critical Java on a Java Processor. ISORC 2014: 276-283 - [c83]Jack Whitham, Martin Schoeberl:
WCET-Based Comparison of an Instruction Scratchpad and a Method Cache. ISORC 2014: 301-308 - [c82]Martin Schoeberl, Andreas Engelbredt Dalsgaard, René Rydhof Hansen, Stephan Erbs Korsholm, Anders P. Ravn, Juan Ricardo Rios Rivas, Tórur Biskopstø Strøm, Hans Søndergaard:
Certifiable Java for Embedded Systems. JTRES 2014: 10 - [c81]Martin Schoeberl, David Vh Chong, Wolfgang Puffitsch, Jens Sparsø:
A Time-Predictable Memory Network-on-Chip. WCET 2014: 53-62 - [c80]Benedikt Huber, Stefan Hepp, Martin Schoeberl:
Scope-Based Method Cache Analysis. WCET 2014: 73-82 - 2013
- [j15]Fadi Meawad, Karthik Iyer, Martin Schoeberl, Jan Vitek:
Micro-transactions for concurrent data structures. Concurr. Comput. Pract. Exp. 25(16): 2252-2268 (2013) - [j14]Flavius Gruian, Martin Schoeberl:
Hardware support for CSP on a Java chip multiprocessor. Microprocess. Microsystems 37(4-5): 472-481 (2013) - [j13]Martin Schoeberl, Benedikt Huber, Wolfgang Puffitsch:
Data cache organization for accurate timing analysis. Real Time Syst. 49(1): 1-28 (2013) - [c79]Jens Sparsø, Evangelia Kasapaki, Martin Schoeberl:
An area-efficient network interface for a TDM-based network-on-chip. DATE 2013: 1044-1047 - [c78]Sahar Abbaspour, Florian Brandner, Martin Schoeberl:
A time-predictable stack cache. ISORC 2013: 1-8 - [c77]Edgar Lakis, Martin Schoeberl:
An SDRAM controller for real-time systems. ISORC 2013: 1-8 - [c76]Tórur Biskopstø Strøm, Wolfgang Puffitsch, Martin Schoeberl:
Chip-multiprocessor hardware locks for safety-critical Java. JTRES 2013: 38-46 - [c75]Alexander Jordan, Florian Brandner, Martin Schoeberl:
Static analysis of worst-case stack cache behavior. RTNS 2013: 55-64 - 2012
- [j12]Benedikt Huber, Wolfgang Puffitsch, Martin Schoeberl:
Worst-case execution time analysis-driven object cache design. Concurr. Comput. Pract. Exp. 24(8): 753-771 (2012) - [j11]Anders P. Ravn, Martin Schoeberl:
Safety-critical Java with cyclic executives on chip-multiprocessors. Concurr. Comput. Pract. Exp. 24(8): 772-788 (2012) - [j10]Trevor Harmon, Martin Schoeberl, Raimund Kirner, Raymond Klefstad, Kwang-Hae (Kane) Kim, Michael R. Lowry:
Fast, Interactive Worst-Case Execution Time Analysis With Back-Annotation. IEEE Trans. Ind. Informatics 8(2): 366-377 (2012) - [c74]Juan Ricardo Rios, Martin Schoeberl:
Hardware Support for Safety-Critical Java Scope Checks. ISORC 2012: 31-38 - [c73]Stefan Hepp, Martin Schoeberl:
Worst-Case Execution Time Based Optimization of Real-Time Java Programs. ISORC 2012: 64-70 - [c72]Juan Ricardo Rios, Kelvin Nilsen, Martin Schoeberl:
Patterns for safety-critical Java memory usage. JTRES 2012: 1-8 - [c71]Andreas Engelbredt Dalsgaard, René Rydhof Hansen, Martin Schoeberl:
Private memory allocation analysis for safety-critical Java. JTRES 2012: 9-17 - [c70]Martin Schoeberl, Juan Ricardo Rios:
Safety-critical Java on a Java processor. JTRES 2012: 54-61 - [c69]Tórur Biskopstø Strøm, Martin Schoeberl:
A desktop 3D printer in safety-critical Java. JTRES 2012: 72-79 - [c68]Wolfgang Puffitsch, Martin Schoeberl:
On the scalability of time-predictable chip-multiprocessing. JTRES 2012: 98-104 - [c67]Martin Schoeberl, Florian Brandner, Jens Sparsø, Evangelia Kasapaki:
A Statically Scheduled Time-Division-Multiplexed Network-on-Chip for Real-Time Systems. NOCS 2012: 152-160 - [c66]Rasmus Bo Sørensen, Martin Schoeberl, Jens Sparsø:
A light-weight statically scheduled network-on-chip. NORCHIP 2012: 1-6 - [c65]Florian Brandner, Martin Schoeberl:
Static routing in symmetric real-time network-on-chips. RTNS 2012: 61-70 - [c64]Martin Schoeberl:
Is time predictability quantifiable? ICSAMOS 2012: 333-338 - [e2]Martin Schoeberl, Andy J. Wellings:
The 10th International Workshop on Java Technologies for Real-time and Embedded Systems, JTRES '12, Copenhagen, Denmark, October 24-26, 2012. ACM 2012, ISBN 978-1-4503-1688-0 [contents] - 2011
- [j9]Martin Schoeberl, M. Teresa Higuera-Toledano:
Introduction to the Special Issue: JTRES 2009. Concurr. Comput. Pract. Exp. 23(14): 1607-1608 (2011) - [j8]Martin Schoeberl, Stephan Korsholm, Tomas Kalibera, Anders P. Ravn:
A Hardware Abstraction Layer in Java. ACM Trans. Embed. Comput. Syst. 10(4): 42:1-42:40 (2011) - [c63]Martin Schoeberl, Pascal Schleuniger, Wolfgang Puffitsch, Florian Brandner, Christian W. Probst:
Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach. PPES 2011: 11-21 - [c62]Martin Schoeberl:
Leros: A Tiny Microcontroller for FPGAs. FPL 2011: 10-14 - [c61]Christian Stoif, Martin Schoeberl, Benito Liccardi, Jan Haase:
Hardware synchronization for embedded multi-core processors. ISCAS 2011: 2557-2560 - [c60]Martin Schoeberl:
A Time-Predictable Object Cache. ISORC 2011: 99-105 - [c59]Martin Schoeberl, Walter Binder, Alex Villazón:
Design Space Exploration of Object Caches with Cross-Profiling. ISORC 2011: 213-221 - [c58]Fadi Meawad, Martin Schoeberl, Karthik Iyer, Jan Vitek:
Real-time wait-free queues using micro-transactions. JTRES 2011: 1-10 - [c57]Martin Schoeberl:
Memory management for safety-critical Java. JTRES 2011: 47-53 - [c56]Andy J. Wellings, Martin Schoeberl:
User-defined clocks in the real-time specification for Java. JTRES 2011: 74-81 - [c55]James Caska, Martin Schoeberl:
Java dust: how small can embedded Java be? JTRES 2011: 125-129 - [c54]Aibek Sarimbekov, Andreas Sewe, Walter Binder, Philippe Moret, Martin Schoeberl, Mira Mezini:
Portable and accurate collection of calling-context-sensitive bytecode metrics for the Java virtual machine. PPPJ 2011: 11-20 - [c53]Martin Schoeberl:
ejIP: a TCP/IP stack for embedded Java. PPPJ 2011: 63-69 - 2010
- [j7]Martin Schoeberl:
Scheduling of hard real-time garbage collection. Real Time Syst. 45(3): 176-213 (2010) - [j6]Martin Schoeberl, Wolfgang Puffitsch, Rasmus Ulslev Pedersen, Benedikt Huber:
Worst-case execution time analysis for a Java processor. Softw. Pract. Exp. 40(6): 507-542 (2010) - [j5]Martin Schoeberl, Wolfgang Puffitsch:
Nonblocking real-time garbage collection. ACM Trans. Embed. Comput. Syst. 10(1): 6:1-6:28 (2010) - [j4]Christof Pitter, Martin Schoeberl:
A real-time Java chip-multiprocessor. ACM Trans. Embed. Comput. Syst. 10(1): 9:1-9:34 (2010) - [c52]Martin Schoeberl, Peter Hilber:
Design and Implementation of Real-Time Transactional Memory. FPL 2010: 279-284 - [c51]Wolfgang Puffitsch, Benedikt Huber, Martin Schoeberl:
Worst-Case Analysis of Heap Allocations. ISoLA (2) 2010: 464-478 - [c50]Benedikt Huber, Wolfgang Puffitsch, Martin Schoeberl:
WCET driven design space exploration of an object cache. JTRES 2010: 26-35 - [c49]Anders P. Ravn, Martin Schoeberl:
Cyclic executive for safety-critical Java on chip-multiprocessors. JTRES 2010: 63-69 - [c48]Rasmus Ulslev Pedersen, Martin Schoeberl:
Object oriented machine learning with a multicore real-time Java processor: short paper. JTRES 2010: 76-78 - [c47]Martin Schoeberl, Thomas B. Preußer, Sascha Uhrig:
The embedded Java benchmark suite JemBench. JTRES 2010: 120-127 - [c46]Tomas Kalibera, Pavel Parízek, Michal Malohlava, Martin Schoeberl:
Exhaustive testing of safety critical Java. JTRES 2010: 164-174 - [c45]Martin Schoeberl, Florian Brandner, Jan Vitek:
RTTM: real-time transactional memory. SAC 2010: 326-333 - [c44]Martin Schoeberl, Christopher X. Brooks, Edward A. Lee:
Code Generation for Embedded Java with Ptolemy. SEUS 2010: 155-166
2000 – 2009
- 2009
- [j3]Martin Schoeberl:
Time-Predictable Computer Architecture. EURASIP J. Embed. Syst. 2009 (2009) - [j2]Walter Binder, Martin Schoeberl, Philippe Moret, Alex Villazón:
Cross-profiling for Java processors. Softw. Pract. Exp. 39(18): 1439-1465 (2009) - [c43]Rasmus Ulslev Pedersen, Martin Schoeberl:
Educational case studies with an open source embedded real-time Java processor. WESE@ESWEEK 2009: 71-77 - [c42]Stephen A. Edwards, Sungjun Kim, Edward A. Lee, Isaac Liu, Hiren D. Patel, Martin Schoeberl:
A disruptive computer design idea: Architectures with repeatable timing. ICCD 2009: 54-59 - [c41]Florian Brandner, Tommy Thorn, Martin Schoeberl:
Embedded JIT Compilation with CACAO on YARI. ISORC 2009: 63-70 - [c40]Andy J. Wellings, Martin Schoeberl:
Thread-Local Scope Caching for Real-time Java. ISORC 2009: 275-282 - [c39]Jack Whitham, Neil C. Audsley, Martin Schoeberl:
Using hardware methods to improve time-predictable performance in real-time Java systems. JTRES 2009: 130-139 - [c38]Philippe Moret, Walter Binder, Martin Schoeberl, Alex Villazón, Danilo Ansaloni:
Analyzing performance and dynamic behavior of embedded Java software with calling-context cross-profiling. PPPJ 2009: 121-124 - [c37]Philippe Moret, Walter Binder, Alex Villazón, Danilo Ansaloni, Martin Schoeberl:
Locating Performance Bottlenecks in Embedded Java Software with Calling-Context Cross-Profiling. QEST 2009: 107-108 - [c36]Martin Schoeberl, Walter Binder, Philippe Moret, Alex Villazón:
Design Space Exploration for Java Processors with Cross-Profiling. QEST 2009: 109-118 - [c35]Martin Schoeberl, Peter P. Puschner, Raimund Kirner:
A Single-Path Chip-Multiprocessor System. SEUS 2009: 47-57 - [c34]Martin Schoeberl, Wolfgang Puffitsch, Benedikt Huber:
Towards Time-Predictable Data Caches for Chip-Multiprocessors. SEUS 2009: 180-191 - [c33]Benedikt Huber, Martin Schoeberl:
Comparison of Implicit Path Enumeration and Model Checking Based WCET Analysis. WCET 2009 - [c32]Martin Schoeberl, Peter P. Puschner:
Is Chip-Multiprocessing the End of Real-Time Scheduling?. WCET 2009 - [e1]M. Teresa Higuera-Toledano, Martin Schoeberl:
Proceedings of the 7th International Workshop on Java Technologies for Real-Time and Embedded Systems, JTRES 2009, Madrid, Spain, September 23-25, 2009. ACM International Conference Proceeding Series, ACM 2009, ISBN 978-1-60558-732-5 [contents] - 2008
- [j1]Martin Schoeberl:
A Java processor architecture for embedded real-time systems. J. Syst. Archit. 54(1-2): 265-286 (2008) - [c31]Walter Binder, Alex Villazón, Martin Schoeberl, Philippe Moret:
Cache-aware cross-profiling for java processors. CASES 2008: 127-136 - [c30]Martin Schoeberl, Christian Thalinger, Stephan Korsholm, Anders P. Ravn:
Hardware Objects for Java. ISORC 2008: 445-452 - [c29]Stephan Korsholm, Martin Schoeberl, Anders P. Ravn:
Interrupt Handlers in Java. ISORC 2008: 453-457 - [c28]Trevor Harmon, Martin Schoeberl, Raimund Kirner, Raymond Klefstad:
Toward Libraries for Real-Time Java. ISORC 2008: 458-462 - [c27]Wolfgang Puffitsch, Martin Schoeberl:
Non-blocking root scanning for real-time garbage collection. JTRES 2008: 68-76 - [c26]Martin Schoeberl, Wolfgang Puffitsch:
Non-blocking object copy for real-time garbage collection. JTRES 2008: 77-84 - [c25]Walter Binder, Martin Schoeberl, Philippe Moret, Alex Villazón:
Cross-Profiling for Embedded Java Processors. QEST 2008: 287-296 - [c24]Trevor Harmon, Martin Schoeberl, Raimund Kirner, Raymond Klefstad:
A Modular Worst-case Execution Time Analysis Tool for Java Processors. IEEE Real-Time and Embedded Technology and Applications Symposium 2008: 47-57 - [c23]Christof Pitter, Martin Schoeberl:
Performance evaluation of a java chip-multiprocessor. SIES 2008: 34-42 - [c22]Peter P. Puschner, Martin Schoeberl:
On Composable System Timing, Task Timing, and WCET Analysis. WCET 2008 - 2007
- [c21]Raimund Kirner, Martin Schoeberl:
Modeling the Function Cache for Worst-Case Execution Time Analysis. DAC 2007: 471-476 - [c20]Christof Pitter, Martin Schoeberl:
Time Predictable CPU and DMA Shared Memory Access. FPL 2007: 317-322 - [c19]Martin Schoeberl:
A Time-Triggered Network-on-Chip. FPL 2007: 377-382 - [c18]Martin Schoeberl, Hans Søndergaard, Bent Thomsen, Anders P. Ravn:
A Profile for Safety Critical Java. ISORC 2007: 94-101 - [c17]Martin Schoeberl:
Architecture for object-oriented programming languages. JTRES 2007: 57-62 - [c16]Martin Schoeberl, Jan Vitek:
Garbage collection for safety critical Java. JTRES 2007: 85-93 - [c15]Christof Pitter, Martin Schoeberl:
Towards a Java multiprocessor. JTRES 2007: 144-151 - [c14]Wolfgang Puffitsch, Martin Schoeberl:
picoJava-II in an FPGA. JTRES 2007: 213-221 - [c13]Martin Schoeberl:
Mission Modes for Safety Critical Java. SEUS 2007: 105-113 - 2006
- [c12]Martin Schoeberl:
A time predictable Java processor. DATE 2006: 800-805 - [c11]Martin Schoeberl:
Real-Time Garbage Collection for Java. ISORC 2006: 424-432 - [c10]Rasmus Ulslev Pedersen, Martin Schoeberl:
Exact roots for a real-time garbage collector. JTRES 2006: 77-84 - [c9]Martin Schoeberl, Rasmus Ulslev Pedersen:
WCET analysis for a Java processor. JTRES 2006: 202-211 - [c8]Rasmus Ulslev Pedersen, Martin Schoeberl:
An Embedded Support Vector Machine. WISES 2006: 79-89 - 2005
- [c7]Martin Schoeberl:
Design and Implementation of an Efficient Stack Machine. IPDPS 2005 - [c6]Flavius Gruian, Per Andersson, Krzysztof Kuchcinski, Martin Schoeberl:
Automatic generation of application-specific systems based on a micro-programmed Java core. SAC 2005: 879-884 - 2004
- [c5]Martin Schoeberl:
Java Technology in an FPGA. FPL 2004: 917-921 - [c4]Martin Schoeberl:
Restrictions of Java for Embedded Real-Time Systems. ISORC 2004: 93-100 - [c3]Martin Schoeberl:
A Time Predictable Instruction Cache for a Java Processor. OTM Workshops 2004: 371-382 - 2003
- [c2]Martin Schoeberl:
JOP: A Java Optimized Processor. OTM Workshops 2003: 346-359 - [c1]Martin Schoeberl:
Using a Java Optimized Processor in a Real World Application. WISES 2003: 165-176
Coauthor Index
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