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ORCIDKenneth S. Stevens
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2020 – today
- 2023
[c56]Mackenzie J. Wibbels, Baudouin Chauviere, Kenneth S. Stevens:
Cyclic Timing Path Evaluation Using Commercial Static Timing Analysis Algorithms. ASYNC 2023: 60-70- [c55]Venkata Nori, Baudouin Chauviere, Mackenzie J. Wibbels, Kenneth S. Stevens:
A Novel Asynchronous Network-On-Chip Based on Source Asynchronous Signaling. ASYNC 2023: 71-77 - 2022
- [j11]Mackenzie J. Wibbels
, Kenneth S. Stevens:
Causal Path Identification for Timed and Sequential Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(3): 571-582 (2022) - 2020
- [c54]Lincoln S. Stevens, Mackenzie J. Wibbels, Valerie A. Wilkinson, Kenneth S. Stevens:
Reducing Energy Consumption and Decentralizing Computing through Heat Redistribution. ASYNC 2020: 65-66 - [c53]Tannu Sharma, Kenneth S. Stevens:
Automatic Timing Closure for Relative Timed Designs. VLSI-SOC 2020: 82-87 - [c52]Tannu Sharma, Sumanth Kolluru, Kenneth S. Stevens:
Learning Based Timing Closure on Relative Timed Design. VLSI-SoC (Selected Papers) 2020: 133-148
2010 – 2019
- 2019
- [c51]Mackenzie J. Wibbels, Shomit Das, Dheeraj Singh Takur, Venkata Nori, Kenneth S. Stevens:
A Transmission Line Enabled Deadlock Free Toroidal Network-on-Chip using Asynchronous Handshake Protocols. ASYNC 2019: 36-45 - [c50]Guillermo H. Makar, Francisco J. Badenas, Roberto G. Simone, Alejandro Furfaro, Kenneth S. Stevens, Roberto Suaya:
Low Power SPI Design Based on Relative Timing Techniques. ICECS 2019: 166-169 - 2017
- [c49]Dipanjan Bhadra, Kenneth S. Stevens:
Design of a low power, relative timing based asynchronous MSP430 microprocessor. DATE 2017: 794-799 - [c48]Tannu Sharma, Kenneth S. Stevens:
Physical Design Variation in Relative Timed Asynchronous Circuits. ISVLSI 2017: 278-283 - 2016
- [j10]William Lee, Vikas S. Vij, Kenneth S. Stevens:
Timing Path-Driven Cycle Cutting for Sequential Controllers. ACM Trans. Design Autom. Electr. Syst. 21(4): 64:1-64:25 (2016) - [c47]Jotham Vaddaboina Manoranjan, Kenneth S. Stevens:
Qualifying Relative Timing Constraints for Asynchronous Circuits. ASYNC 2016: 91-98 - [c46]Jotham Vaddaboina Manoranjan, Kenneth S. Stevens:
Reconfigurable circuit for implementation of family of 4-phase latch protocols. FPL 2016: 1-4 - [c45]Jotham Vaddaboina Manoranjan, Solomon Surya Tej Mano Sajjan, Vivek B. Gujari, Kenneth S. Stevens:
Design of a multi-style and multi-frequency FPGA. VLSI-SoC 2016: 1-6 - [c44]William Lee, Tannu Sharma, Kenneth S. Stevens:
Path Based Timing Validation for Timed Asynchronous Design. VLSID 2016: 511-516 - 2014
- [c43]Graham M. Birtwistle, Kenneth S. Stevens:
Modelling Mixed 4phase Pipelines: Structures and Patterns. ASYNC 2014: 27-36 - [c42]Jotham Vaddaboina Manoranjan, Kenneth S. Stevens:
An a-FPGA architecture for relative timing based asynchronous designs. ReConFig 2014: 1-6 - [c41]Vikas S. Vij, Raghu Prasad Gudla, Kenneth S. Stevens:
Interfacing Synchronous and Asynchronous Domains for Open Core Protocol. VLSID 2014: 282-287 - [p1]Graham M. Birtwistle, Kenneth S. Stevens:
A Design Space and its Patterns: Modelling 2phase Asynchronous Pipelines. HOWARD-60 2014: 34-65 - 2013
- [c40]Shomit Das, Vikas S. Vij, Kenneth S. Stevens:
SAS: Source Asynchronous Signaling Protocol for Asynchronous Handshake Communication Free from Wire Delay Overhead. ASYNC 2013: 107-114 - [c39]William Lee, Vikas S. Vij, Anthony R. Thatcher, Kenneth S. Stevens:
Design of low energy, high performance synchronous and asynchronous 64-point FFT. DATE 2013: 242-247 - [c38]Kenneth S. Stevens:
Relative timing driven multi-synchronous design: enabling order-of-magnitude energy reduction. ISPD 2013: 138 - [c37]Krishnaji Desai, Kenneth S. Stevens, John O'Leary:
Symbolic verification of timed asynchronous hardware protocols. ISVLSI 2013: 147-152 - [c36]Dipanjan Bhadra, Vikas S. Vij, Kenneth S. Stevens:
A low power UART design based on asynchronous techniques. MWSCAS 2013: 21-24 - [c35]Shomit Das, Georgios Manetas, Kenneth S. Stevens, Roberto Suaya:
Leveraging the geometric properties of on-chip transmission line structures to improve interconnect performance: A case study in 65nm. NOCS 2013: 1-2 - [c34]Vikas S. Vij, Kenneth S. Stevens:
Automatic addition of reset in asynchronous sequential control circuits. VLSI-SoC 2013: 374-379 - 2011
- [j9]Ken S. Stevens, Alexandre Yakovlev:
Editorial - Selected papers from the 16th IEEE International Symposium on Asynchronous Circuits and Systems. IET Comput. Digit. Tech. 5(4): 316-317 (2011) - [j8]Daniel Gebhardt, JunBok You, Kenneth S. Stevens:
Design of an Energy-Efficient Asynchronous NoC and Its Optimization Tools for Heterogeneous SoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(9): 1387-1399 (2011) - [j7]Kenneth S. Stevens, Pankaj Golani, Peter A. Beerel:
Energy and Performance Models for Synchronous and Asynchronous Communication. IEEE Trans. Very Large Scale Integr. Syst. 19(3): 369-382 (2011) - [c33]Eliyah Kilada, Kenneth S. Stevens:
Synchronous elasticization at a reduced cost: Utilizing the ultra simple fork and controller merging. ICCAD 2011: 794-801 - [c32]Daniel Gebhardt, JunBok You, Kenneth S. Stevens:
Link pipelining strategies for an application-specific asynchronous NoC. NOCS 2011: 185-192 - [e1]David Atienza, Yuan Xie, José L. Ayala, Ken S. Stevens:
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, Lausanne, Switzerland, May 2-6, 2011. ACM 2011, ISBN 978-1-4503-0667-6 [contents] - 2010
- [c31]Santosh N. Varanasi, Kenneth S. Stevens, Graham M. Birtwistle:
Concurrency Reduction of Untimed Latch Protocols - Theory and Practice. ASYNC 2010: 26-37 - [c30]Eliyah Kilada, Kenneth S. Stevens:
Control network generator for latency insensitive designs. DATE 2010: 1773-1778 - [c29]JunBok You, Daniel Gebhardt, Kenneth S. Stevens:
Bandwidth optimization in asynchronous NoCs by customizing link wire length. ICCD 2010: 455-461 - [c28]Daniel Gebhardt, JunBok You, Kenneth S. Stevens:
Comparing Energy and Latency of Asynchronous and Synchronous NoCs for Embedded SoCs. NOCS 2010: 115-122 - [c27]Eliyah Kilada, Shomit Das, Kenneth S. Stevens:
Synchronous elasticization: Considerations for correct implementation and MiniMIPS case study. VLSI-SoC 2010: 7-12 - [c26]Eliyah Kilada, Kenneth S. Stevens:
Design and Verification of Lazy and Hybrid Implementations of the SELF Protocol. VLSI-SoC (Selected Papers) 2010: 206-232
2000 – 2009
- 2009
- [j6]David Barnhart, Tanya Vladimirova, Martin N. Sweeting, Kenneth S. Stevens:
Radiation Hardening by Design of Asynchronous Logic for Hostile Environments. IEEE J. Solid State Circuits 44(5): 1617-1628 (2009) - [c25]Kenneth S. Stevens, Yang Xu, Vikas S. Vij:
Characterization of Asynchronous Templates for Integration into Clocked CAD Flows. ASYNC 2009: 151-161 - [c24]Yang Xu, Ken S. Stevens:
Automatic synthesis of computation interference constraints for relative timing verification. ICCD 2009: 16-22 - [c23]Daniel Gebhardt, Kenneth S. Stevens:
Power reduction through physical placement of asynchronous routers. NOCS 2009: 92 - [c22]Kenneth S. Stevens, Daniel Gebhardt, JunBok You, Yang Xu, Vikas S. Vij, Shomit Das, Krishnaji Desai:
The Future of Formal Methods and GALS Design. FMGALS@DATE 2009: 115-134 - 2008
- [c21]Graham M. Birtwistle, Kenneth S. Stevens:
The Family of 4-phase Latch Protocols. ASYNC 2008: 71-82 - [c20]Daniel Gebhardt, JunBok You, W. Scott Lee, Kenneth S. Stevens:
Network Simplicity for Latency Insensitive Cores. NOCS 2008: 209-210 - 2007
- [j5]Michael Kishinevsky, Sandeep K. Shukla, Ken S. Stevens:
Guest Editors' Introduction: GALS Design and Validation. IEEE Des. Test Comput. 24(5): 414-416 (2007) - [c19]Krishna Santhanam, Kenneth S. Stevens:
Dynamic gates with hysteresis and configurable noise tolerance. VLSI-SoC 2007: 184-189 - [c18]Daniel Gebhardt, Kenneth S. Stevens:
Elastic Flow in an Application Specific Network-on-Chip. FMGALS@MEMOCODE 2007: 3-15 - [c17]JunBok You, Yang Xu, Hosuk Han, Kenneth S. Stevens:
Performance Evaluation of Elastic GALS Interfaces and Network Fabric. FMGALS@MEMOCODE 2007: 17-32 - 2006
- [c16]Kenneth S. Stevens, Florentin Dartu:
Algorithms for MIS vector generation and pruning. ICCAD 2006: 408-414 - 2005
- [c15]Sanjit A. Seshia, Randal E. Bryant, Kenneth S. Stevens:
Modeling and Verifying Circuits Using Generalized Relative Timing. ASYNC 2005: 98-108 - [c14]Ken S. Stevens, Sandeep K. Shukla, Montek Singh, Jean-Pierre Talpin:
Preface. FMGALS@MEMOCODE 2005: 1-3 - 2003
- [j4]Ken S. Stevens, Ran Ginosar, Shai Rotem:
Relative timing [asynchronous design]. IEEE Trans. Very Large Scale Integr. Syst. 11(1): 129-140 (2003) - [c13]Kenneth S. Stevens:
Energy and Performance Models for Clocked and Asynchronous Communication. ASYNC 2003: 56-67 - 2002
- [j3]Jordi Cortadella, Michael Kishinevsky, Steven M. Burns, Alex Kondratyev, Luciano Lavagno, Ken S. Stevens, Alexander Taubin, Alexandre Yakovlev:
Lazy transition systems and asynchronous circuit synthesis withrelative timing assumptions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(2): 109-130 (2002) - [c12]Peter A. Beerel, Ken S. Stevens, Hoshik Kim:
Relative Timing Based Verification of Timed Circuits and Systems. ASYNC 2002: 115-124 - [c11]Ronald W. Brower, Kenneth S. Stevens:
Congruent Weak Conformance, a Partial Order among Processes. FORTE 2002: 34-49 - 2001
- [j2]Kenneth S. Stevens, Shai Rotem, Ran Ginosar, Peter A. Beerel, Chris J. Myers, Kenneth Y. Yun, Rakefet Kol, Charles Dike, Marly Roncken:
An asynchronous instruction length decoder. IEEE J. Solid State Circuits 36(2): 217-228 (2001) - 2000
- [c10]Marly Roncken, Ken S. Stevens, Rajesh Pendurkar, Shai Rotem, Parimal Pal Chaudhuri:
CA-BIST for Asynchronous Circuits: A Case Study on the RAPPID Asynchronous Instruction Length Decoder. ASYNC 2000: 62-72 - [c9]Susmita Sur-Kolay, Marly Roncken, Ken S. Stevens, Parimal Pal Chaudhuri, Rob Roy:
Fsimac: a fault simulator for asynchronous sequential circuits. Asian Test Symposium 2000: 114-119
1990 – 1999
- 1999
- [c8]Shai Rotem, Ken S. Stevens, Charles Dike, Marly Roncken, Boris Agapiev, Ran Ginosar, Rakefet Kol, Peter A. Beerel, Chris J. Myers, Kenneth Y. Yun:
RAPPID: An Asynchronous Instruction Length Decoder. ASYNC 1999: 60-70 - [c7]Ken S. Stevens, Shai Rotem, Ran Ginosar:
Relative Timing. ASYNC 1999: 208-218 - [c6]Ken S. Stevens, Shai Rotem, Steven M. Burns, Jordi Cortadella, Ran Ginosar, Michael Kishinevsky, Marly Roncken:
CAD Directions for High Performance Asynchronous Circuits. DAC 1999: 116-121 - [c5]Bruce W. Suter, Kenneth S. Stevens, Scott R. Velazquez, Truong Q. Nguyen:
Multirate as a hardware paradigm. ICASSP 1999: 1885-1888 - [c4]Jordi Cortadella, Michael Kishinevsky, Steven M. Burns, Ken S. Stevens:
Synthesis of asynchronous control circuits with automatically generated relative timing assumptions. ICCAD 1999: 324-331 - 1998
- [c3]Wei-Chun Chou, Peter A. Beerel, Ran Ginosar, Rakefet Kol, Chris J. Myers, Shai Rotem, Ken S. Stevens, Kenneth Y. Yun:
Average-Case Optimized Technology Mapping of One-Hot Domino CircuitsAverage-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits. ASYNC 1998: 80- - [c2]Bruce W. Hunt, Kenneth S. Stevens, Bruce W. Suter, Donald S. Gelosh:
A Single Chip Low Power Asynchronous Implementation of an FFT Algorithm for Space Applications. ASYNC 1998: 216-223
1980 – 1989
- 1987
- [j1]Judy M. Anderson, William S. Coates, Alan L. Davis, Robert W. Hon, Ian N. Robinson, Shane V. Robison, Kenneth S. Stevens:
The Architecture of FAIM-1. Computer 20(1): 55-65 (1987) - 1986
- [c1]Kenneth S. Stevens, Shane V. Robison, Alan L. Davis:
The Post Office-Communication Support for Distributed Ensemble Architectures. ICDCS 1986: 160-166
Coauthor Index
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