default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDAndreas Herkersdorf
Person information
- affiliation: Technical University Munich, Germany
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
[j47]Lars Nolte
, Tim Twardzik, Camille Jalier, Zhigang Huang, Jiyuan Shi, Thomas Wild, Andreas Herkersdorf:
HW-FUTEX: Hardware-Assisted Futex Syscall. IEEE Trans. Very Large Scale Integr. Syst. 32(1): 16-29 (2024)- [c169]Lars Nolte, Tim Twardzik, Camille Jalier, Jiyuan Shi, Thomas Wild, Andreas Herkersdorf:
Hardware Assist for Linux IPC on an FPGA Platform. CF 2024 - [c168]Tim Twardzik, Lars Nolte, Camille Jalier, Jiyuan Shi, Thomas Wild, Andreas Herkersdorf:
HASIIL: Hardware-Assisted Scheduling to Improve IPC Latency in Linux. CF 2024 - [c167]Patrick Schmidt, Iuliia Topko, Matthias Stammler, Tanja Harbaum, Jürgen Becker, Rico Berner, Omar Ahmed, Jakub Jagielski, Thomas Seidler, Markus Abel, Marius Kreutzer, Maximilian Kirschner, Victor Pazmino Betancourt, Robin Sehm, Lukas Groth, Andrija Neskovic, Rolf Meyer, Saleh Mulhem, Mladen Berekovic, Matthias Probst, Manuel Brosch, Georg Sigl, Thomas Wild, Matthias Ernst, Andreas Herkersdorf, Florian Aigner, Stefan Hommes, Sebastian Lauer, Maximilian Seidler, Thomas Raste, Gasper Skvarc Bozic, Ibai Irigoyen Ceberio, Muhammad Hassan, Albrecht Mayer:
EMDRIVE Architecture: Embedded Distributed Computing and Diagnostics from Sensor to Edge. DATE 2024: 1-6 - [c166]Klajd Zyla, Marco Liess, Thomas Wild, Andreas Herkersdorf:
FlexCross: High-Speed and Flexible Packet Processing via a Crosspoint-Queued Crossbar. DSD 2024: 98-105 - [c165]Franz Biersack, Marco Liess, Markus Absmann, Fabiana Lotter, Thomas Wild, Andreas Herkersdorf:
ecoNIC: Saving Energy Through SmartNIC-Based Load Balancing of Mixed-Critical Ethernet Traffic. DSD 2024: 185-193 - [c164]Anmol Surhonne, Manuel Wensauer, Florian Maurer, Thomas Wild, Andreas Herkersdorf:
XCS with dynamic sized experience replay for memory constrained applications. GECCO Companion 2024: 1807-1814 - [c163]Klajd Zyla, Marco Liess, Thomas Wild, Andreas Herkersdorf:
FlexRoute: A Fast, Flexible and Priority-Aware Packet-Processing Design. PDP 2024: 52-59 - [i10]Klajd Zyla, Marco Liess, Thomas Wild, Andreas Herkersdorf:
FlexCross: High-Speed and Flexible Packet Processing via a Crosspoint-Queued Crossbar. CoRR abs/2407.08621 (2024) - 2023
- [j46]Florian Maurer, Moritz Thoma, Anmol Prakash Surhonne, Bryan Donyanavard, Andreas Herkersdorf:
Machine learning in run-time control of multicore processor systems. it Inf. Technol. 65(4-5): 164-176 (2023) - [c162]Klajd Zyla, Florian Maurer, Thomas Wild, Andreas Herkersdorf:
CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs. ARCS 2023: 215-229 - [c161]Lars Nolte, Tim Twardzik, Camille Jalier, Zhigang Huang, Jiyuan Shi, Clara Kowalsky, Thomas Wild, Andreas Herkersdorf:
HAWEN: Hardware Accelerator for Thread Wake-Ups in Linux Event Notification. DAC 2023: 1-6 - [c160]Nora Sperling, Alex Bendrick, Dominik Stöhrmann, Rolf Ernst, Bryan Donyanavard, Florian Maurer, Oliver Lenke, Anmol Surhonne, Andreas Herkersdorf, Walaa Amer, Caio Batista de Melo, Ping-Xiang Chen, Quang Anh Hoang, Rachid Karami, Biswadip Maity, Paul Nikolian, Mariam Rakka, Dongjoo Seo, Saehanseul Yi, Minjun Seo, Nikil D. Dutt, Fadi J. Kurdahi:
Information Processing Factory 2.0 - Self-awareness for Autonomous Collaborative Systems. DATE 2023: 1-6 - [c159]Anmol Surhonne, Florian Maurer, Thomas Wild, Andreas Herkersdorf:
LCT-DER: Learning Classifier Table with Dynamic-Sized Experience Replay for Run-time SoC Performance-Power Optimization. GECCO Companion 2023: 331-334 - [c158]Anmol Surhonne, Florian Maurer, Thomas Wild, Andreas Herkersdorf:
LCT-TL : Learning Classifier Table (LCT) with Transfer Learning for runtime SoC performance-power optimization. MCSoC 2023: 73-80 - [c157]Marco Liess, Julian Demicoli, Tobias Tiedje, Matthias Lohrmann, Matthias Nickel, M. Luniak, Dimitrios A. Prousalis, Thomas Wild, Ronald Tetzlaff, Diana Göhringer, Christian Mayr, Karlheinz Bock, Sebastian Steinhorst, Andreas Herkersdorf:
X-MAPE: Extending 6G-Connected Self-Adaptive Systems with Reflexive Actions. NFV-SDN 2023: 163-167 - [c156]Franz Biersack, Kilian Holzinger, Henning Stubbe, Thomas Wild, Georg Carle, Andreas Herkersdorf:
Priority-aware Inter-Server Receive Side Scaling. PDP 2023: 51-58 - [c155]Klajd Zyla, Marco Liess, Thomas Wild, Andreas Herkersdorf:
FlexPipe: Fast, Flexible and Scalable Packet Processing for High-Performance SmartNICs. VLSI-SoC 2023: 1-6 - 2022
- [j45]Nima Taherinejad, Andreas Herkersdorf, Axel Jantsch:
Autonomous Systems, Trust, and Guarantees. IEEE Des. Test 39(1): 42-48 (2022) - [j44]Mark Sagi, Nguyen Anh Vu Doan, Nael Fasfous, Thomas Wild, Andreas Herkersdorf:
Fine-Grained Power Modeling of Multicore Processors Using FFNNs. Int. J. Parallel Program. 50(2): 243-266 (2022) - [j43]Eberle A. Rambo, Bryan Donyanavard, Minjun Seo, Florian Maurer, Thawra Kadeed, Caio Batista de Melo, Biswadip Maity, Anmol Surhonne, Andreas Herkersdorf, Fadi J. Kurdahi, Nikil D. Dutt, Rolf Ernst:
The Self-Aware Information Processing Factory Paradigm for Mixed-Critical Multiprocessing. IEEE Trans. Emerg. Top. Comput. 10(1): 250-266 (2022) - [c154]Anmol Surhonne, Nguyen Anh Vu Doan, Florian Maurer, Thomas Wild, Andreas Herkersdorf:
GAE-LCT: A Run-Time GA-Based Classifier Evolution Method for Hardware LCT Controlled SoC Performance-Power Optimization. ARCS 2022: 271-285 - [c153]Kilian Holzinger, Franz Biersack, Henning Stubbe, Angela Gonzalez Mariño, Abdoul Kane, Francesc Fons, Haigang Zhang, Thomas Wild, Andreas Herkersdorf, Georg Carle:
SmartNIC-based Load Management and Network Health Monitoring for Time Sensitive Applications. NOMS 2022: 1-6 - [c152]Lars Nolte, Tim Twardzik, Camille Jalier, Zhigang Huang, Jiyuan Shi, Thomas Wild, Andreas Herkersdorf:
GLS Tracing: Gem5-based Low-intrusive Software Tracing. NorCAS 2022: 1-6 - 2021
- [j42]Sven Rheindt, Sebastian Maier, Nora Pohle, Lars Nolte, Oliver Lenke, Florian Schmaus, Thomas Wild, Wolfgang Schröder-Preikschat, Andreas Herkersdorf:
DySHARQ: Dynamic Software-Defined Hardware-Managed Queues for Tile-Based Architectures. Int. J. Parallel Program. 49(4): 506-540 (2021) - [j41]Akshay Srivatsa, Mostafa Mansour, Sven Rheindt, Dirk Gabriel, Thomas Wild, Andreas Herkersdorf:
DynaCo: Dynamic Coherence Management for Tiled Manycore Architectures. Int. J. Parallel Program. 49(4): 570-599 (2021) - [j40]Akshay Srivatsa, Nael Fasfous, Nguyen Anh Vu Doan, Sebastian Nagel, Thomas Wild, Andreas Herkersdorf:
Exploring a Hybrid Voting-based Eviction Policy for Caches and Sparse Directories on Manycore Architectures. Microprocess. Microsystems 87: 104384 (2021) - [j39]Max Koenen, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf:
Protection switching schemes and mapping strategies for fail-operational hard real-time NoCs. Microprocess. Microsystems 87: 104385 (2021) - [j38]Biswadip Maity, Bryan Donyanavard, Anmol Surhonne, Amir M. Rahmani, Andreas Herkersdorf, Nikil D. Dutt:
SEAMS: Self-Optimizing Runtime Manager for Approximate Memory Hierarchies. ACM Trans. Embed. Comput. Syst. 20(5): 48:1-48:26 (2021) - [c151]Kilian Holzinger, Henning Stubbe, Franz Biersack, Angela Gonzalez Mariño, Abdoul Kane, Francisco Fons Lluis, Haigang Zhang, Thomas Wild, Andreas Herkersdorf, Georg Carle:
Precise real-time monitoring of time-critical flows. CoNEXT 2021: 489-490 - [c150]Mark Sagi, Martin Rapp, Heba Khdr, Yizhe Zhang, Nael Fasfous, Nguyen Anh Vu Doan, Thomas Wild, Jörg Henkel, Andreas Herkersdorf:
Long Short-Term Memory Neural Network-based Power Forecasting of Multi-Core Processors. DATE 2021: 1685-1690 - [c149]Oliver Lenke, Richard Petri, Thomas Wild, Andreas Herkersdorf:
PEPERONI: Pre-Estimating the Performance of Near-Memory Integration. MEMSYS 2021: 9:1-9:6 - 2020
- [j37]Martin Rapp, Mark Sagi, Anuj Pathania, Andreas Herkersdorf, Jörg Henkel:
Power- and Cache-Aware Task Mapping with Dynamic Power Budgeting for Many-Cores. IEEE Trans. Computers 69(1): 1-13 (2020) - [j36]Mark Sagi, Nguyen Anh Vu Doan, Martin Rapp, Thomas Wild, Jörg Henkel, Andreas Herkersdorf:
A Lightweight Nonlinear Methodology to Accurately Model Multicore Processor Power. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11): 3152-3164 (2020) - [j35]Kirstie L. Bellman, Christopher Landauer, Nikil D. Dutt, Lukas Esterle, Andreas Herkersdorf, Axel Jantsch, Nima Taherinejad, Peter R. Lewis, Marco Platzner, Kalle Tammemäe:
Self-aware Cyber-Physical Systems. ACM Trans. Cyber Phys. Syst. 4(4): 38:1-38:26 (2020) - [j34]Yong Hu, Marcel Mettler, Daniel Mueller-Gritschneder, Thomas Wild, Andreas Herkersdorf, Ulf Schlichtmann:
Machine Learning Approaches for Efficient Design Space Exploration of Application-Specific NoCs. ACM Trans. Design Autom. Electr. Syst. 25(5): 44:1-44:27 (2020) - [j33]Heba Khdr, Muhammad Shafique, Santiago Pagani, Andreas Herkersdorf, Jörg Henkel:
Combinatorial Auctions for Temperature-Constrained Resource Management in Manycores. IEEE Trans. Parallel Distributed Syst. 31(7): 1605-1620 (2020) - [c148]Sven Rheindt, Andreas Fried, Oliver Lenke, Lars Nolte, Temur Sabirov, Tim Twardzik, Thomas Wild, Andreas Herkersdorf:
X-CEL: A Method to Estimate Near-Memory Acceleration Potential in Tile-Based MPSoCs. ARCS 2020: 109-123 - [c147]Florian Maurer, Bryan Donyanavard, Amir M. Rahmani, Nikil D. Dutt, Andreas Herkersdorf:
Emergent Control of MPSoC Operation by a Hierarchical Supervisor / Reinforcement Learning Approach. DATE 2020: 1562-1567 - [c146]Nguyen Anh Vu Doan, Akshay Srivatsa, Nael Fasfous, Sebastian Nagel, Thomas Wild, Andreas Herkersdorf:
On-Chip Democracy: A Study on the Use of Voting Systems for Computer Cache Memory Management. IEEM 2020: 984-988 - [c145]Sven Rheindt, Temur Sabirov, Oliver Lenke, Thomas Wild, Andreas Herkersdorf:
X-Centric: A Survey on Compute-, Memory- and Application-Centric Computer Architectures. MEMSYS 2020: 178-193 - [c144]Max Koenen, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf:
Exploring Task and Channel Mapping Strategies in Fail-Operational and Hard Real-Time NoCs. NorCAS 2020: 1-7 - [c143]Akshay Srivatsa, Sebastian Nagel, Nael Fasfous, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf:
HyVE: A Hybrid Voting-based Eviction Policy for Caches. NorCAS 2020: 1-7 - [c142]Andreas Oeldemann, Franz Biersack, Thomas Wild, Andreas Herkersdorf:
Inter-Server RSS: Extending Receive Side Scaling for Inter-Server Workload Distribution. PDP 2020: 46-53 - [c141]Mark Sagi, Nguyen Anh Vu Doan, Nael Fasfous, Thomas Wild, Andreas Herkersdorf:
Fine-Grained Power Modeling of Multicore Processors Using FFNNs. SAMOS 2020: 186-199 - [i9]Biswadip Maity, Bryan Donyanavard, Anmol Surhonne, Amir M. Rahmani, Andreas Herkersdorf, Nikil D. Dutt:
AXES: Approximation Manager for Emerging Memory Architectures. CoRR abs/2011.08353 (2020)
2010 – 2019
- 2019
- [c140]Dominik Scholz, Andreas Oeldemann, Fabien Geyer, Sebastian Gallenmüller, Henning Stubbe, Thomas Wild, Andreas Herkersdorf, Georg Carle:
Cryptographic Hashing in P4 Data Planes. ANCS 2019: 1-6 - [c139]Max Koenen, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf:
A Hybrid NoC Enabling Fail-Operational and Hard Real-Time Communication in MPSoC. ARCS 2019: 31-44 - [c138]Michael Vonbun, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf:
Network Coding in Networks-on-Chip with Lossy Links. ARCS 2019: 308-321 - [c137]Eberle A. Rambo, Thawra Kadeed, Rolf Ernst, Minjun Seo, Fadi J. Kurdahi, Bryan Donyanavard, Caio Batista de Melo, Biswadip Maity, Kasra Moazzemi, Kenneth Michael Stewart, Saehanseul Yi, Amir M. Rahmani, Nikil D. Dutt, Florian Maurer, Nguyen Anh Vu Doan, Anmol Surhonne, Thomas Wild, Andreas Herkersdorf:
The information processing factory: a paradigm for life cycle management of dependable systems. CODES+ISSS 2019: 20:1-20:2 - [c136]Nguyen Anh Vu Doan, Max Koenen, Thomas Wild, Andreas Herkersdorf:
Multi-Objective Optimization of Channel Mapping for Fail-Operational Hybrid TDM NoCs. CANDAR Workshops 2019: 201-207 - [c135]Mark Sagi, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf:
Multicore Power Estimation using Independent Component Analysis Based Modeling. MCSoC 2019: 38-45 - [c134]Sven Rheindt, Andreas Fried, Oliver Lenke, Lars Nolte, Thomas Wild, Andreas Herkersdorf:
NEMESYS: near-memory graph copy enhanced system-software. MEMSYS 2019: 3-18 - [c133]Bryan Donyanavard, Tiago Mück, Amir M. Rahmani, Nikil D. Dutt, Armin Sadighi, Florian Maurer, Andreas Herkersdorf:
SOSA: Self-Optimizing Learning with Self-Adaptive Control for Hierarchical System-on-Chip Management. MICRO 2019: 685-698 - [c132]Michael Vonbun, Adrian Schiechel, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf:
APEC: improved acknowledgement prioritization through erasure coding in bufferless NoCs. NOCS 2019: 6:1-6:8 - [c131]Max Koenen, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf:
Channel mapping strategies for effective protection switching in fail-operational hard real-time NoCs. NOCS 2019: 20:1-20:2 - [c130]Akshay Srivatsa, Sven Rheindt, Dirk Gabriel, Thomas Wild, Andreas Herkersdorf:
CoD: Coherence-on-Demand - Runtime Adaptable Working Set Coherence for DSM-Based Manycore Architectures. SAMOS 2019: 18-33 - [c129]Sven Rheindt, Sebastian Maier, Florian Schmaus, Thomas Wild, Wolfgang Schröder-Preikschat, Andreas Herkersdorf:
SHARQ: Software-Defined Hardware-Managed Queues for Tile-Based Manycore Architectures. SAMOS 2019: 212-225 - [c128]Thomas Goldbrunner, Nguyen Anh Vu Doan, Diogo Poças, Thomas Wild, Andreas Herkersdorf:
Register Requirement Minimization of Fixed-Depth Pipelines for Streaming Data Applications. SoCC 2019: 406-411 - [i8]Eberle A. Rambo, Bryan Donyanavard, Minjun Seo, Florian Maurer, Thawra Kadeed, Caio Batista de Melo, Biswadip Maity, Anmol Surhonne, Andreas Herkersdorf, Fadi J. Kurdahi, Nikil D. Dutt, Rolf Ernst:
The Information Processing Factory: Organization, Terminology, and Definitions. CoRR abs/1907.01578 (2019) - 2018
- [j32]Mischa Möstl, Johannes Schlatow, Rolf Ernst, Nikil D. Dutt, Ahmed Nassar, Amir-Mohammad Rahmani, Fadi J. Kurdahi, Thomas Wild, Armin Sadighi, Andreas Herkersdorf:
Platform-Centric Self-Awareness as a Key Enabler for Controlling Changes in CPS. Proc. IEEE 106(9): 1543-1567 (2018) - [c127]Sven Rheindt, Andreas Schenk, Akshay Srivatsa, Thomas Wild, Andreas Herkersdorf:
CaCAO: Complex and Compositional Atomic Operations for NoC-Based Manycore Platforms. ARCS 2018: 139-152 - [c126]Subramanian Shiva Shankar, Pinxing Lin, Andreas Herkersdorf, Thomas Wild:
BiSME: A Hardware Coprocessor to Perform Signature Matching at Multi-Gigabit Rates. ASAP 2018: 1-9 - [c125]Armin Sadighi, Bryan Donyanavard, Thawra Kadeed, Kasra Moazzemi, Tiago Mück, Ahmed Nassar, Amir M. Rahmani, Thomas Wild, Nikil D. Dutt, Rolf Ernst, Andreas Herkersdorf, Fadi J. Kurdahi:
Design methodologies for enabling self-awareness in autonomous systems. DATE 2018: 1532-1537 - [c124]Andreas Oeldemann, Thomas Wild, Andreas Herkersdorf:
FlueNT10G: A Programmable FPGA-based Network Tester for Multi-10-Gigabit Ethernet. FPL 2018: 178-185 - [c123]Leonard Masing, Akshay Srivatsa, Fabian Kreß, Nidhi Anantharajaiah, Andreas Herkersdorf, Jürgen Becker:
In-NoC Circuits for Low-Latency Cache Coherence in Distributed Shared-Memory Architectures. MCSoC 2018: 138-145 - [c122]Thomas Goldbrunner, Thomas Wild, Andreas Herkersdorf:
Memory Access Pattern Profiling for Streaming Applications Based on MATLAB Models. PATMOS 2018: 32-38 - 2017
- [j31]Philipp Wagner, Thomas Wild, Andreas Herkersdorf:
DiaSys: Improving SoC insight through on-chip diagnosis. J. Syst. Archit. 75: 120-132 (2017) - [j30]Aurang Zaib, Thomas Wild, Andreas Herkersdorf, Jan Heisswolf, Jürgen Becker, Andreas Weichslgartner, Jürgen Teich:
Efficient task spawning for shared memory and message passing in many-core architectures. J. Syst. Archit. 77: 72-82 (2017) - [c121]Andreas Oeldemann, Thomas Wild, Andreas Herkersdorf:
Reducing Data Center Resource Over-Provisioning Through Dynamic Load Management for Virtualized Network Functions. ARCS 2017: 234-247 - [c120]Lin Li, Philipp Wagner, Albrecht Mayer, Thomas Wild, Andreas Herkersdorf:
A non-intrusive, operating system independent spinlock profiler for embedded multicore systems. DATE 2017: 322-325 - [c119]Johannes Schlatow, Mischa Möstl, Rolf Ernst, Marcus Nolte, Inga Jatzkowski, Markus Maurer, Christian Herber, Andreas Herkersdorf:
Self-awareness in autonomous automotive systems. DATE 2017: 1050-1055 - [c118]Ihsen Alouani, Thomas Wild, Andreas Herkersdorf, Smaïl Niar:
Adaptive Reliability for Fault Tolerant Multicore Systems. DSD 2017: 538-542 - [c117]Subramanian Shiva Shankar, Pinxing Lin, Andreas Herkersdorf, Thomas Wild:
A Divide and Conquer State Grouping Method for Bitmap Based Transition Compression. PDCAT 2017: 400-406 - [c116]Akshay Srivatsa, Sven Rheindt, Thomas Wild, Andreas Herkersdorf:
Region based cache coherence for tiled MPSoCs. SoCC 2017: 286-291 - 2016
- [j29]Santiago Pagani, Lars Bauer, Qingqing Chen, Elisabeth Glocker, Frank Hannig, Andreas Herkersdorf, Heba Khdr, Anuj Pathania, Ulf Schlichtmann, Doris Schmitt-Landsiedel, Mark Sagi, Éricles Sousa, Philipp Wagner, Volker Wenzel, Thomas Wild, Jörg Henkel:
Dark silicon management: an integrated and coordinated cross-layer approach. it Inf. Technol. 58(6): 297-307 (2016) - [j28]Hou Zhao Qi Rex, Jong Ching Chuen, Andreas Herkersdorf:
ANN Predicted Apps-Usage Aware Linux Scheduler for Asymmetrical Multi Cluster SoC. J. Softw. 11(7): 623-630 (2016) - [j27]Stefan Rosch, Holm Rauchfuss, Stefan Wallentowitz, Thomas Wild, Andreas Herkersdorf:
MPSoC application resilience by hardware-assisted communication virtualization. Microelectron. Reliab. 61: 11-16 (2016) - [c115]Philipp Wagner, Thomas Wild, Andreas Herkersdorf:
DiaSys: On-Chip Trace Analysis for Multi-processor System-on-Chip. ARCS 2016: 197-209 - [c114]Michael Vonbun, Thomas Wild, Andreas Herkersdorf:
Estimation of End-to-End Packet Error Rates for NoC Multicasts. ARCS 2016: 363-374 - [c113]Jagath Weerasinghe, François Abel, Christoph Hagleitner, Andreas Herkersdorf:
Disaggregated FPGAs: Network Performance Comparison against Bare-Metal Servers, Virtual Machines and Linux Containers. CloudCom 2016: 9-17 - [c112]Nikil D. Dutt, Fadi J. Kurdahi, Rolf Ernst, Andreas Herkersdorf:
Conquering MPSoC complexity with principles of a self-aware information processing factory. CODES+ISSS 2016: 37:1-37:4 - [c111]Andre Oliver Richter, Christian Herber, Thomas Wild, Andreas Herkersdorf:
Resolving Performance Interference in SR-IOV Setups with PCIe Quality-of-Service Extensions. DSD 2016: 454-462 - [c110]Hou Zhao Qi Rex, Jong Ching Chuen, Andreas Herkersdorf:
Linux apps-usage-driven power dissipation-aware scheduler. ISCAS 2016: 229-232 - [c109]Philipp Wagner, Lin Li, Thomas Wild, Albrecht Mayer, Andreas Herkersdorf:
What happens on an MPSoC stays on an MPSoC - unfortunately! ISIC 2016: 1-2 - [c108]Subramanian Shiva Shankar, Pinxing Lin, Andreas Herkersdorf, Thomas Wild:
Hardware acceleration of signature matching through multi-layer transition bit masking. ITNAC 2016: 217-224 - [c107]Lin Li, Philipp Wagner, Ramesh Ramaswamy, Albrecht Mayer, Thomas Wild, Andreas Herkersdorf:
A Rule-based Methodology for Hardware Configuration Validation in Embedded Systems. SCOPES 2016: 180-189 - [c106]Ravi Kumar Pujari, Thomas Wild, Andreas Herkersdorf:
TCU: A Multi-Objective Hardware Thread Mapping Unit for HPC Clusters. ISC 2016: 39-58 - [i7]Philipp Wagner, Thomas Wild, Andreas Herkersdorf:
Improving SoC Insight Through On-Chip Diagnosis. CoRR abs/1607.04549 (2016) - 2015
- [j26]Lars Bauer, Jörg Henkel, Andreas Herkersdorf, Michael A. Kochte, Johannes Maximilian Kühn, Wolfgang Rosenstiel, Thomas Schweizer, Stefan Wallentowitz, Volker Wenzel, Thomas Wild, Hans-Joachim Wunderlich, Hongyan Zhang:
Adaptive multi-layer techniques for increased system dependability. it Inf. Technol. 57(3): 149-158 (2015) - [j25]Andre Oliver Richter, Christian Herber, Thomas Wild, Andreas Herkersdorf:
Denial-of-Service attacks on PCI passthrough devices: Demonstrating the impact on network- and storage-I/O performance. J. Syst. Archit. 61(10): 592-599 (2015) - [j24]Frank Hannig, Andreas Herkersdorf:
Introduction to the Special Issue on Testing, prototyping, and debugging of multi-core architectures. J. Syst. Archit. 61(10): 600 (2015) - [c105]Andre Oliver Richter, Christian Herber, Stefan Wallentowitz, Thomas Wild, Andreas Herkersdorf:
A Hardware/Software Approach for Mitigating Performance Interference Effects in Virtualized Environments Using SR-IOV. CLOUD 2015: 950-957 - [c104]Jan Heisswolf, Andreas Weichslgartner, Aurang Zaib, Stephanie Friederich, Leonard Masing, Carsten Stein, Marco Duden, Roman Klopfer, Jürgen Teich, Thomas Wild, Andreas Herkersdorf, Jürgen Becker:
Fault-tolerant communication in invasive networks on chip. AHS 2015: 1-8 - [c103]Daniel Münch, Michael Paulitsch, Oliver Hanka, Andreas Herkersdorf:
SgInt: Safeguarding Interrupts for Hardware-Based I/O Virtualization for Mixed-Criticality Embedded Real-Time Systems Using Non Transparent Bridges. ARCS 2015: 15-27 - [c102]Aurang Zaib, Jan Heißwolf, Andreas Weichslgartner, Thomas Wild, Jürgen Teich, Jürgen Becker, Andreas Herkersdorf:
Network Interface with Task Spawning Support for NoC-Based DSM Architectures. ARCS 2015: 186-198 - [c101]Christian Herber, Andre Oliver Richter, Thomas Wild, Andreas Herkersdorf:
Real-time capable CAN to AVB ethernet gateway using frame aggregation and scheduling. DATE 2015: 61-66 - [c100]Daniel Münch, Michael Paulitsch, Oliver Hanka, Andreas Herkersdorf:
MPIOV: scaling hardware-based I/O virtualization for mixed-criticality embedded real-time systems using non transparent bridges to (multi-core) multi-processor systems. DATE 2015: 579-584 - [c99]Michael Vonbun, Stefan Wallentowitz, Andreas Oeldemann, Andreas Herkersdorf:
An Analytic Approach on End-to-End Packet Error Rate Estimation for Network-on-Chip. DSD 2015: 621-628 - [c98]Daniel Münch, Michael Paulitsch, Andreas Herkersdorf:
IOMPU: Spatial Separation for Hardware-Based I/O Virtualization for Mixed-Criticality Embedded Real-Time Systems Using Non-transparent Bridges. HPCC/CSS/ICESS 2015: 1037-1044 - [c97]Christian Herber, Ammar Saeed, Andreas Herkersdorf:
Design and Evaluation of a Low-Latency AVB Ethernet Endpoint Based on ARM SoC. HPCC/CSS/ICESS 2015: 1128-1134 - [c96]Ravi Kumar Pujari, Thomas Wild, Andreas Herkersdorf:
A hardware-based multi-objective thread mapper for tiled manycore architectures. ICCD 2015: 459-462 - [c95]Daniel Münch, Michael Paulitsch, Andreas Herkersdorf:
Monitoring of I/O for safety-critical systems using PCI express advanced error reporting. SIES 2015: 136-139 - [c94]André Kohn, Michael Kasmeyer, Rolf Schneider, Andre Roger, Claus Stellwag, Andreas Herkersdorf:
Fail-operational in safety-related automotive multi-core systems. SIES 2015: 144-147 - [c93]P. Parayil Mana Damodaran, Aurang Zaib, Stefan Wallentowitz, Thomas Wild, Andreas Herkersdorf:
Sharer status-based caching in tiled multiprocessor systems-on-chip. SpringSim (HPS) 2015: 67-74 - [c92]Jagath Weerasinghe, François Abel, Christoph Hagleitner, Andreas Herkersdorf:
Enabling FPGAs in Hyperscale Data Centers. UIC/ATC/ScalCom 2015: 1078-1086 - 2014
- [j23]Andreas Herkersdorf, Hananeh Aliee, Michael Engel, Michael Glaß, Christina Gimmler-Dumont, Jörg Henkel, Veit Kleeberger, Michael A. Kochte, Johannes Maximilian Kühn, Daniel Mueller-Gritschneder, Sani R. Nassif, Holm Rauchfuss, Wolfgang Rosenstiel, Ulf Schlichtmann, Muhammad Shafique, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Christian Weis, Hans-Joachim Wunderlich:
Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience. Microelectron. Reliab. 54(6-7): 1066-1074 (2014) - [j22]Christian Herber, Andre Oliver Richter, Holm Rauchfuss, Andreas Herkersdorf:
Spatial and temporal isolation of virtual CAN controllers. SIGBED Rev. 11(2): 19-26 (2014) - [c91]Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Martin Karle, Maximilian Singh, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker:
The Invasive Network on Chip - A Multi-Objective Many-Core Communication Infrastructure. ARCS Workshops 2014: 1-8 - [c90]Daniel Münch, Michael Paulitsch, Andreas Herkersdorf:
Temporal Separation for Hardware-Based I/O Virtualization for Mixed-Criticality Embedded Real-Time Systems Using PCIe SR-IOV. ARCS Workshops 2014: 1-7 - [c89]Andre Oliver Richter, Christian Herber, Holm Rauchfuss, Thomas Wild, Andreas Herkersdorf:
Performance Isolation Exposure in Virtualized Platforms with PCI Passthrough I/O Sharing. ARCS 2014: 171-182 - [c88]Jan Heisswolf, Aurang Zaib, Andreas Zwinkau, Sebastian Kobbe, Andreas Weichslgartner, Jürgen Teich, Jörg Henkel, Gregor Snelting, Andreas Herkersdorf, Jürgen Becker:
CAP: Communication Aware Programming. DAC 2014: 105:1-105:6 - [c87]Preethi P. Damodaran, Stefan Wallentowitz, Andreas Herkersdorf:
Distributed cooperative shared last-level caching in tiled multiprocessor system on chip. DATE 2014: 1-4 - [c86]Andy Heinig, Manfred Dietrich, Andreas Herkersdorf, Felix Miller, Thomas Wild, Kai Hahn, Armin Grünewald, Rainer Brück, Steffen Krohnert, Jochen Reisinger:
System integration - The bridge between More than Moore and More Moore. DATE 2014: 1-9 - [c85]Oliver Sander, Timo Sandmann, Viet Vu Duy, Steffen Bähr, Falco Bapp, Jürgen Becker, Hans-Ulrich Michel, Dirk Kaule, Daniel Adam, Enno Lübbers, Jürgen Hairbucher, Andre Oliver Richter, Christian Herber, Andreas Herkersdorf:
Hardware virtualization support for shared resources in mixed-criticality multicore systems. DATE 2014: 1-6 - [c84]Ulf Schlichtmann, Veit Kleeberger, Jacob A. Abraham, Adrian Evans, Christina Gimmler-Dumont, Michael Glaß, Andreas Herkersdorf, Sani R. Nassif, Norbert Wehn:
Connecting different worlds - Technology abstraction for reliability-aware design and Test. DATE 2014: 1-8 - [c83]Daniel Münch, Michael Paulitsch, Michael Honold, Wolfgang Schlecker, Andreas Herkersdorf:
Iterative FPGA Implementation Easing Safety Certification for Mixed-Criticality Embedded Real-Time Systems. DSD 2014: 303-311 - [c82]Stefan Wallentowitz, Stefan Rosch, Thomas Wild, Andreas Herkersdorf, Volker Wenzel, Jörg Henkel:
Dependable task and communication migration in tiled manycore system-on-chip. FDL 2014: 1-8 - [c81]Christian Herber, Andre Oliver Richter, Thomas Wild, Andreas Herkersdorf:
Deadline-Aware Interrupt Coalescing in Controller Area Network (CAN). HPCC/CSS/ICESS 2014: 693-700 - [c80]Hou Zhao Qi Rex, Jong Ching Chuen, Andreas Herkersdorf:
Apps-usage driven energy management for multicore mobile computing systems. ISIC 2014: 472-475 - [c79]Subramanian Shiva Shankar, Pinxing Lin, Andreas Herkersdorf:
Deep packet inspection in residential gateways and routers: Issues and challenges. ISIC 2014: 560-563 - [c78]Christian Herber, Andre Oliver Richter, Thomas Wild, Andreas Herkersdorf:
A network virtualization approach for performance isolation in controller area network (CAN). RTAS 2014: 215-224 - [c77]Gregor Walla, Andreas Herkersdorf, Andre S. Enger, Andreas Barthels, Hans-Ulrich Michel:
An automotive specific MILP model targeting power-aware function partitioning. ICSAMOS 2014: 299-306 - [i6]Aurang Zaib, Prashanth Raju, Thomas Wild, Andreas Herkersdorf:
A Layered Modeling and Simulation Approach to investigate Resource-aware Computing in MPSoCs. CoRR abs/1405.2917 (2014) - 2013
- [j21]Felix Miller, Thomas Wild, Andreas Herkersdorf:
Virtualized and fault-tolerant inter-layer-links for 3D-ICs. Microprocess. Microsystems 37(8-A): 823-835 (2013) - [j20]Veit Kleeberger, Christina Gimmler-Dumont, Christian Weis, Andreas Herkersdorf, Daniel Mueller-Gritschneder, Sani R. Nassif, Ulf Schlichtmann, Norbert Wehn:
A Cross-Layer Technology-Based Study of How Memory Errors Impact System Resilience. IEEE Micro 33(4): 46-55 (2013) - [j19]Michael Hübner, Andreas Herkersdorf:
Introduction to the special section on multiprocessor system-on-chip for cyber-physical systems. ACM Trans. Embed. Comput. Syst. 12(1s): 46:1 (2013) - [j18]Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Ralf König, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker:
Virtual networks - distributed communication resource management. ACM Trans. Reconfigurable Technol. Syst. 6(2): 8:1-8:14 (2013) - [c76]Christian Herber, Andre Oliver Richter, Holm Rauchfuss, Andreas Herkersdorf:
Self-virtualized CAN Controller for Multi-core Processors in Real-Time Applications. ARCS 2013: 244-255 - [c75]Stefan Wallentowitz, Thomas Wild, Andreas Herkersdorf:
HW-OSQM: Reducing the Impact of Event Signaling by Hardware-Based Operating System Queue Manipulation. ARCS 2013: 280-291 - [c74]Daniel Münch, Ole Isfort, Kevin Mueller, Michael Paulitsch, Andreas Herkersdorf:
Hardware-Based I/O Virtualization for Mixed Criticality Real-Time Systems Using PCIe SR-IOV. CSE 2013: 706-713 - [c73]Aurang Zaib, Jan Heisswolf, Andreas Weichslgartner, Thomas Wild, Jürgen Teich, Jürgen Becker, Andreas Herkersdorf:
AUTO-GS: Self-Optimization of NoC Traffic through Hardware Managed Virtual Connections. DSD 2013: 761-768 - [c72]Gregor Walla, Zaur Molotnikov, Hans-Ulrich Michel, Walter Stechele, Andreas Barthels, Andreas Herkersdorf:
A Design Space Exploration Framework For Automotive Embedded Systems And Their Power Management. ECMS 2013: 228-234 - [c71]Andreas Herkersdorf, Johny Paul, Ravi Kumar Pujari, Walter Stechele, Stefan Wallentowitz, Thomas Wild, Aurang Zaib:
Potentials and Challenges for Multi-Core Processors in Robotic Applications. GI-Jahrestagung 2013: 2749-2764 - [c70]Jan Heisswolf, Andreas Weichslgartner, Aurang Zaib, Ralf König, Thomas Wild, Andreas Herkersdorf, Jürgen Teich, Jürgen Becker:
Hardware Supported Adaptive Data Collection for Networks on Chip. IPDPS Workshops 2013: 153-162 - [c69]Michael Vonbun, Stefan Wallentowitz, Michael Feilen, Walter Stechele, Andreas Herkersdorf:
Evaluation of hop count advantages of network-coded 2D-mesh NoCs. PATMOS 2013: 134-141 - [i5]Stefan Wallentowitz, Philipp Wagner, Michael Tempelmeier, Thomas Wild, Andreas Herkersdorf:
Open Tiled Manycore System-on-Chip. CoRR abs/1304.5081 (2013) - [i4]Jürgen Teich, Wolfgang Schröder-Preikschat, Andreas Herkersdorf:
Invasive Computing - Common Terms and Granularity of Invasion. CoRR abs/1304.6067 (2013) - [i3]Andreas Herkersdorf, Michael Paulitsch:
Multicore Enablement for Embedded and Cyber Physical Systems (Dagstuhl Seminar 13052). Dagstuhl Reports 3(1): 149-182 (2013) - 2012
- [j17]Andreas Herkersdorf, Hans-Ulrich Michel, Holm Rauchfuss, Thomas Wild:
Multicore Enablement for Automotive Cyber Physical Systems. it Inf. Technol. 54(6): 280-287 (2012) - [j16]Andreas Lankes, Thomas Wild, Stefan Wallentowitz, Andreas Herkersdorf:
Benefits of selective packet discard in networks-on-chip. ACM Trans. Archit. Code Optim. 9(2): 12:1-12:21 (2012) - [c68]Holm Rauchfuss, Thomas Wild, Andreas Herkersdorf:
Enhanced Reliability in Tiled Manycore Architectures through Transparent Task Relocation. ARCS Workshops 2012: 263-274 - [c67]Jörg Henkel, Andreas Herkersdorf, Lars Bauer, Thomas Wild, Michael Hübner, Ravi Kumar Pujari, Artjom Grudnitsky, Jan Heisswolf, Aurang Zaib, Benjamin Vogel, Vahid Lari, Sebastian Kobbe:
Invasive manycore architectures. ASP-DAC 2012: 193-200 - [c66]Sebastian Drössler, Michael Eichhorn, S. Holzknecht, Bernd Müller-Rathgeber, Holm Rauchfuss, Michael Zwick, Erwin M. Biebl, Klaus Diepold, Jörg Eberspächer, Andreas Herkersdorf, Walter Stechele, Eckehard G. Steinbach, R. Freymann, Karl-Ernst Steinberg, Hans-Ulrich Michel:
A Real-Time Capable Virtualized Information and Communication Technology Infrastructure for Automotive Systems. Advances in Real-Time Systems 2012: 275-306 - [c65]Rainer Leupers, Grant Martin, Roman Plyaskin, Andreas Herkersdorf, Frank Schirrmeister, Tim Kogel, Martin Vaupel:
Virtual platforms: Breaking new grounds. DATE 2012: 685-690 - [c64]Abdelmajid Bouajila, Abdallah Lakhtel, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf:
A low-overhead monitoring ring interconnect for MPSoC parameter optimization. DDECS 2012: 46-49 - [c63]Felix Miller, Thomas Wild, Andreas Herkersdorf:
TSV-virtualization for Multi-protocol-Interconnect in 3D-ICs. DSD 2012: 374-381 - [c62]Matthias Ihmig, Michael Feilen, Andreas Herkersdorf:
Analytical Design Space Exploration Based on Statistically Refined Runtime and Logic Estimation for Software Defined Radios. DSD 2012: 445-452 - [c61]Jörg Henkel, Oliver Bringmann, Andreas Herkersdorf, Wolfgang Rosenstiel, Norbert Wehn:
Dependable embedded systems: The German research foundation DFG priority program SPP 1500. ETS 2012: 1 - [c60]Michael Gerndt, Frank Hannig, Andreas Herkersdorf, Andreas Hollmann, Marcel Meyer, Sascha Roloff, Josef Weidendorfer, Thomas Wild, Aurang Zaib:
An integrated simulation framework for invasive computing. FDL 2012: 209-216 - [c59]Stefan Wallentowitz, Andreas Lankes, Aurang Zaib, Thomas Wild, Andreas Herkersdorf:
A framework for Open Tiled Manycore System-On-Chip. FPL 2012: 535-538 - [c58]Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Ralf König, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker:
Hardware-assisted Decentralized Resource Management for Networks on Chip with QoS. IPDPS Workshops 2012: 234-241 - [c57]Roman Plyaskin, Thomas Wild, Andreas Herkersdorf:
System-level software performance simulation considering out-of-order processor execution. ISSoC 2012: 1-7 - [c56]Andreas Herkersdorf:
Multicore enablement for Cyber Physical Systems. ICSAMOS 2012: 345 - [e2]Andreas Herkersdorf, Kay Römer, Uwe Brinkschulte:
Architecture of Computing Systems - ARCS 2012 - 25th International Conference, Munich, Germany, February 28 - March 2, 2012. Proceedings. Lecture Notes in Computer Science 7179, Springer 2012, ISBN 978-3-642-28292-8 [contents] - [e1]Gero Mühl, Jan Richling, Andreas Herkersdorf:
ARCS 2012 Workshops, 28. Februar - 2. März 2012, München, Germany. LNI P-200, GI 2012, ISBN 978-3-88579-294-9 [contents] - 2011
- [j15]Daniel Llorente, Kimon Karras, Thomas Wild, Andreas Herkersdorf:
Advanced Packet Segmentation and Buffering Algorithms in Network Processors. Trans. High Perform. Embed. Archit. Compil. 4: 334-353 (2011) - [c55]Jörg Henkel, Lars Bauer, Joachim Becker, Oliver Bringmann, Uwe Brinkschulte, Samarjit Chakraborty, Michael Engel, Rolf Ernst, Hermann Härtig, Lars Hedrich, Andreas Herkersdorf, Rüdiger Kapitza, Daniel Lohmann, Peter Marwedel, Marco Platzner, Wolfgang Rosenstiel, Ulf Schlichtmann, Olaf Spinczyk, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Hans-Joachim Wunderlich:
Design and architectures for dependable embedded systems. CODES+ISSS 2011: 69-78 - [c54]Zhonglei Wang, Kun Lu, Andreas Herkersdorf:
An approach to improve accuracy of source-level TLMs of embedded software. DATE 2011: 216-221 - [c53]Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf:
An architecture and an FPGA prototype of a reliable processor pipeline towards multiple soft- and timing errors. DDECS 2011: 225-230 - [c52]Johannes Zeppenfeld, Andreas Herkersdorf:
Applying autonomic principles for workload management in multi-core systems on chip. ICAC 2011: 3-10 - [c51]Thomas Ebi, Holm Rauchfuss, Andreas Herkersdorf, Jörg Henkel:
Agent-Based Thermal Management Using Real-Time I/O Communication Relocation for 3D Many-Cores. PATMOS 2011: 112-121 - [c50]Stefan Wallentowitz, Marcel Meyer, Thomas Wild, Andreas Herkersdorf:
Accelerating collective communication in message passing on manycore System-on-Chip. ICSAMOS 2011: 9-16 - [c49]Roman Plyaskin, Andreas Herkersdorf:
Context-aware compiled simulation of out-of-order processor behavior based on atomic traces. VLSI-SoC 2011: 386-391 - [p6]Andreas Bernauer, Johannes Zeppenfeld, Oliver Bringmann, Andreas Herkersdorf, Wolfgang Rosenstiel:
Combining Software and Hardware LCS for Lightweight On-chip Learning. Organic Computing 2011: 253-265 - [p5]Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Andreas Herkersdorf:
Autonomic System on Chip Platform. Organic Computing 2011: 413-425 - [p4]Johannes Zeppenfeld, Abdelmajid Bouajila, Walter Stechele, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Andreas Herkersdorf:
Applying ASoC to Multi-core Applications for Workload Management. Organic Computing 2011: 461-472 - [p3]Andreas Herkersdorf, Andreas Lankes, Michael Meitinger, Rainer Ohlendorf, Stefan Wallentowitz, Thomas Wild, Johannes Zeppenfeld:
Hardware Support for Efficient Resource Utilization in Manycore Processor Systems. Multiprocessor System-on-Chip 2011: 57-87 - [p2]Jürgen Teich, Jörg Henkel, Andreas Herkersdorf, Doris Schmitt-Landsiedel, Wolfgang Schröder-Preikschat, Gregor Snelting:
Invasive Computing: An Overview. Multiprocessor System-on-Chip 2011: 241-268 - [i2]Kirstie L. Bellman, Andreas Herkersdorf, Michael G. Hinchey:
Organic Computing - Design of Self-Organizing Systems (Dagstuhl Seminar 11181). Dagstuhl Reports 1(5): 1-28 (2011) - 2010
- [j14]Zhonglei Wang, Andreas Herkersdorf:
Software performance simulation strategies for high-level embedded system design. Perform. Evaluation 67(8): 717-739 (2010) - [c48]Kimon Karras, Thomas Wild, Andreas Herkersdorf:
A folded pipeline network processor architecture for 100 Gbit/s networks. ANCS 2010: 2 - [c47]Johannes Zeppenfeld, Andreas Herkersdorf:
Autonomic Workload Management for Multi-core Processor Systems. ARCS 2010: 49-60 - [c46]Roman Plyaskin, Andreas Herkersdorf:
A Method for Accurate High-Level Performance Evaluation of MPSoC Architectures Using Fine-Grained Generated Traces. ARCS 2010: 199-210 - [c45]Matthias May, Norbert Wehn, Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Daniel Ziener, Jürgen Teich:
A rapid prototyping system for error-resilient multi-processor systems-on-chip. DATE 2010: 375-380 - [c44]Robert Hartl, Andreas J. Rohatschek, Walter Stechele, Andreas Herkersdorf:
Architectural Vulnerability Factor Estimation with Backwards Analysis. DSD 2010: 605-612 - [c43]Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf:
An Application-Aware Load Balancing Strategy for Network Processors. HiPEAC 2010: 156-170 - [c42]Andreas Bernauer, Johannes Zeppenfeld, Oliver Bringmann, Andreas Herkersdorf, Wolfgang Rosenstiel:
Combining Software and Hardware LCS for Lightweight On-Chip Learning. DIPES/BICC 2010: 278-289 - [c41]Johannes Zeppenfeld, Abdelmajid Bouajila, Andreas Herkersdorf, Walter Stechele:
Towards Scalability and Reliability of Autonomic Systems on Chip. ISORC Workshops 2010: 73-80 - [c40]Andreas Lankes, Thomas Wild, Andreas Herkersdorf, Sören Sonntag, Helmut Reinig:
Comparison of Deadlock Recovery and Avoidance Mechanisms to Approach Message Dependent Deadlocks in On-chip Networks. NOCS 2010: 17-24 - [c39]Roman Plyaskin, Alejandro Masrur, Martin Geier, Samarjit Chakraborty, Andreas Herkersdorf:
High-level timing analysis of concurrent applications on MPSoC platforms using memory-aware trace-driven simulations. VLSI-SoC 2010: 229-234 - [p1]Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf:
FlexPath NP - Flexible, Dynamically Reconfigurable Processing Paths in Network Processors. Dynamically Reconfigurable Systems 2010: 355-374
2000 – 2009
- 2009
- [c38]Zhonglei Wang, Andreas Herkersdorf, Wolfgang Haberl, Martin Wechs:
SysCOLA: a framework for co-development of automotive software and system platform. DAC 2009: 37-42 - [c37]Zhonglei Wang, Andreas Herkersdorf:
An efficient approach for system-level timing simulation of compiler-optimized embedded software. DAC 2009: 220-225 - [c36]Shadi Traboulsi, Michael Meitinger, Rainer Ohlendorf, Andreas Herkersdorf:
An Efficient Hardware Architecture for Packet Re-sequencing in Network Processors MPSoCs. DSD 2009: 11-18 - [c35]Andreas Lankes, Thomas Wild, Andreas Herkersdorf:
Hierarchical NoCs for Optimized Access to Shared Memory and IO Resources. DSD 2009: 255-262 - [c34]Andreas Lankes, Andreas Herkersdorf, Sören Sonntag, Helmut Reinig:
NoC topology exploration for mobile multimedia applications. ICECS 2009: 707-710 - [c33]Zhonglei Wang, Andreas Herkersdorf:
Flow Analysis on Intermediate Source Code for WCET Estimation of Compiler-Optimized Programs. RTCSA 2009: 22-27 - 2008
- [j13]Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf:
A Processing Path Dispatcher in Network Processor MPSoCs. IEEE Trans. Very Large Scale Integr. Syst. 16(10): 1335-1345 (2008) - [c32]Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf:
A Hardware Packet Re-Sequencer Unit for Network Processors. ARCS 2008: 85-97 - [c31]Daniel Llorente, Kimon Karras, Thomas Wild, Andreas Herkersdorf:
Buffer allocation for advanced packet segmentation in Network Processors. ASAP 2008: 221-226 - [c30]Christian Köhler, Albrecht Mayer, Andreas Herkersdorf:
Determining the Fidelity of Hardware-In-the-Loop Simulation Coupling Systems. BMAS 2008: 13-18 - [c29]Jürgen Becker, Michael Hübner, Robert Esser, Andreas Herkersdorf, Walter Stechele, Vera Lauer:
Design Flows, Communication Based Design and Architectures in Automotive Electronic Systems. DATE 2008 - [c28]Zhonglei Wang, Andreas Herkersdorf, Stefano Merenda, Michael Tautschnig:
A Model Driven Development Approach for Implementing Reactive Systems in Hardware. FDL 2008: 197-202 - [c27]Josef Angermeier, Mateusz Majer, Jürgen Teich, Lars Braun, Tobias Schwalb, Philipp Graf, Michael Hübner, Jürgen Becker, Enno Lübbers, Marco Platzner, Christopher Claus, Walter Stechele, Andreas Herkersdorf, Markus Rullmann, Renate Merker:
Fine grain reconfigurable architectures. FPL 2008: 348 - [c26]Thilo Pionteck, Roman Koch, Carsten Albrecht, Erik Maehle, Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf:
Network processors. FPL 2008: 352 - [c25]Andreas Herkersdorf, Walter Stechele, Christian Müller-Schloer, Hartmut Schmeck:
Workshop "Adaptive and Organic Systems". GI Jahrestagung (2) 2008: 731-732 - [c24]Johannes Zeppenfeld, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf:
Learning Classifier Tables for Autonomic Systems on Chip. GI Jahrestagung (2) 2008: 771-778 - [c23]Zhonglei Wang, Wolfgang Haberl, Andreas Herkersdorf, Martin Wechs:
A Simulation Approach for Performance Validation during Embedded Systems Design. ISoLA 2008: 385-399 - [c22]Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf:
FlexPath NP - A network processor architecture with flexible processing paths. SoC 2008: 1-6 - [c21]Kimon Karras, Daniel Llorente, Thomas Wild, Andreas Herkersdorf:
Improving memory subsystem performance in network processors with smart packet segmentation. ICSAMOS 2008: 210-217 - [c20]Zhonglei Wang, Antonio Sánchez, Andreas Herkersdorf:
SciSim: a software performance estimation framework using source code instrumentation. WOSP 2008: 33-42 - 2007
- [j12]Christopher Claus, Walter Stechele, Andreas Herkersdorf:
Autovision - A Run-time Reconfigurable MPSoC Architecture for Future Driver Assistance Systems (Autovision - Eine zur Laufzeit rekonfigurierbare MPSoC Architektur für zukünftige Fahrerassistenzsysteme). it Inf. Technol. 49(3): 181- (2007) - [j11]Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf:
Simulated and measured performance evaluation of RISC-based SoC platforms in network processing applications. J. Syst. Archit. 53(10): 703-718 (2007) - [c19]Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf:
A Programmable Stream Processing Engine for Packet Manipulation in Network Processors. ISVLSI 2007: 259-264 - 2006
- [c18]Thomas Wild, Andreas Herkersdorf, Rainer Ohlendorf:
Performance evaluation for system-on-chip architectures using trace-based transaction level simulation. DATE 2006: 248-253 - [c17]Andreas Herkersdorf, Walter Stechele:
AutoVision: flexible processor architecture for video-assisted driving. DATE 2006: 556 - [c16]Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf:
An Architecture for Runtime Evaluation of SoC Reliability. GI Jahrestagung (1) 2006: 177-184 - [c15]Abdelmajid Bouajila, Andreas Bernauer, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele:
Error Detection Techniques Applicable in an Architecture Framework and Design Methodology for Autonomic SoCs. BICC 2006: 107-113 - [c14]Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf:
Performance Evaluation of RISC-based SoC Platforms in Network Processing Applications. ICSAMOS 2006: 152-159 - [c13]Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel:
Organic Computing at the System on Chip Level. VLSI-SoC 2006: 338-341 - [i1]Andreas Herkersdorf, Christopher Claus, Michael Meitinger, Rainer Ohlendorf, Thomas Wild:
Reconfigurable Processing Units vs. Reconfigurable Interconnects. Dynamically Reconfigurable Architectures 2006 - 2005
- [j10]Thomas Wild, Andreas Herkersdorf, Gyoo-Yeong Lee:
TAPES - Trace-based architecture performance evaluation with SystemC. Des. Autom. Embed. Syst. 10(2-3): 157-179 (2005) - [j9]David E. Taylor, Andreas Herkersdorf, Andreas C. Döring, Gero Dittmann:
Robust header compression (ROHC) in next-generation network processors. IEEE/ACM Trans. Netw. 13(4): 755-768 (2005) - [c12]Faisal Suleman, Dirk Eilers, Helmut Steckenbiller, Andreas Herkersdorf:
Adaptable DSP Functions for Dynamically Reconfigurable Communication Systems. ARCS Workshops 2005: 19-26 - [c11]Gabriel Mihai Lipsa, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele:
Towards a Framework and a Design Methodology for Autonomous SoC. ARCS Workshops 2005: 101-108 - [c10]Rainer Ohlendorf, Andreas Herkersdorf, Thomas Wild:
FlexPath NP: a network processor concept with application-driven flexible processing paths. CODES+ISSS 2005: 279-284 - [c9]Paul Zuber, Armin Windschiegl, Raúl Medina Beltrán de Otálora, Walter Stechele, Andreas Herkersdorf:
Reduction of CMOS Power Consumption and Signal Integrity Issues by Routing Optimization. DATE 2005: 986-987 - [c8]Gabriel Mihai Lipsa, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele:
Towards a Framework and a Design Methodology for Autonomic SoC. ICAC 2005: 391-392 - 2004
- [c7]Walter Stechele, Stephan Herrmann, Andreas Herkersdorf:
Towards a Dynamically Reconfigurable System-on-Chip Platform for Video Signal Processing. ARCS Workshops 2004: 225-234 - [c6]Carsten Albrecht, Rainer Hagenau, Erik Maehle, Andreas C. Döring, Andreas Herkersdorf:
A Comparison of Parallel Programming Models of Network Processors. ARCS Workshops 2004: 390-399 - [c5]Dirk Eilers, Helmut Steckenbiller, Andreas Herkersdorf:
Buffer Schemes for Runtime Reconfiguration of Function Variants in Communication Systems. FCCM 2004: 312-315 - [c4]Andreas Herkersdorf, Wolfgang Rosenstiel:
Towards a Framework and a Design Methodology for Autonomic Integrated Systems. GI Jahrestagung (2) 2004: 610-615 - 2003
- [j8]Maria Gabrani, Gero Dittmann, Andreas C. Döring, Andreas Herkersdorf, Patricia Sagmeister, Jan van Lunteren:
Design methodology for a modular service-driven network processor architecture. Comput. Networks 41(5): 623-640 (2003) - [j7]Samarjit Chakraborty, Simon Künzli, Lothar Thiele, Andreas Herkersdorf, Patricia Sagmeister:
Performance evaluation of network processor architectures: combining simulation with analytical estimation. Comput. Networks 41(5): 641-665 (2003) - [j6]James R. Allen Jr., Brian M. Bass, Claude Basso, Richard H. Boivie, Jean Calvignac, Gordon T. Davis, Laurent Freléchoux, Marco Heddes, Andreas Herkersdorf, Andreas Kind, Joe F. Logan, Mohammad Peyravian, Mark A. Rinaldi, Ravi K. Sabhikhi, Michael S. Siegel, Marcel Waldvogel:
IBM PowerNP network processor: Hardware, software, and applications. IBM J. Res. Dev. 47(2-3): 177-194 (2003) - 2002
- [j5]John A. Darringer, Reinaldo A. Bergamaschi, Subhrajit Bhattacharya, Daniel Brand, Andreas Herkersdorf, Joseph K. Morrell, Indira Nair, Patricia Sagmeister, Youngsoo Shin:
Early analysis tools for system-on-a-chip design. IBM J. Res. Dev. 46(6): 691-708 (2002) - 2001
- [j4]Werner Bux, Wolfgang E. Denzel, Ton Engbersen, Andreas Herkersdorf, Ronald P. Luijten:
Technologies and building blocks for fast packet forwarding. IEEE Commun. Mag. 39(1): 70-77 (2001) - [j3]Peter H. Baechtold, Michael P. Beakes, Peter Buchmann, Rolf Clauberg, John F. Ewen, John F. Gilsdorf, Philippe Hauviller, Andreas Herkersdorf, Jean-Claude Le Garrec, Wolfram W. Lemppenau, Ben Parker, Dale J. Pearson, Joseph M. Pereira, Dominique Plassat, Scott K. Reynolds, Hans R. Schindler, André Steimle, David J. Webb, Albert X. Widmer:
Single-chip 622-Mb/s SDH/SONET framer, digital cross-connect and add/drop multiplexer solution. IEEE J. Solid State Circuits 36(1): 74-80 (2001) - 2000
- [j2]Rolf Clauberg, Peter Buchmann, Andreas Herkersdorf, David J. Webb:
Design Methodology for a Large Communication Chip. IEEE Des. Test Comput. 17(3): 86-94 (2000)
1990 – 1999
- 1999
- [c3]Rolf Clauberg, Andreas Herkersdorf, Wolfram W. Lemppenau, Hans R. Schindler:
A scalable modular architecture for SDH/SONET technology. ICCCN 1999: 442-446 - 1995
- [j1]Andreas Herkersdorf, L. Heusler, Erik Maehle:
Route Discovery for Multistage Fabrics in ATM Switching Nodes. Perform. Evaluation 22(3): 221-238 (1995) - 1993
- [c2]Andreas Herkersdorf, L. Heusler, Erik Maehle:
Route Discovery in Multistage Switch Fabrics. Data Communication Networks and their Performance 1993: 103-118 - [c1]Willibald A. Doeringer, Douglas Dykeman, Antonius P. J. Engbersen, Roch Guérin, Andreas Herkersdorf, L. Heusler:
Fast Connection Establishment in Large-Scale Networks. INFOCOM 1993: 489-496 - 1991
- [b1]Andreas Herkersdorf:
A method and a tool for the real-time evaluation of fast packet switching systems. ETH Zurich, Zürich, Switzerland, Hartung-Gorre 1991, ISBN 978-3-89191-445-8, pp. 1-208
Coauthor Index
Anmol Surhonne
aka: Anmol Prakash Surhonne
aka: Anmol Prakash Surhonne
[j47] [c169] [c168] [c167] [c166] [c165] [c164] [c163] [i10] [c162] [c161] [c159] [c158] [c157] [c156] [c155] [j44] [c154] [c153] [c152] [j42] [j41] [j40] [j39] [c151] [c150] [c149] [j36] [j34] [c148] [c146] [c145] [c144] [c143] [c142] [c141] [c140] [c139] [c138] [c137] [c136] [c135] [c134] [c132] [c131] [c130] [c129] [c128] [j32] [c127] [c126] [c125] [c124] [c122] [j31] [j30] [c121] [c120] [c118] [c117] [c116] [j29] [j27] [c115] [c114] [c111] [c109] [c108] [c107] [c106] [i7] [j26] [j25] [c105] [c104] [c102] [c101] [c96] [c93] [c91] [c89] [c86] [c82] [c81] [c78] [i6] [j21] [j18] [c75] [c73] [c71] [c70] [i5] [j17] [j16] [c68] [c67] [c63] [c60] [c59] [c58] [c57] [j15] [c50] [p3] [c48] [c43] [c40] [p1] [c35] [j13] [c32] [c31] [c26] [c22] [c21] [j11] [c19] [c18] [c14] [i1] [j10] [c10]
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-11-20 20:58 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
