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Michael A. Kochte
Person information
- affiliation: University of Stuttgart, Institute of Computer Architecture and Computer Engineering, Germany
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2020 – today
- 2020
- [c55]Sebastian Brandhofer, Michael A. Kochte, Hans-Joachim Wunderlich:
Synthesis of Fault-Tolerant Reconfigurable Scan Networks. DATE 2020: 798-803
2010 – 2019
- 2019
- [j18]Kuen-Jong Lee, Bo-Ren Chen, Michael Andreas Kochte:
On-Chip Self-Test Methodology With All Deterministic Compressed Test Patterns Recorded in Scan Chains. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(2): 309-321 (2019) - [j17]Matthias Kampmann, Michael A. Kochte, Chang Liu, Eric Schneider, Sybille Hellebrand, Hans-Joachim Wunderlich:
Built-In Test for Hidden Delay Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(10): 1956-1968 (2019) - [c54]Stefan Holst, Eric Schneider, Michael A. Kochte, Xiaoqing Wen, Hans-Joachim Wunderlich:
Variation-Aware Small Delay Fault Diagnosis on Compressed Test Responses. ITC 2019: 1-10 - 2018
- [j16]Michael A. Kochte, Hans-Joachim Wunderlich:
Self-Test and Diagnosis for Self-Aware Systems. IEEE Des. Test 35(5): 7-18 (2018) - [c53]Eric Schneider, Michael A. Kochte, Hans-Joachim Wunderlich:
Multi-level timing simulation on GPUs. ASP-DAC 2018: 470-475 - [c52]Ahmed Atteya, Michael A. Kochte, Matthias Sauer, Pascal Raiola, Bernd Becker, Hans-Joachim Wunderlich:
Online prevention of security violations in reconfigurable scan networks. ETS 2018: 1-6 - [c51]Pascal Raiola, Michael A. Kochte, Ahmed Atteya, Laura Rodríguez Gómez, Hans-Joachim Wunderlich, Bernd Becker, Matthias Sauer:
Detecting and Resolving Security Violations in Reconfigurable Scan Networks. IOLTS 2018: 91-96 - 2017
- [j15]Hongyan Zhang, Lars Bauer, Michael A. Kochte, Eric Schneider, Hans-Joachim Wunderlich, Jörg Henkel:
Aging Resilience and Fault Tolerance in Runtime Reconfigurable Architectures. IEEE Trans. Computers 66(6): 957-970 (2017) - [j14]Eric Schneider, Michael A. Kochte, Stefan Holst, Xiaoqing Wen, Hans-Joachim Wunderlich:
GPU-Accelerated Simulation of Small Delay Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(5): 829-841 (2017) - [j13]Wen-Hsuan Hsu, Michael Andreas Kochte, Kuen-Jong Lee:
Built-In Test and Diagnosis for TSVs With Different Placement Topologies and Crosstalk Impact Ranges. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(6): 1004-1017 (2017) - [c50]Dominik Ull, Michael A. Kochte, Hans-Joachim Wunderlich:
Structure-Oriented Test of Reconfigurable Scan Networks. ATS 2017: 127-132 - [c49]Michael A. Kochte, Matthias Sauer, Laura Rodríguez Gómez, Pascal Raiola, Bernd Becker, Hans-Joachim Wunderlich:
Specification and verification of security in reconfigurable scan networks. ETS 2017: 1-6 - [c48]Stefan Holst, Eric Schneider, Koshi Kawagoe, Michael A. Kochte, Kohei Miyase, Hans-Joachim Wunderlich, Seiji Kajihara, Xiaoqing Wen:
Analysis and mitigation or IR-Drop induced scan shift-errors. ITC 2017: 1-8 - [c47]Michael A. Kochte, Rafal Baranowski, Hans-Joachim Wunderlich:
Trustworthy reconfigurable access to on-chip infrastructure. ITC-Asia 2017: 119-124 - [c46]Chang Liu, Michael A. Kochte, Hans-Joachim Wunderlich:
Aging monitor reuse for small delay fault testing. VTS 2017: 1-6 - 2016
- [c45]Dominik Erb, Karsten Scheibler, Michael A. Kochte, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker:
Mixed 01X-RSL-Encoding for fast and accurate ATPG with unknowns. ASP-DAC 2016: 749-754 - [c44]Stefan Holst, Eric Schneider, Xiaoqing Wen, Seiji Kajihara, Yuta Yamato, Hans-Joachim Wunderlich, Michael A. Kochte:
Timing-Accurate Estimation of IR-Drop Impact on Logic- and Clock-Paths During At-Speed Scan Test. ATS 2016: 19-24 - [c43]Michael A. Kochte, Rafal Baranowski, Marcel Schaal, Hans-Joachim Wunderlich:
Test Strategies for Reconfigurable Scan Networks. ATS 2016: 113-118 - [c42]Jin-Cun Ye, Michael A. Kochte, Kuen-Jong Lee, Hans-Joachim Wunderlich:
Autonomous Testing for 3D-ICs with IEEE Std. 1687. ATS 2016: 215-220 - [c41]Alexander Schöll, Claus Braun, Michael A. Kochte, Hans-Joachim Wunderlich:
Efficient Algorithm-Based Fault Tolerance for Sparse Matrix Operations. DSN 2016: 251-262 - [c40]Michael A. Kochte, Rafal Baranowski, Matthias Sauer, Bernd Becker, Hans-Joachim Wunderlich:
Formal verification of secure reconfigurable scan network infrastructure. ETS 2016: 1-6 - [c39]Kuen-Jong Lee, Pin-Hao Tang, Michael A. Kochte:
An on-chip self-test architecture with test patterns recorded in scan chains. ITC 2016: 1-10 - [c38]Michael A. Kochte, Hans-Joachim Wunderlich:
Dependable on-chip infrastructure for dependable MPSOCs. LATS 2016: 183-188 - 2015
- [j12]Lars Bauer, Jörg Henkel, Andreas Herkersdorf, Michael A. Kochte, Johannes Maximilian Kühn, Wolfgang Rosenstiel, Thomas Schweizer, Stefan Wallentowitz, Volker Wenzel, Thomas Wild, Hans-Joachim Wunderlich, Hongyan Zhang:
Adaptive multi-layer techniques for increased system dependability. it Inf. Technol. 57(3): 149-158 (2015) - [j11]Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich:
Fine-Grained Access Management in Reconfigurable Scan Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(6): 937-946 (2015) - [j10]Dominik Erb, Michael A. Kochte, Sven Reimer, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker:
Accurate QBF-Based Test Pattern Generation in Presence of Unknown Values. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(12): 2025-2038 (2015) - [j9]Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich:
Reconfigurable Scan Networks: Modeling, Verification, and Optimal Pattern Generation. ACM Trans. Design Autom. Electr. Syst. 20(2): 30:1-30:27 (2015) - [c37]Koji Asada, Xiaoqing Wen, Stefan Holst, Kohei Miyase, Seiji Kajihara, Michael A. Kochte, Eric Schneider, Hans-Joachim Wunderlich, Jun Qian:
Logic/Clock-Path-Aware At-Speed Scan Test Generation for Avoiding False Capture Failures and Reducing Clock Stretch. ATS 2015: 103-108 - [c36]Matthias Kampmann, Michael A. Kochte, Eric Schneider, Thomas Indlekofer, Sybille Hellebrand, Hans-Joachim Wunderlich:
Optimized Selection of Frequencies for Faster-Than-at-Speed Test. ATS 2015: 109-114 - [c35]Michael A. Kochte, Atefe Dalirsani, Andrea Bernabei, Martin Omaña, Cecilia Metra, Hans-Joachim Wunderlich:
Intermittent and Transient Fault Diagnosis on Sparse Code Signatures. ATS 2015: 157-162 - [c34]Eric Schneider, Stefan Holst, Michael A. Kochte, Xiaoqing Wen, Hans-Joachim Wunderlich:
GPU-accelerated small delay fault simulation. DATE 2015: 1174-1179 - [c33]Alexander Schöll, Claus Braun, Michael A. Kochte, Hans-Joachim Wunderlich:
Low-overhead fault-tolerance for the preconditioned conjugate gradient solver. DFTS 2015: 60-65 - [c32]Hongyan Zhang, Michael A. Kochte, Eric Schneider, Lars Bauer, Hans-Joachim Wunderlich, Jörg Henkel:
STRAP: Stress-Aware Placement for Aging Mitigation in Runtime Reconfigurable Architectures. ICCAD 2015: 38-45 - [c31]Alexander Schöll, Claus Braun, Michael A. Kochte, Hans-Joachim Wunderlich:
Efficient on-line fault-tolerance for the preconditioned conjugate gradient method. IOLTS 2015: 95-100 - [c30]Chang Liu, Michael A. Kochte, Hans-Joachim Wunderlich:
Efficient observation point selection for aging monitoring. IOLTS 2015: 176-181 - 2014
- [b1]Michael A. Kochte:
Boolean reasoning for digital circuits in presence of unknown values: application to test automation. University of Stuttgart, 2014 - [j8]Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich:
Access Port Protection for Reconfigurable Scan Networks. J. Electron. Test. 30(6): 711-723 (2014) - [j7]Andreas Herkersdorf, Hananeh Aliee, Michael Engel, Michael Glaß, Christina Gimmler-Dumont, Jörg Henkel, Veit Kleeberger, Michael A. Kochte, Johannes Maximilian Kühn, Daniel Mueller-Gritschneder, Sani R. Nassif, Holm Rauchfuss, Wolfgang Rosenstiel, Ulf Schlichtmann, Muhammad Shafique, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Christian Weis, Hans-Joachim Wunderlich:
Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience. Microelectron. Reliab. 54(6-7): 1066-1074 (2014) - [j6]Dominik Erb, Michael A. Kochte, Matthias Sauer, Stefan Hillebrecht, Tobias Schubert, Hans-Joachim Wunderlich, Bernd Becker:
Exact Logic and Fault Simulation in Presence of Unknowns. ACM Trans. Design Autom. Electr. Syst. 19(3): 28:1-28:17 (2014) - [c29]Hongyan Zhang, Michael A. Kochte, Michael E. Imhof, Lars Bauer, Hans-Joachim Wunderlich, Jörg Henkel:
GUARD: GUAranteed Reliability in Dynamically Reconfigurable Systems. DAC 2014: 32:1-32:6 - [c28]Atefe Dalirsani, Michael A. Kochte, Hans-Joachim Wunderlich:
Area-efficient synthesis of fault-secure NoC switches. IOLTS 2014: 13-18 - [c27]Dominik Erb, Karsten Scheibler, Michael A. Kochte, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker:
Test pattern generation in presence of unknown values based on restricted symbolic logic. ITC 2014: 1-10 - [c26]Sybille Hellebrand, Thomas Indlekofer, Matthias Kampmann, Michael A. Kochte, Chang Liu, Hans-Joachim Wunderlich:
FAST-BIST: Faster-than-at-Speed BIST targeting hidden delay defects. ITC 2014: 1-8 - [c25]Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich:
Verifikation Rekonfigurierbarer Scan-Netze. MBMV 2014: 137-146 - 2013
- [j5]Yuta Yamato, Kohei Miyase, Seiji Kajihara, Xiaoqing Wen, Laung-Terng Wang, Michael A. Kochte:
LCTI-SS: Low-Clock-Tree-Impact Scan Segmentation for Avoiding Shift Timing Failures in Scan Testing. IEEE Des. Test 30(4): 60-70 (2013) - [j4]Lars Bauer, Claus Braun, Michael E. Imhof, Michael A. Kochte, Eric Schneider, Hongyan Zhang, Jörg Henkel, Hans-Joachim Wunderlich:
Test Strategies for Reliable Runtime Reconfigurable Architectures. IEEE Trans. Computers 62(8): 1494-1507 (2013) - [c24]Dominik Erb, Michael A. Kochte, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker:
Accurate Multi-cycle ATPG in Presence of X-Values. Asian Test Symposium 2013: 245-250 - [c23]Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich:
Securing Access to Reconfigurable Scan Networks. Asian Test Symposium 2013: 295-300 - [c22]Stefan Hillebrecht, Michael A. Kochte, Dominik Erb, Hans-Joachim Wunderlich, Bernd Becker:
Accurate QBF-based test pattern generation in presence of unknown values. DATE 2013: 436-441 - [c21]Atefe Dalirsani, Michael A. Kochte, Hans-Joachim Wunderlich:
SAT-based code synthesis for fault-secure circuits. DFTS 2013: 39-44 - [c20]Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich:
Scan pattern retargeting and merging with reduced access time. ETS 2013: 1-7 - [c19]Hongyan Zhang, Lars Bauer, Michael A. Kochte, Eric Schneider, Claus Braun, Michael E. Imhof, Hans-Joachim Wunderlich, Jörg Henkel:
Module diversification: Fault tolerance and aging mitigation for runtime reconfigurable architectures. ITC 2013: 1-10 - 2012
- [j3]Michael A. Kochte, Melanie Elm, Hans-Joachim Wunderlich:
Accurate X-Propagation for Test Applications by SAT-Based Reasoning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(12): 1908-1919 (2012) - [c18]Lars Bauer, Claus Braun, Michael E. Imhof, Michael A. Kochte, Hongyan Zhang, Hans-Joachim Wunderlich, Jörg Henkel:
OTERA: Online test strategies for reliable reconfigurable architectures - Invited paper for the AHS-2012 special session "Dependability by reconfigurable hardware". AHS 2012: 38-45 - [c17]Stefan Hillebrecht, Michael A. Kochte, Hans-Joachim Wunderlich, Bernd Becker:
Exact stuck-at fault classification in presence of unknowns. ETS 2012: 1-6 - [c16]Mohamed Abdelfattah, Lars Bauer, Claus Braun, Michael E. Imhof, Michael A. Kochte, Hongyan Zhang, Jörg Henkel, Hans-Joachim Wunderlich:
Transparent structural online test for reconfigurable systems. IOLTS 2012: 37-42 - [c15]Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich:
Modeling, verification and pattern generation for reconfigurable scan networks. ITC 2012: 1-9 - 2011
- [j2]Rafal Baranowski, Stefano Di Carlo, Nadereh Hatami, Michael E. Imhof, Michael A. Kochte, Paolo Prinetto, Hans-Joachim Wunderlich, Christian G. Zoellin:
Efficient multi-level fault simulation of HW/SW systems for structural faults. Sci. China Inf. Sci. 54(9): 1784-1796 (2011) - [c14]Michael A. Kochte, Sandip Kundu, Kohei Miyase, Xiaoqing Wen, Hans-Joachim Wunderlich:
Efficient BDD-based Fault Simulation in Presence of Unknown Values. Asian Test Symposium 2011: 383-388 - [c13]Michael A. Kochte, Hans-Joachim Wunderlich:
SAT-based fault coverage evaluation in the presence of unknown values. DATE 2011: 1303-1308 - [c12]Michael A. Kochte, Kohei Miyase, Xiaoqing Wen, Seiji Kajihara, Yuta Yamato, Kazunari Enokimoto, Hans-Joachim Wunderlich:
SAT-based capture-power reduction for at-speed broadcast-scan-based test compression architectures. ISLPED 2011: 33-38 - [c11]Yuta Yamato, Xiaoqing Wen, Michael A. Kochte, Kohei Miyase, Seiji Kajihara, Laung-Terng Wang:
A novel scan segmentation design method for avoiding shift timing failure in scan testing. ITC 2011: 1-8 - [c10]Xiaoqing Wen, Kazunari Enokimoto, Kohei Miyase, Yuta Yamato, Michael A. Kochte, Seiji Kajihara, Patrick Girard, Mohammad Tehranipoor:
Power-aware test generation with guaranteed launch safety for at-speed scan testing. VTS 2011: 166-171 - 2010
- [j1]Michael A. Kochte, Christian G. Zoellin, Hans-Joachim Wunderlich:
Efficient Concurrent Self-Test with Partially Specified Patterns. J. Electron. Test. 26(5): 581-594 (2010) - [c9]Michael A. Kochte, Christian G. Zoellin, Rafal Baranowski, Michael E. Imhof, Hans-Joachim Wunderlich, Nadereh Hatami, Stefano Di Carlo, Paolo Prinetto:
Efficient Simulation of Structural Faults for the Reliability Evaluation at System-Level. Asian Test Symposium 2010: 3-8 - [c8]Melanie Elm, Michael A. Kochte, Hans-Joachim Wunderlich:
On Determining the Real Output Xs by SAT-Based Reasoning. Asian Test Symposium 2010: 39-44 - [c7]Michael A. Kochte, Marcel Schaal, Hans-Joachim Wunderlich, Christian G. Zoellin:
Efficient fault simulation on many-core processors. DAC 2010: 380-385 - [c6]Michael A. Kochte, Christian G. Zoellin, Rafal Baranowski, Michael E. Imhof, Hans-Joachim Wunderlich, Nadereh Hatami, Stefano Di Carlo, Paolo Prinetto:
System reliability evaluation using concurrent multi-level simulation of structural faults. ITC 2010: 817
2000 – 2009
- 2009
- [c5]Michael A. Kochte, Christian G. Zoellin, Michael E. Imhof, Rauf Salimi Khaligh, Martin Radetzki, Hans-Joachim Wunderlich, Stefano Di Carlo, Paolo Prinetto:
Test exploration and validation using transaction level models. DATE 2009: 1250-1253 - [c4]Michael A. Kochte, Christian G. Zoellin, Hans-Joachim Wunderlich:
Concurrent Self-Test with Partially Specified Patterns for Low Test Latency and Overhead. ETS 2009: 53-58 - [c3]Michael A. Kochte, Stefan Holst, Melanie Elm, Hans-Joachim Wunderlich:
Test Encoding for Extreme Response Compaction. ETS 2009: 155-160 - 2008
- [c2]Michael A. Kochte, Ramesh Natarajan:
A framework for scheduling parallel dbms user-defined programs on an attached high-performance computer. Conf. Computing Frontiers 2008: 97-104 - [c1]Michael A. Kochte, Christian G. Zoellin, Michael E. Imhof, Hans-Joachim Wunderlich:
Test Set Stripping Limiting the Maximum Number of Specified Bits. DELTA 2008: 581-586
Coauthor Index
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