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Pierce Chuang
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2020 – today
- 2024
- [c26]Ashish Shenoy, Sid Wang, Pierce Chuang, John Nguyen:
Now It Sounds Like You: Learning Personalized Vocabulary On Device. AAAI Spring Symposia 2024: 310-315 - [c25]Ashish Shenoy, Yichao Lu, Srihari Jayakumar, Debojeet Chatterjee, Mohsen Moslehpour, Pierce Chuang, Abhay Harpale, Vikas Bhardwaj, Di Xu, Shicong Zhao, Longfang Zhao, Ankit Ramchandani, Xin Luna Dong, Anuj Kumar:
Lumos: Empowering Multimodal LLMs with Scene Text Recognition. KDD 2024: 5690-5700 - [i12]Ashish Shenoy, Yichao Lu, Srihari Jayakumar, Debojeet Chatterjee, Mohsen Moslehpour, Pierce Chuang, Abhay Harpale, Vikas Bhardwaj, Di Xu, Shicong Zhao, Longfang Zhao, Ankit Ramchandani, Xin Luna Dong, Anuj Kumar:
Lumos : Empowering Multimodal LLMs with Scene Text Recognition. CoRR abs/2402.08017 (2024) - [i11]Mohsen Moslehpour, Yichao Lu, Pierce Chuang, Ashish Shenoy, Debojeet Chatterjee, Abhay Harpale, Srihari Jayakumar, Vikas Bhardwaj, Seonghyeon Nam, Anuj Kumar:
EgoQR: Efficient QR Code Reading in Egocentric Settings. CoRR abs/2410.05497 (2024) - 2023
- [c24]Ting-Wei Wu, Changsheng Zhao, Ernie Chang, Yangyang Shi, Pierce Chuang, Vikas Chandra, Biing-Hwang Juang:
Towards Zero-Shot Multilingual Transfer for Code-Switched Responses. ACL (1) 2023: 7551-7563 - [i10]Sid Wang, Ashish Shenoy, Pierce Chuang, John Nguyen:
Now It Sounds Like You: Learning Personalized Vocabulary On Device. CoRR abs/2305.03584 (2023) - 2022
- [c23]Haichuan Yang, Yuan Shangguan, Dilin Wang, Meng Li, Pierce Chuang, Xiaohui Zhang, Ganesh Venkatesh, Ozlem Kalinli, Vikas Chandra:
Omni-Sparsity DNN: Fast Sparsity Optimization for On-Device Streaming E2E ASR Via Supernet. ICASSP 2022: 8197-8201 - 2021
- [c22]Xiaofan Zhang, Dawei Wang, Pierce Chuang, Shugao Ma, Deming Chen, Yuecheng Li:
F-CAD: A Framework to Explore Hardware Accelerators for Codec Avatar Decoding. DAC 2021: 763-768 - [c21]Akshat Shrivastava, Pierce Chuang, Arun Babu, Shrey Desai, Abhinav Arora, Alexander Zotov, Ahmed Aly:
Span Pointer Networks for Non-Autoregressive Task-Oriented Semantic Parsing. EMNLP (Findings) 2021: 1873-1886 - [i9]Xiaofan Zhang, Dawei Wang, Pierce Chuang, Shugao Ma, Deming Chen, Yuecheng Li:
F-CAD: A Framework to Explore Hardware Accelerators for Codec Avatar Decoding. CoRR abs/2103.04958 (2021) - [i8]Akshat Shrivastava, Pierce Chuang, Arun Babu, Shrey Desai, Abhinav Arora, Alexander Zotov, Ahmed Aly:
Span Pointer Networks for Non-Autoregressive Task-Oriented Semantic Parsing. CoRR abs/2104.07275 (2021) - [i7]David Eriksson, Pierce I-Jen Chuang, Samuel Daulton, Peng Xia, Akshat Shrivastava, Arun Babu, Shicong Zhao, Ahmed Aly, Ganesh Venkatesh, Maximilian Balandat:
Latency-Aware Neural Architecture Search with Multi-Objective Bayesian Optimization. CoRR abs/2106.11890 (2021) - [i6]Dilin Wang, Yuan Shangguan, Haichuan Yang, Pierce Chuang, Jiatong Zhou, Meng Li, Ganesh Venkatesh, Ozlem Kalinli, Vikas Chandra:
Noisy Training Improves E2E ASR for the Edge. CoRR abs/2107.04677 (2021) - [i5]Haichuan Yang, Yuan Shangguan, Dilin Wang, Meng Li, Pierce Chuang, Xiaohui Zhang, Ganesh Venkatesh, Ozlem Kalinli, Vikas Chandra:
Omni-sparsity DNN: Fast Sparsity Optimization for On-Device Streaming E2E ASR via Supernet. CoRR abs/2110.08352 (2021) - 2020
- [c20]Ting-Wu Chin, Pierce I-Jen Chuang, Vikas Chandra, Diana Marculescu:
One Weight Bitwidth to Rule Them All. ECCV Workshops (5) 2020: 85-103 - [i4]Meng Li, Yilei Li, Pierce Chuang, Liangzhen Lai, Vikas Chandra:
Improving Efficiency in Neural Network Accelerator Using Operands Hamming Distance optimization. CoRR abs/2002.05293 (2020) - [i3]Ting-Wu Chin, Pierce I-Jen Chuang, Vikas Chandra, Diana Marculescu:
One Weight Bitwidth to Rule Them All. CoRR abs/2008.09916 (2020)
2010 – 2019
- 2019
- [j6]Christopher J. Berry, David Wolpert, Christos Vezyrtzis, Richard F. Rizzolo, Sean M. Carey, Yaniv Maroz, Hunter F. Shi, Dureseti Chidambarrao, Christian Jacobi, Anthony Saporito, Thomas Strach, Alper Buyuktosunoglu, Preetham Lobo, Pierce Chuang, Pawel Owczarczyk, Ramon Bertran, Tobias Webel, Phillip J. Restle:
IBM z14: Processor Characterization and Power Management for High-Reliability Mainframe Systems. IEEE J. Solid State Circuits 54(1): 121-132 (2019) - [c19]Jungwook Choi, Swagath Venkataramani, Vijayalakshmi Srinivasan, Kailash Gopalakrishnan, Zhuo Wang, Pierce Chuang:
Accurate and Efficient 2-bit Quantized Neural Networks. SysML 2019 - 2018
- [j5]Christopher J. Berry, James D. Warnock, John Badar, Dean G. Bair, Erwin Behnen, Brian Bell, Alper Buyuktosunoglu, Chris Cavitt, Pierce Chuang, Ofer Geva, Dina Hamid, John Isakson, Preetham Lobo, Frank Malgioglio, Guenter Mayer, José Luis Neves, Thomas Strach, Jesse Surprise, Christos Vezyrtzis, Tobias Webel, David Wolpert:
IBM z14 design methodology enhancements in the 14-nm technology node. IBM J. Res. Dev. 62(2/3): 9:1-9:12 (2018) - [j4]Christopher J. Gonzalez, Michael S. Floyd, Eric Fluhr, Phillip J. Restle, Daniel Dreps, Michael A. Sperling, Rahul M. Rao, David Hogenmiller, Christos Vezyrtzis, Pierce Chuang, Daniel Lewis, Ricardo Escobar, Vinod Ramadurai, Ryan Kruse, Juergen Pille, Ryan Nett, Pawel Owczarczyk, Joshua Friedrich, Jose Paredes, Timothy Diemoz, Md. Saiful Islam, Donald W. Plass, Paul Muench:
The 24-Core POWER9 Processor With Adaptive Clocking, 25-Gb/s Accelerator Links, and 16-Gb/s PCIe Gen4. IEEE J. Solid State Circuits 53(1): 91-101 (2018) - [c18]Shubham Jain, Swagath Venkataramani, Vijayalakshmi Srinivasan, Jungwook Choi, Pierce Chuang, Leland Chang:
Compensated-DNN: energy efficient low-precision deep neural networks by compensating quantization errors. DAC 2018: 38:1-38:6 - [c17]Dongsoo Lee, Daehyun Ahn, Taesu Kim, Pierce I-Jen Chuang, Jae-Joon Kim:
Viterbi-based Pruning for Sparse Matrix with Fixed and High Index Compression Ratio. ICLR (Poster) 2018 - [c16]Vijayalakshmi Srinivasan, Bruce M. Fleischer, Sunil Shukla, Matthew M. Ziegler, Joel Silberman, Jinwook Oh, Jungwook Choi, Silvia M. Mueller, Ankur Agrawal, Tina Babinsky, Nianzheng Cao, Chia-Yu Chen, Pierce Chuang, Thomas W. Fox, George Gristede, Michael Guillorn, Howard Haynie, Michael J. Klaiber, Dongsoo Lee, Shih-Hsien Lo, Gary W. Maier, Michael Scheuermann, Swagath Venkataramani, Christos Vezyrtzis, Naigang Wang, Fanchieh Yee, Ching Zhou, Pong-Fei Lu, Brian W. Curran, Leland Chang, Kailash Gopalakrishnan:
Across the Stack Opportunities for Deep Learning Acceleration. ISLPED 2018: 35:1-35:2 - [c15]Christos Vezyrtzis, Thomas Strach, Pierce I-Jen Chuang, Preetham Lobo, Richard F. Rizzolo, Tobias Webel, Pawel Owczarczyk, Alper Buyuktosunoglu, Ramon Bertran, David T. Hui, Susan M. Eickhoff, Michael S. Floyd, Gerard Salem, Sean M. Carey, Stelios G. Tsapepas, Phillip J. Restle:
Droop mitigation using critical-path sensors and an on-chip distributed power supply estimation engine in the z14™ enterprise processor. ISSCC 2018: 300-302 - [c14]Bruce M. Fleischer, Sunil Shukla, Matthew M. Ziegler, Joel Silberman, Jinwook Oh, Vijayalakshmi Srinivasan, Jungwook Choi, Silvia M. Mueller, Ankur Agrawal, Tina Babinsky, Nianzheng Cao, Chia-Yu Chen, Pierce Chuang, Thomas W. Fox, George Gristede, Michael Guillorn, Howard Haynie, Michael J. Klaiber, Dongsoo Lee, Shih-Hsien Lo, Gary W. Maier, Michael Scheuermann, Swagath Venkataramani, Christos Vezyrtzis, Naigang Wang, Fanchieh Yee, Ching Zhou, Pong-Fei Lu, Brian W. Curran, Leland Chang, Kailash Gopalakrishnan:
A Scalable Multi- TeraOPS Deep Learning Processor Core for AI Trainina and Inference. VLSI Circuits 2018: 35-36 - [i2]Jungwook Choi, Zhuo Wang, Swagath Venkataramani, Pierce I-Jen Chuang, Vijayalakshmi Srinivasan, Kailash Gopalakrishnan:
PACT: Parameterized Clipping Activation for Quantized Neural Networks. CoRR abs/1805.06085 (2018) - [i1]Jungwook Choi, Pierce I-Jen Chuang, Zhuo Wang, Swagath Venkataramani, Vijayalakshmi Srinivasan, Kailash Gopalakrishnan:
Bridging the Accuracy Gap for 2-bit Quantized Neural Networks (QNN). CoRR abs/1807.06964 (2018) - 2017
- [c13]Pierce I-Jen Chuang, Christos Vezyrtzis, Divya Pathak, Richard F. Rizzolo, Tobias Webel, Thomas Strach, Otto A. Torreiter, Preetham Lobo, Alper Buyuktosunoglu, Ramon Bertran, Michael S. Floyd, Malcolm S. Ware, Gerard Salem, Sean M. Carey, Phillip J. Restle:
26.2 Power supply noise in a 22nm z13™ microprocessor. ISSCC 2017: 438-439 - [c12]Michael S. Floyd, Phillip J. Restle, Michael A. Sperling, Pawel Owczarczyk, Eric J. Fluhr, Joshua Friedrich, Paul Muench, Timothy Diemoz, Pierce Chuang, Christos Vezyrtzis:
26.5 Adaptive clocking in the POWER9™ processor for voltage droop protection. ISSCC 2017: 444-445 - 2015
- [c11]Yaoqiang Li, Pierce I-Jen Chuang, Andrew A. Kennings, Manoj Sachdev:
An FPGA Implementation of a Timing-Error Tolerant Discrete Cosine Transform (Abstract Only). FPGA 2015: 266 - [c10]Yaoqiang Li, Pierce I-Jen Chuang, Andrew A. Kennings, Manoj Sachdev:
Voltage-Boosted Synchronizers. ACM Great Lakes Symposium on VLSI 2015: 307-312 - [c9]Pierce I-Jen Chuang, Manoj Sachdev, Vincent C. Gaudet:
VLSI implementation of high-throughput, low-energy, configurable MIMO detector. ICCD 2015: 535-542 - [c8]Yaoqiang Li, Pierce I-Jen Chuang, Andrew A. Kennings, Manoj Sachdev:
Runtime slack-deficit detection for a low-voltage DCT circuit. MWSCAS 2015: 1-4 - 2014
- [j3]Pierce I-Jen Chuang, Manoj Sachdev, Vincent C. Gaudet:
A 167-ps 2.34-mW Single-Cycle 64-Bit Binary Tree Comparator With Constant-Delay Logic in 65-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(1): 160-171 (2014) - 2013
- [j2]Pierce Chuang, David Li, Manoj Sachdev:
Constant Delay Logic Style. IEEE Trans. Very Large Scale Integr. Syst. 21(3): 554-565 (2013) - 2012
- [j1]Pierce Chuang, David Li, Manoj Sachdev:
A Low-Power High-Performance Single-Cycle Tree-Based 64-Bit Binary Comparator. IEEE Trans. Circuits Syst. II Express Briefs 59-II(2): 108-112 (2012) - [c7]Pierce Chuang, David Li, Manoj Sachdev, Vincent C. Gaudet:
A 148ps 135mW 64-bit adder with Constant-Delay logic in 65nm CMOS. CICC 2012: 1-4 - [c6]Tasreen Charania, Pierce Chuang, Ajoy Opal, Manoj Sachdev:
Suppression of on-chip power supply noise generated by a 64-bit static logic ALU block. VLSI-SoC 2012: 201-206 - 2011
- [c5]Tasreen Charania, Pierce Chuang, Ajoy Opal, Manoj Sachdev:
Analysis of power supply noise mitigation circuits. CCECE 2011: 1250-1255 - [c4]David Li, Pierce Chuang, David Nairn, Manoj Sachdev:
Design and analysis of metastable-hardened flip-flops in sub-threshold region. ISLPED 2011: 157-162 - [c3]David Li, David Rennie, Pierce Chuang, David Nairn, Manoj Sachdev:
Design and analysis of metastable-hardened and soft-error tolerant high-performance, low-power flip-flops. ISQED 2011: 583-590 - 2010
- [c2]David Li, Pierce Chuang, Manoj Sachdev:
Comparative analysis and study of metastability on high-performance flip-flops. ISQED 2010: 853-860
2000 – 2009
- 2009
- [c1]Pierce Chuang, David Li, Manoj Sachdev:
Design of a 64-bit Low-energy High-performance Adder using Dynamic Feedthrough Logic. ISCAS 2009: 3038-3041
Coauthor Index
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last updated on 2024-11-19 20:44 CET by the dblp team
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