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ORCIDChris Wilkerson
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- affiliation: Intel
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2020 – today
- 2023
[c37]Yujin Nam, Minxuan Zhou, Saransh Gupta, Gabrielle De Micheli, Rosario Cammarota, Chris Wilkerson, Daniele Micciancio, Tajana Rosing:
Efficient Machine Learning on Encrypted Data Using Hyperdimensional Computing. ISLPED 2023: 1-6- [i5]Minxuan Zhou, Yujin Nam, Pranav Gangwar, Weihong Xu, Arpan Dutta, Kartikeyan Subramanyam, Chris Wilkerson, Rosario Cammarota, Saransh Gupta, Tajana Rosing:
FHEmem: A Processing In-Memory Accelerator for Fully Homomorphic Encryption. CoRR abs/2311.16293 (2023)
2010 – 2019
- 2018
- [c36]Elvira Teran
, Zeshan Chishti, Zhe Wang, Chris Wilkerson, Daniel A. Jiménez:
Flexible associativity for DRAM caches. CF 2018: 88-96 - [c35]Jagadish B. Kotra, Haibo Zhang, Alaa R. Alameldeen, Chris Wilkerson, Mahmut T. Kandemir:
CHAMELEON: A Dynamically Reconfigurable Heterogeneous Memory System. MICRO 2018: 533-545 - [i4]Kevin K. Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu:
Reducing DRAM Refresh Overheads with Refresh-Access Parallelism. CoRR abs/1805.01289 (2018) - 2017
- [j9]Samira Manabi Khan, Chris Wilkerson, Donghyuk Lee, Alaa R. Alameldeen, Onur Mutlu:
A Case for Memory Content-Based Detection and Mitigation of Data-Dependent Failures in DRAM. IEEE Comput. Archit. Lett. 16(2): 88-93 (2017) - [c34]Jinchun Kim, Elvira Teran, Paul V. Gratz, Daniel A. Jiménez, Seth H. Pugsley, Chris Wilkerson:
Kill the Program Counter: Reconstructing Program Behavior in the Processor Cache Hierarchy. ASPLOS 2017: 737-749 - [c33]Samira Manabi Khan, Chris Wilkerson, Zhe Wang, Alaa R. Alameldeen, Donghyuk Lee, Onur Mutlu:
Detecting and mitigating data-dependent DRAM failures by exploiting current memory content. MICRO 2017: 27-40 - [i3]Kevin K. Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu:
Improving DRAM Performance by Parallelizing Refreshes with Accesses. CoRR abs/1712.07754 (2017) - 2016
- [c32]Jinchun Kim, Seth H. Pugsley, Paul V. Gratz, A. L. Narasimha Reddy, Chris Wilkerson, Zeshan Chishti:
Path confidence based lookahead prefetching. MICRO 2016: 60:1-60:12 - [i2]Kevin Kai-Wei Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu:
Reducing Performance Impact of DRAM Refresh by Parallelizing Refreshes with Accesses. CoRR abs/1601.06352 (2016) - [i1]Yoongu Kim, Ross Daly, Jeremie S. Kim, Chris Fallin, Ji-Hye Lee, Donghyuk Lee, Chris Wilkerson, Konrad Lai, Onur Mutlu:
RowHammer: Reliability Analysis and Security Implications. CoRR abs/1603.00747 (2016) - 2015
- [c31]Manjunath Shevgoor, Sahil Koladiya, Rajeev Balasubramonian, Chris Wilkerson, Seth H. Pugsley, Zeshan Chishti:
Efficiently prefetching complex address patterns. MICRO 2015: 141-152 - 2014
- [c30]Kevin Kai-Wei Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu:
Improving DRAM performance by parallelizing refreshes with accesses. HPCA 2014: 356-367 - [c29]Samira Manabi Khan, Alaa R. Alameldeen, Chris Wilkerson, Onur Mutlu, Daniel A. Jiménez:
Improving cache performance using read-write partitioning. HPCA 2014: 452-463 - [c28]Seth H. Pugsley, Zeshan Chishti, Chris Wilkerson, Peng-fei Chuang, Robert L. Scott, Aamer Jaleel, Shih-Lien Lu, Kingsum Chow, Rajeev Balasubramonian:
Sandbox Prefetching: Safe run-time evaluation of aggressive prefetchers. HPCA 2014: 626-637 - [c27]Chris Fallin, Chris Wilkerson, Onur Mutlu:
The heterogeneous block architecture. ICCD 2014: 386-393 - [c26]Yoongu Kim, Ross Daly, Jeremie S. Kim, Chris Fallin, Ji-Hye Lee, Donghyuk Lee, Chris Wilkerson, Konrad Lai, Onur Mutlu:
Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors. ISCA 2014: 361-372 - [c25]Jaewoong Sim, Alaa R. Alameldeen, Zeshan Chishti, Chris Wilkerson, Hyesoon Kim:
Transparent Hardware Management of Stacked DRAM as Part of Memory. MICRO 2014: 13-24 - [c24]Samira Manabi Khan, Donghyuk Lee, Yoongu Kim, Alaa R. Alameldeen, Chris Wilkerson, Onur Mutlu:
The efficacy of error mitigation techniques for DRAM retention failures: a comparative experimental study. SIGMETRICS 2014: 519-532 - 2013
- [c23]Samira Manabi Khan, Alaa R. Alameldeen, Chris Wilkerson, Jaydeep Kulkarni, Daniel A. Jiménez:
Improving multi-core performance using mixed-cell cache architecture. HPCA 2013: 119-130 - [c22]Jamie Liu, Ben Jaiyen, Yoongu Kim, Chris Wilkerson, Onur Mutlu:
An experimental study of data retention behavior in modern DRAM devices: implications for retention time profiling mechanisms. ISCA 2013: 60-71 - 2012
- [c21]Khubaib, M. Aater Suleman, Milad Hashemi, Chris Wilkerson, Yale N. Patt:
MorphCore: An Energy-Efficient Microarchitecture for High Performance ILP and High Throughput TLP. MICRO 2012: 305-316 - 2011
- [j8]Arijit Raychowdhury, Jim Tschanz, Keith A. Bowman, Shih-Lien Lu, Paolo A. Aseron, Muhammad M. Khellah, Bibiche M. Geuskens, Carlos Tokunaga, Chris Wilkerson, Tanay Karnik, Vivek De:
Error Detection and Correction in Microprocessor Core and Memory Due to Fast Dynamic Voltage Droops. IEEE J. Emerg. Sel. Topics Circuits Syst. 1(3): 208-217 (2011) - [j7]Keith A. Bowman, James W. Tschanz, Shih-Lien Lu, Paolo A. Aseron, Muhammad M. Khellah, Arijit Raychowdhury, Bibiche M. Geuskens, Carlos Tokunaga, Chris Wilkerson, Tanay Karnik, Vivek K. De:
A 45 nm Resilient Microprocessor Core for Dynamic Variation Tolerance. IEEE J. Solid State Circuits 46(1): 194-208 (2011) - [j6]Alaa R. Alameldeen, Zeshan Chishti, Chris Wilkerson, Wei Wu, Shih-Lien Lu:
Adaptive Cache Design to Enable Reliable Low-Voltage Operation. IEEE Trans. Computers 60(1): 50-63 (2011) - [c20]Alaa R. Alameldeen, Ilya Wagner, Zeshan Chishti, Wei Wu, Chris Wilkerson, Shih-Lien Lu:
Energy-efficient cache design using variable-strength error-correcting codes. ISCA 2011: 461-472 - 2010
- [c19]James W. Tschanz, Keith A. Bowman, Muhammad M. Khellah, Chris Wilkerson, Bibiche M. Geuskens, Dinesh Somasekhar, Arijit Raychowdhury, Jaydeep Kulkarni, Carlos Tokunaga, Shih-Lien Lu, Tanay Karnik, Vivek De:
Resilient design in scaled CMOS for energy efficiency. ASP-DAC 2010: 625 - [c18]Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chishti, Wei Wu, Dinesh Somasekhar, Shih-Lien Lu:
Reducing cache power with low-cost, multi-bit error-correcting codes. ISCA 2010: 83-93 - [c17]Keith A. Bowman, James W. Tschanz, Shih-Lien Lu, Paolo A. Aseron, Muhammad M. Khellah, Arijit Raychowdhury, Bibiche M. Geuskens, Carlos Tokunaga, Chris Wilkerson, Tanay Karnik, Vivek De:
Resilient microprocessor design for high performance & energy efficiency. ISLPED 2010: 355-356 - [c16]James W. Tschanz, Keith A. Bowman, Shih-Lien Lu, Paolo A. Aseron, Muhammad M. Khellah, Arijit Raychowdhury, Bibiche M. Geuskens, Carlos Tokunaga, Chris Wilkerson, Tanay Karnik, Vivek De:
A 45nm resilient and adaptive microprocessor core for dynamic variation tolerance. ISSCC 2010: 282-283
2000 – 2009
- 2009
- [j5]Keith A. Bowman, James W. Tschanz, Nam-Sung Kim, Janice C. Lee, Chris Wilkerson, Shih-Lien Lu, Tanay Karnik, Vivek K. De:
Energy-Efficient and Metastability-Immune Resilient Circuits for Dynamic Variation Tolerance. IEEE J. Solid State Circuits 44(1): 49-63 (2009) - [j4]Chris Wilkerson, Hongliang Gao, Alaa R. Alameldeen, Zeshan Chishti, Muhammad M. Khellah, Shih-Lien Lu:
Trading Off Cache Capacity for Low-Voltage Operation. IEEE Micro 29(1): 96-103 (2009) - [j3]Keith A. Bowman, Alaa R. Alameldeen, Srikanth T. Srinivasan, Chris Wilkerson:
Impact of Die-to-Die and Within-Die Parameter Variations on the Clock Frequency and Throughput of Multi-Core Processors. IEEE Trans. Very Large Scale Integr. Syst. 17(12): 1679-1690 (2009) - [c15]Keith A. Bowman, James W. Tschanz, Chris Wilkerson, Shih-Lien Lu, Tanay Karnik, Vivek De, Shekhar Y. Borkar:
Circuit techniques for dynamic variation tolerance. DAC 2009: 4-7 - [c14]James W. Tschanz, Keith A. Bowman, Chris Wilkerson, Shih-Lien Lu, Tanay Karnik:
Resilient circuits - Enabling energy-efficient performance and reliability. ICCAD 2009: 71-73 - [c13]Seung Eun Lee, Chris Wilkerson, Ming Zhang, Rajendra S. Yavatkar, Shih-Lien Lu, Nader Bagherzadeh:
Low power adaptive pipeline based on instruction isolation. ISQED 2009: 788-793 - [c12]Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Wei Wu, Shih-Lien Lu:
Improving cache lifetime reliability at ultra-low voltages. MICRO 2009: 89-99 - 2008
- [c11]Chris Wilkerson, Hongliang Gao, Alaa R. Alameldeen, Zeshan Chishti, Muhammad M. Khellah, Shih-Lien Lu:
Trading off Cache Capacity for Reliability to Enable Low Voltage Operation. ISCA 2008: 203-214 - [c10]Keith A. Bowman, James W. Tschanz, Nam-Sung Kim, Janice C. Lee, Chris Wilkerson, Shih-Lien Lu, Tanay Karnik, Vivek K. De:
Energy-Efficient and Metastability-Immune Timing-Error Detection and Instruction-Replay-Based Recovery Circuits for Dynamic-Variation Tolerance. ISSCC 2008: 402-403 - 2007
- [c9]Keith A. Bowman, Alaa R. Alameldeen, Srikanth T. Srinivasan, Chris Wilkerson:
Impact of die-to-die and within-die parameter variations on the throughput distribution of multi-core processors. ISLPED 2007: 50-55 - [c8]Shimin Chen, Phillip B. Gibbons, Michael Kozuch, Vasileios Liaskovitis, Anastassia Ailamaki, Guy E. Blelloch, Babak Falsafi, Limor Fix, Nikos Hardavellas, Todd C. Mowry, Chris Wilkerson:
Scheduling threads for constructive cache sharing on CMPs. SPAA 2007: 105-115 - 2006
- [c7]Vasileios Liaskovitis, Shimin Chen, Phillip B. Gibbons, Anastassia Ailamaki, Guy E. Blelloch, Babak Falsafi, Limor Fix, Nikos Hardavellas, Michael Kozuch, Todd C. Mowry, Chris Wilkerson:
Parallel depth first vs. work stealing schedulers on CMP architectures. SPAA 2006: 330 - 2005
- [j2]Chris Wilkerson, Jared Stark:
Guest Editors Introduction. J. Instr. Level Parallelism 7 (2005) - 2003
- [j1]Onur Mutlu, Jared Stark, Chris Wilkerson, Yale N. Patt:
Runahead Execution: An Effective Alternative to Large Instruction Windows. IEEE Micro 23(6): 20-25 (2003) - [c6]Onur Mutlu, Jared Stark, Chris Wilkerson, Yale N. Patt:
Runahead Execution: An Alternative to Very Large Instruction Windows for Out-of-Order Processors. HPCA 2003: 129-140 - [c5]Renju Thomas, Manoj Franklin, Chris Wilkerson, Jared Stark:
Improving Branch Prediction by Dynamic Dataflow-Based Identification of Correlated Branches from a Large Global History. ISCA 2003: 314-323 - 2002
- [c4]Edward Brekelbaum, Jeff Rupley, Chris Wilkerson, Bryan Black:
Hierarchical Scheduling Windows. MICRO 2002: 27-36 - 2001
- [c3]Srikanth T. Srinivasan, Roy Dz-Ching Ju, Alvin R. Lebeck, Chris Wilkerson:
Locality vs. criticality. ISCA 2001: 132-143
1990 – 1999
- 1998
- [c2]Sanjeev Kumar, Christopher B. Wilkerson:
Exploiting Spatial Locality in Data Caches Using Spatial Footprints. ISCA 1998: 357-368 - 1996
- [c1]Mikko H. Lipasti, Christopher B. Wilkerson, John Paul Shen:
Value Locality and Load Value Prediction. ASPLOS 1996: 138-147
Coauthor Index
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last updated on 2024-10-07 21:20 CEST by the dblp team
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