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2020 – today
- 2024
[j41]Andrei Bersatti
, Euna Kim, Hyesoon Kim:
Quantifying CO2 Emission Reduction Through Spatial Partitioning in Deep Learning Recommendation System Workloads. IEEE Micro 44(5): 75-82 (2024)- [j40]Ruobing Han, Jun Chen, Bhanu Garg, Xule Zhou, John Lu, Jeffrey Young, Jaewoong Sim, Hyesoon Kim:
CuPBoP: Making CUDA a Portable Language. ACM Trans. Design Autom. Electr. Syst. 29(4): 1-25 (2024) - [c105]Ruobing Han, Hyesoon Kim:
Exponentially Expanding the Phase-Ordering Search Space via Dormant Information. CC 2024: 250-261 - [c104]Ruobing Han, Jisheng Zhao, Hyesoon Kim:
Enabling Fine-Grained Incremental Builds by Making Compiler Stateful. CGO 2024: 221-232 - [c103]Blaise Tine, Hyesoon Kim:
Towards "True" GPU Performance Scaling for OpenGPU. HCS 2024: 1-10 - [c102]Seonjin Na, Geonhwa Jeong, Byung Hoon Ahn, Jeffrey Young, Tushar Krishna, Hyesoon Kim:
Understanding Performance Implications of LLM Inference on CPUs. IISWC 2024: 169-180 - [c101]Chihyo Ahn, Shinnung Jeong, Liam Paul Cooper, Nicholas Parnenzini, Hyesoon Kim:
Comparative Analysis of Executing GPU Applications on FPGA: HLS vs. Soft GPU Approaches. IPDPS (Workshops) 2024: 634-641 - [c100]Yuan Feng, Seonjin Na, Hyesoon Kim, Hyeran Jeon:
Barre Chord: Efficient Virtual Memory Translation for Multi-Chip-Module GPUs. ISCA 2024: 834-847 - [c99]Ruobing Han, Jisheng Zhao, Hyesoon Kim:
Unleashing CPU Potential for Executing GPU Programs Through Compiler/Runtime Optimizations. MICRO 2024: 186-200 - [i26]Gaurav Tarlok Kakkar, Jiashen Cao, Aubhro Sengupta, Joy Arulraj, Hyesoon Kim:
Hydro: Adaptive Query Processing of ML Queries. CoRR abs/2403.14902 (2024) - [i25]Ayush Gundawar, Euijun Chung, Hyesoon Kim:
Towards Performance-Aware Allocation for Accelerated Machine Learning on GPU-SSD Systems. CoRR abs/2412.04569 (2024) - 2023
- [j39]Anurag Kar, Xueyang Liu, Yonghae Kim, Gururaj Saileshwar, Hyesoon Kim, Tushar Krishna:
Mitigating Timing-Based NoC Side-Channel Attacks With LLC Remapping. IEEE Comput. Archit. Lett. 22(1): 53-56 (2023) - [j38]Yonghae Kim, Anurag Kar, Jaewon Lee, Jaekyu Lee, Hyesoon Kim:
Hardware-Assisted Code-Pointer Tagging for Forward-Edge Control-Flow Integrity. IEEE Comput. Archit. Lett. 22(2): 117-120 (2023) - [j37]Jiashen Cao, Rathijit Sen, Matteo Interlandi, Joy Arulraj, Hyesoon Kim:
GPU Database Systems Characterization and Optimization. Proc. VLDB Endow. 17(3): 441-454 (2023) - [c98]Blaise Tine, Varun Saxena, Santosh Srivatsan, Joshua R. Simpson, Fadi Alzammar, Liam Cooper, Hyesoon Kim:
Skybox: Open-Source Graphic Rendering on Programmable RISC-V GPUs. ASPLOS (3) 2023: 616-630 - [c97]Dheeraj Ramchandani, Bahar Asgari, Hyesoon Kim:
Spica: Exploring FPGA Optimizations to Enable an Efficient SpMV Implementation for Computations at Edge. EDGE 2023: 36-42 - [c96]Ramyad Hadidi, Jiashen Cao, Bahar Asgari, Hyesoon Kim:
Creating Robust Deep Neural Networks with Coded Distributed Computing for IoT. EDGE 2023: 126-132 - [c95]Ramyad Hadidi, Jiashen Cao, Michael S. Ryoo, Hyesoon Kim:
Reducing Inference Latency with Concurrent Architectures for Image Recognition at Edge. EDGE 2023: 245-254 - [c94]Ramyad Hadidi, Nima Shoghi Ghaleshahi, Bahar Asgari, Hyesoon Kim:
Context-Aware Task Handling in Resource-Constrained Robots with Virtualization. EDGE 2023: 255-261 - [c93]Geonhwa Jeong, Sana Damani, Abhimanyu Rajeshkumar Bambhaniya, Eric Qin, Christopher J. Hughes, Sreenivas Subramoney, Hyesoon Kim, Tushar Krishna:
VEGETA: Vertically-Integrated Extensions for Sparse/Dense GEMM Tile Acceleration on CPUs. HPCA 2023: 259-272 - [c92]Prasun Gera, Hyesoon Kim:
Traversing Large Compressed Graphs on GPUs. IPDPS 2023: 25-35 - [c91]Abhilash Dharmavarapu, Stefano Petrangeli, Jiashen Cao, Hyesoon Kim:
EHT-SR: An Entropy-Based Hybrid Approach for Faster Super-Resolution. ISM 2023: 69-78 - [c90]Euna Kim, Andrei Bersatti, Hyesoon Kim:
Extending the Life of Old Systems with More Memory. MEMSYS 2023: 18:1-18:3 - [c89]Ruobing Han, Jun Chen, Bhanu Garg, Jeffrey Young, Jaewoong Sim, Hyesoon Kim:
CuPBoP: A Framework to Make CUDA Portable. PPoPP 2023: 444-446 - [c88]Jun Chen, Xule Zhou, Hyesoon Kim:
CuPBoP-AMD: Extending CUDA to AMD Platforms. SC Workshops 2023: 1093-1104 - [c87]Sri Ranganathan Palaniappan, Varun Pateel, Sam Jijina, Jeffrey Young, Hyesoon Kim:
Unified Co-Simulation Framework for Autonomous UAVs. PEARC 2023: 474-477 - [i24]Jiashen Cao, Rathijit Sen, Matteo Interlandi, Joy Arulraj, Hyesoon Kim:
Revisiting Query Performance in GPU Database Systems. CoRR abs/2302.00734 (2023) - [i23]Geonhwa Jeong, Sana Damani, Abhimanyu Rajeshkumar Bambhaniya, Eric Qin, Christopher J. Hughes, Sreenivas Subramoney, Hyesoon Kim, Tushar Krishna:
VEGETA: Vertically-Integrated Extensions for Sparse/Dense GEMM Tile Acceleration on CPUs. CoRR abs/2302.08687 (2023) - [i22]Yonghae Kim, Anurag Kar, Jaewon Lee, Jaekyu Lee, Hyesoon Kim:
RV-CURE: A RISC-V Capability Architecture for Full Memory Safety. CoRR abs/2308.02945 (2023) - 2022
- [j36]Ruobing Han, Jaewon Lee, Jaewoong Sim, Hyesoon Kim:
COX : Exposing CUDA Warp-level Functions to CPUs. ACM Trans. Archit. Code Optim. 19(4): 59:1-59:25 (2022) - [c86]Bahar Asgari, Dheeraj Ramchandani, Amaan Marfatia, Hyesoon Kim:
Maia: Matrix Inversion Acceleration Near Memory. FPL 2022: 277-281 - [c85]Blaise Tine, Varun Saxena, Santosh Srivatsan, Joshua R. Simpson, Fadi Alzammar, Liam Paul Cooper, Sam Jijina, Swetha Rajagoplan, Tejaswini Anand Kumar, Jeffrey Young, Hyesoon Kim:
Accelerating Graphic Rendering on Programmable RISC-V GPUs. HCS 2022: 1-15 - [c84]Jaewon Lee, Yonghae Kim, Jiashen Cao, Euna Kim, Jaekyu Lee, Hyesoon Kim:
Securing GPU via region-based bounds checking. ISCA 2022: 27-41 - [c83]Jiashen Cao, Karan Sarkar, Ramyad Hadidi, Joy Arulraj, Hyesoon Kim:
FiGO: Fine-Grained Query Optimization in Video Analytics. SIGMOD Conference 2022: 559-572 - [i21]Ruobing Han, Jun Chen, Bhanu Garg, Jeffrey Young, Jaewoong Sim, Hyesoon Kim:
CuPBoP: CUDA for Parallelized and Broad-range Processors. CoRR abs/2206.07896 (2022) - 2021
- [j35]Nima Shoghi, Andrei Bersatti, Moinuddin K. Qureshi, Hyesoon Kim:
SmaQ: Smart Quantization for DNN Training by Exploiting Value Clustering. IEEE Comput. Archit. Lett. 20(2): 126-129 (2021) - [j34]Bahar Asgari, Ramyad Hadidi, Tushar Krishna, Hyesoon Kim, Sudhakar Yalamanchili:
Efficiently Solving Partial Differential Equations in a Partially Reconfigurable Specialized Hardware. IEEE Trans. Computers 70(4): 524-538 (2021) - [c82]Ramyad Hadidi, Bahar Asgari, Sam Jijina, Adriana Amyette, Nima Shoghi, Hyesoon Kim:
Quantifying the design-space tradeoffs in autonomous drones. ASPLOS 2021: 661-673 - [c81]Geonhwa Jeong, Eric Qin, Ananda Samajdar, Christopher J. Hughes, Sreenivas Subramoney, Hyesoon Kim, Tushar Krishna:
RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU. DAC 2021: 253-258 - [c80]Bahar Asgari, Ramyad Hadidi, Jiashen Cao, Da Eun Shim, Sung Kyu Lim, Hyesoon Kim:
FAFNIR: Accelerating Sparse Gathering by Using Efficient Near-Memory Intelligent Reduction. HPCA 2021: 908-920 - [c79]Bahar Asgari, Ramyad Hadidi, Joshua Dierberger, Charlotte Steinichen, Amaan Marfatia, Hyesoon Kim:
Copernicus: Characterizing the Performance Implications of Compression Formats Used in Sparse Workloads. IISWC 2021: 1-12 - [c78]Blaise Tine, Krishna Praveen Yalamarthy, Fares Elsabbagh, Hyesoon Kim:
Vortex: Extending the RISC-V ISA for GPGPU and 3D-Graphics. MICRO 2021: 754-766 - [i20]Jiashen Cao, Ramyad Hadidi, Joy Arulraj, Hyesoon Kim:
THIA: Accelerating Video Analytics using Early Inference and Fine-Grained Query Planning. CoRR abs/2102.08481 (2021) - [i19]Ramyad Hadidi, Jiashen Cao, Hyesoon Kim:
Creating Robust Deep Neural Networks With Coded Distributed Computing for IoT Systems. CoRR abs/2104.04447 (2021) - [i18]Ramyad Hadidi, Nima Shoghi Ghaleshahi, Bahar Asgari, Hyesoon Kim:
Context-Aware Task Handling in Resource-Constrained Robots with Virtualization. CoRR abs/2104.04563 (2021) - [i17]Ruobing Han, Blaise Tine, Jaewon Lee, Jaewoong Sim, Hyesoon Kim:
Supporting CUDA for an extended RISC-V GPU architecture. CoRR abs/2109.00673 (2021) - [i16]Geonhwa Jeong, Eric Qin, Ananda Samajdar, Christopher J. Hughes, Sreenivas Subramoney, Hyesoon Kim, Tushar Krishna:
RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU. CoRR abs/2110.01752 (2021) - [i15]Blaise Tine, Fares Elsabbagh, Krishna Praveen Yalamarthy, Hyesoon Kim:
Vortex: Extending the RISC-V ISA for GPGPU and 3D-GraphicsResearch. CoRR abs/2110.10857 (2021) - [i14]Ruobing Han, Jaewon Lee, Jaewoong Sim, Hyesoon Kim:
COX: CUDA on X86 by Exposing Warp-Level Functions to CPUs. CoRR abs/2112.10034 (2021) - 2020
- [j33]Ramyad Hadidi, Jiashen Cao, Michael S. Ryoo, Hyesoon Kim:
Toward Collaborative Inferencing of Deep Neural Networks on Internet-of-Things Devices. IEEE Internet Things J. 7(6): 4950-4960 (2020) - [j32]Hyesoon Kim:
The 2019 Top Picks in Computer Architecture. IEEE Micro 40(3): 6-9 (2020) - [j31]Prasun Gera, Hyojong Kim, Piyush Sao, Hyesoon Kim, David A. Bader:
Traversing Large Graphs on GPUs with Unified Memory. Proc. VLDB Endow. 13(7): 1119-1133 (2020) - [c77]Hyojong Kim, Jaewoong Sim, Prasun Gera, Ramyad Hadidi, Hyesoon Kim:
Batch-Aware Unified Memory Management in GPUs for Irregular Workloads. ASPLOS 2020: 1357-1370 - [c76]Bahar Asgari, Ramyad Hadidi, Nima Shoghi Ghaleshahi, Hyesoon Kim:
PISCES: Power-Aware Implementation of SLAM by Customizing Efficient Sparse Algebra. DAC 2020: 1-6 - [c75]Blaise-Pascal Tine, Sudhakar Yalamanchili, Hyesoon Kim:
Tango: An Optimizing Compiler for Just-In-Time RTL Simulation. DATE 2020: 157-162 - [c74]Bahar Asgari, Ramyad Hadidi, Hyesoon Kim:
ASCELLA: Accelerating Sparse Computation by Enabling Stream Accesses to Memory. DATE 2020: 318-321 - [c73]Bahar Asgari, Ramyad Hadidi, Hyesoon Kim:
Proposing a Fast and Scalable Systolic Array for Matrix Multiplication. FCCM 2020: 204 - [c72]Blaise Tine, Seyong Lee, Jeffrey S. Vetter, Hyesoon Kim:
Productive Hardware Designs using Hybrid HLS-RTL Development. FPGA 2020: 311 - [c71]Blaise Tine, Fares Elsabbagh, Seyong Lee, Jeffrey S. Vetter, Hyesoon Kim:
Cash: A Single-Source Hardware-Software Codesign Framework for Rapid Prototyping. FPGA 2020: 321 - [c70]Jaewon Lee, Hanning Chen, Jeffrey S. Young, Hyesoon Kim:
RISC-V FPGA Platform Toward ROS-Based Robotics Application. FPL 2020: 370 - [c69]Bahar Asgari, Ramyad Hadidi, Tushar Krishna, Hyesoon Kim, Sudhakar Yalamanchili:
ALRESCHA: A Lightweight Reconfigurable Sparse-Computation Accelerator. HPCA 2020: 249-260 - [c68]Bahar Asgari, Ramyad Hadidi, Hyesoon Kim:
MEISSA: Multiplying Matrices Efficiently in a Scalable Systolic Architecture. ICCD 2020: 130-137 - [c67]Sam Jijina, Adriana Amyette, Nima Shoghi Ghaleshahi, Ramyad Hadidi, Hyesoon Kim:
Understanding the Software and Hardware Stacks of a General-Purpose Cognitive Drone. ISPASS 2020: 212-214 - [c66]Pranith Kumar, Hyesoon Kim:
Parallel Hash Table Design for NDP Systems. MEMSYS 2020: 39-45 - [c65]Euna Kim, Hyesoon Kim:
Things to Consider to Enable Dynamic Graphs in Processing-in-Memory. MEMSYS 2020: 297-303 - [c64]Andrei Bersatti, Nima Shoghi, Hyesoon Kim:
Neural Network Weight Compression with NNW-BDI. MEMSYS 2020: 335-340 - [c63]Yonghae Kim, Jaekyu Lee, Hyesoon Kim:
Hardware-based Always-On Heap Memory Safety. MICRO 2020: 1153-1166 - [e1]Vivek Sarkar, Hyesoon Kim:
PACT '20: International Conference on Parallel Architectures and Compilation Techniques, Virtual Event, GA, USA, October 3-7, 2020. ACM 2020, ISBN 978-1-4503-8075-1 [contents] - [i13]Fares Elsabbagh, Blaise Tine, Priyadarshini Roshan, Ethan Lyons, Euna Kim, Da Eun Shim, Lingjun Zhu, Sung Kyu Lim, Hyesoon Kim:
Vortex: OpenCL Compatible RISC-V GPGPU. CoRR abs/2002.12151 (2020) - [i12]Ramyad Hadidi, Bahar Asgari, Jiashen Cao, Younmin Bae, Hyojong Kim, Michael S. Ryoo, Hyesoon Kim:
Edge-Tailored Perception: Fast Inferencing in-the-Edge with Efficient Model Distribution. CoRR abs/2003.06464 (2020) - [i11]Ramyad Hadidi, Jiashen Cao, Michael S. Ryoo, Hyesoon Kim:
Reducing Inference Latency with Concurrent Architectures for Image Recognition. CoRR abs/2011.07092 (2020) - [i10]Nima Shoghi Ghaleshahi, Ramyad Hadidi, Jaewon Lee, Jun Chen, Arthur Siqueira, Rahul Rajan, Shaan Dhawan, Pooya Shoghi Ghalehshahi, Hyesoon Kim:
Secure Location-Aware Authentication and Communication for Intelligent Transportation Systems. CoRR abs/2011.08936 (2020) - [i9]Bahar Asgari, Ramyad Hadidi, Joshua Dierberger, Charlotte Steinichen, Hyesoon Kim:
Copernicus: Characterizing the Performance Implications of Compression Formats Used in Sparse Workloads. CoRR abs/2011.10932 (2020)
2010 – 2019
- 2019
- [j30]Lifeng Nai, Ramyad Hadidi, He Xiao, Hyojong Kim, Jaewoong Sim, Hyesoon Kim:
Thermal-aware processing-in-memory instruction offloading. J. Parallel Distributed Comput. 130: 193-207 (2019) - [j29]Bahar Asgari, Ramyad Hadidi, Hyesoon Kim, Sudhakar Yalamanchili:
ERIDANUS: Efficiently Running Inference of DNNs Using Systolic Arrays. IEEE Micro 39(5): 46-54 (2019) - [c62]Blaise-Pascal Tine, Sudhakar Yalamanchili, Hyesoon Kim, Jeffrey S. Vetter:
POSTER: Tango: An Optimizing Compiler for Just-In-Time RTL Simulation. PACT 2019: 481-482 - [c61]Yonghae Kim, Hyesoon Kim:
Translating CUDA to OpenCL for Hardware Generation using Neural Machine Translation. CGO 2019: 285-286 - [c60]Jiashen Cao, Ramyad Hadidi, Joy Arulraj, Hyesoon Kim:
Video analytics from edge to server: work-in-progress. CODES+ISSS 2019: 14:1-14:2 - [c59]Jie Zhang, Miryeong Kwon, Hyojong Kim, Hyesoon Kim, Myoungsoo Jung:
FlashGPU: Placing New Flash Next to GPU Cores. DAC 2019: 156 - [c58]Bahar Asgari, Ramyad Hadidi, Hyesoon Kim, Sudhakar Yalamanchili:
LODESTAR: Creating Locally-Dense CNNs for Efficient Inference on Systolic Arrays. DAC 2019: 233 - [c57]Ramyad Hadidi, Jiashen Cao, Michael S. Ryoo, Hyesoon Kim:
Robustly Executing DNNs in IoT Systems Using Coded Distributed Computing. DAC 2019: 234 - [c56]Younmin Bae, Ramyad Hadidi, Bahar Asgari, Jiashen Cao, Hyesoon Kim:
Capella: Customizing Perception for Edge Devices by Efficiently Allocating FPGAs to DNNs. FPL 2019: 421 - [c55]Ramyad Hadidi, Jiashen Cao, Yilun Xie, Bahar Asgari, Tushar Krishna, Hyesoon Kim:
Characterizing the Deployment of Deep Neural Networks on Commercial Edge Devices. IISWC 2019: 35-48 - [c54]Joo Hwan Lee, Hyesoon Kim:
Empirical Investigation of Stale Value Tolerance on Parallel RNN Training. ISPASS 2019: 153-164 - [c53]Matthew L. Merck, Bingyao Wang, Lixing Liu, Chunjun Jia, Arthur Siqueira, Qiusen Huang, Abhijeet Saraha, Dongsuk Lim, Jiashen Cao, Ramyad Hadidi, Hyesoon Kim:
Characterizing the Execution of Deep Neural Networks on Collaborative Robots and Edge Devices. PEARC 2019: 65:1-65:6 - [i8]Ramyad Hadidi, Jiashen Cao, Michael S. Ryoo, Hyesoon Kim:
Collaborative Execution of Deep Neural Networks on Internet of Things Devices. CoRR abs/1901.02537 (2019) - [i7]Yonghae Kim, Hyesoon Kim:
A Case Study: Exploiting Neural Machine Translation to Translate CUDA to OpenCL. CoRR abs/1905.07653 (2019) - 2018
- [j28]Ramyad Hadidi, Jiashen Cao, Matthew Woodward, Michael S. Ryoo, Hyesoon Kim:
Distributed Perception by Collaborative Robots. IEEE Robotics Autom. Lett. 3(4): 3709-3716 (2018) - [j27]Hyojong Kim, Ramyad Hadidi, Lifeng Nai, Hyesoon Kim, Nuwan Jayasena, Yasuko Eckert, Onur Kayiran, Gabriel H. Loh:
CODA: Enabling Co-location of Computation and Data for Multiple GPU Systems. ACM Trans. Archit. Code Optim. 15(3): 32:1-32:23 (2018) - [j26]Joo Hwan Lee, Hyesoon Kim:
StaleLearn: Learning Acceleration with Asynchronous Synchronization Between Model Replicas on PIM. IEEE Trans. Computers 67(6): 861-873 (2018) - [c52]Ramyad Hadidi, Jiashen Cao, Matthew Woodward, Michael S. Ryoo, Hyesoon Kim:
Real-Time Image Recognition Using Collaborative IoT Devices. ReQuEST@ASPLOS 2018: 4 - [c51]Lifeng Nai, Ramyad Hadidi, He Xiao, Hyojong Kim, Jaewoong Sim, Hyesoon Kim:
CoolPIM: Thermal-Aware Source Throttling for Efficient PIM Instruction Offloading. IPDPS 2018: 680-689 - [c50]Ramyad Hadidi, Bahar Asgari, Jeffrey S. Young, Burhan Ahmad Mudassar, Kartikay Garg, Tushar Krishna, Hyesoon Kim:
Performance Implications of NoCs on 3D-Stacked Memories: Insights from the Hybrid Memory Cube. ISPASS 2018: 99-108 - [c49]Prasun Gera, Hyojong Kim, Hyesoon Kim, Sunpyo Hong, Vinod George, Chi-Keung Luk:
Performance Characterisation and Simulation of Intel's Integrated GPU Architecture. ISPASS 2018: 139-148 - [i6]Ramyad Hadidi, Jiashen Cao, Matthew Woodward, Michael S. Ryoo, Hyesoon Kim:
Musical Chair: Efficient Real-Time Recognition Using Collaborative IoT Devices. CoRR abs/1802.02138 (2018) - 2017
- [j25]Lifeng Nai, Yinglong Xia, Ilie Gabriel Tanase, Hyesoon Kim:
Exploring big graph computing - An empirical study from architectural perspective. J. Parallel Distributed Comput. 108: 122-137 (2017) - [j24]Ramyad Hadidi, Lifeng Nai, Hyojong Kim, Hyesoon Kim:
CAIRO: A Compiler-Assisted Technique for Enabling Instruction-Level Offloading of Processing-In-Memory. ACM Trans. Archit. Code Optim. 14(4): 48:1-48:25 (2017) - [c48]Lifeng Nai, Ramyad Hadidi, Jaewoong Sim, Hyojong Kim, Pranith Kumar, Hyesoon Kim:
GraphPIM: Enabling Instruction-Level PIM Offloading in Graph Computing Frameworks. HPCA 2017: 457-468 - [c47]Ramyad Hadidi, Bahar Asgari, Burhan Ahmad Mudassar, Saibal Mukhopadhyay, Sudhakar Yalamanchili, Hyesoon Kim:
Demystifying the characteristics of 3D-stacked memories: A case study for Hybrid Memory Cube. IISWC 2017: 66-75 - [c46]Jen-Cheng Huang, Lifeng Nai, Pranith Kumar, Hyojong Kim, Hyesoon Kim:
SimProf: A Sampling Framework for Data Analytic Workloads. IPDPS 2017: 595-604 - [c45]Chad D. Kersey, Hyesoon Kim, Sudhakar Yalamanchili:
Lightweight SIMT core designs for intelligent 3D stacked DRAM. MEMSYS 2017: 49-59 - [c44]Sangho Lee, Ming-Wei Shih, Prasun Gera, Taesoo Kim, Hyesoon Kim, Marcus Peinado:
Inferring Fine-grained Control Flow Inside SGX Enclaves with Branch Shadowing. USENIX Security Symposium 2017: 557-574 - [i5]Ramyad Hadidi, Bahar Asgari, Burhan Ahmad Mudassar, Saibal Mukhopadhyay, Sudhakar Yalamanchili, Hyesoon Kim:
Demystifying the Characteristics of 3D-Stacked Memories: A Case Study for Hybrid Memory Cube. CoRR abs/1706.02725 (2017) - [i4]Ramyad Hadidi, Bahar Asgari, Jeffrey S. Young, Burhan Ahmad Mudassar, Kartikay Garg, Tushar Krishna, Hyesoon Kim:
Performance Implications of NoCs on 3D-Stacked Memories: Insights from the Hybrid Memory Cube. CoRR abs/1707.05399 (2017) - [i3]Hyojong Kim, Ramyad Hadidi, Lifeng Nai, Hyesoon Kim, Nuwan Jayasena, Yasuko Eckert, Onur Kayiran, Gabriel H. Loh:
CODA: Enabling Co-location of Computation and Data for Near-Data Processing. CoRR abs/1710.09517 (2017) - [i2]Pranith Kumar, Prasun Gera, Hyojong Kim, Hyesoon Kim:
Louvre: Light-weight Ordering Using Versioning for Release Consistency. CoRR abs/1710.10746 (2017) - 2016
- [j23]Vijay Janapa Reddi, Hyesoon Kim:
On the Internet of Things. IEEE Micro 36(6): 5-7 (2016) - [c43]Pranith Kumar, Lifeng Nai, Hyesoon Kim:
Analyzing Consistency Issues in HMC Atomics. MEMSYS 2016: 151-152 - [i1]Sangho Lee, Ming-Wei Shih, Prasun Gera, Taesoo Kim, Hyesoon Kim, Marcus Peinado:
Inferring Fine-grained Control Flow Inside SGX Enclaves with Branch Shadowing. CoRR abs/1611.06952 (2016) - 2015
- [j22]Dilan Manatunga, Joo Hwan Lee, Hyesoon Kim:
Hardware Support for Safe Execution of Native Client Applications. IEEE Comput. Archit. Lett. 14(1): 37-40 (2015) - [j21]Hyojong Kim, Hong-Yeol Lim, Dilan Manatunga, Hyesoon Kim, Giho Park:
Accelerating Application Start-up with Nonvolatile Memory in Android Systems. IEEE Micro 35(1): 15-25 (2015) - [j20]Dilan Manatunga, Hyesoon Kim, Saibal Mukhopadhyay:
SP-CNN: A Scalable and Programmable CNN-Based Accelerator. IEEE Micro 35(5): 42-50 (2015) - [j19]Joo Hwan Lee, Nimit Nigania, Hyesoon Kim, Kaushik Patel, Hyojong Kim:
OpenCL Performance Evaluation on Modern Multicore CPUs. Sci. Program. 2015: 859491:1-859491:20 (2015) - [j18]Nagesh B. Lakshminarayana, Hyesoon Kim:
Block-Precise Processors: Low-Power Processors with Reduced Operand Store Accesses and Result Broadcasts. IEEE Trans. Computers 64(11): 3102-3114 (2015) - [j17]Jaekyu Lee, Dong Hyuk Woo, Hyesoon Kim, Mani Azimi:
GREEN Cache: Exploiting the Disciplined Memory Model of OpenCL on GPUs. IEEE Trans. Computers 64(11): 3167-3180 (2015) - [c42]Joo Hwan Lee, Jaewoong Sim, Hyesoon Kim:
BSSync: Processing Near Memory for Machine Learning Workloads with Bounded Staleness Consistency Models. PACT 2015: 241-252 - [c41]Chad D. Kersey, Sudhakar Yalamanchili, Hyesoon Kim:
SIMT-based Logic Layers for Stacked DRAM Architectures: A Prototype. MEMSYS 2015: 29-30 - [c40]Lifeng Nai, Hyesoon Kim:
Instruction Offloading with HMC 2.0 Standard: A Case Study for Graph Traversals. MEMSYS 2015: 258-261 - [c39]Hyojong Kim, Hyesoon Kim, Sudhakar Yalamanchili, Arun F. Rodrigues:
Understanding Energy Aspects of Processing-near-Memory for HPC Workloads. MEMSYS 2015: 276-282 - [c38]Lifeng Nai, Yinglong Xia, Ilie Gabriel Tanase, Hyesoon Kim, Ching-Yung Lin:
GraphBIG: understanding graph computing in the context of industrial solutions. SC 2015: 69:1-69:12 - 2014
- [j16]Jieun Lim, Nagesh B. Lakshminarayana, Hyesoon Kim, William J. Song, Sudhakar Yalamanchili, Wonyong Sung:
Power Modeling for GPU Architectures Using McPAT. ACM Trans. Design Autom. Electr. Syst. 19(3): 26:1-26:24 (2014) - [c37]Chad D. Kersey, Sudhakar Yalamanchili, Hyojong Kim, Nimit Nigania, Hyesoon Kim:
Harmonica: An FPGA-Based Data Parallel Soft Core. FCCM 2014: 171 - [c36]Nagesh B. Lakshminarayana, Hyesoon Kim:
Spare register aware prefetching for graph algorithms on GPUs. HPCA 2014: 614-625 - [c35]Jen-Cheng Huang, Lifeng Nai, Hyesoon Kim, Hsien-Hsin S. Lee:
TBPoint: Reducing Simulation Time for Large-Scale GPGPU Kernels. IPDPS 2014: 437-446 - [c34]Jaewoong Sim, Alaa R. Alameldeen, Zeshan Chishti, Chris Wilkerson, Hyesoon Kim:
Transparent Hardware Management of Stacked DRAM as Part of Memory. MICRO 2014: 13-24 - [c33]Jen-Cheng Huang, Joo Hwan Lee, Hyesoon Kim, Hsien-Hsin S. Lee:
GPUMech: GPU Performance Modeling Technique Based on Interval Analysis. MICRO 2014: 268-279 - [c32]Jieun Lim, Hyesoon Kim:
Design Space Exploration of Memory Model for Heterogeneous Computing. SBAC-PAD 2014: 160-167 - 2013
- [j15]Jaekyu Lee, Si Li, Hyesoon Kim, Sudhakar Yalamanchili:
Design space exploration of on-chip ring interconnection for a CPU-GPU heterogeneous architecture. J. Parallel Distributed Comput. 73(12): 1525-1538 (2013) - [j14]Minjang Kim, Nagesh B. Lakshminarayana, Hyesoon Kim, Chi-Keung Luk:
SD3: An Efficient Dynamic Data-Dependence Profiling Mechanism. IEEE Trans. Computers 62(12): 2516-2530 (2013) - [j13]Jaekyu Lee, Si Li, Hyesoon Kim, Sudhakar Yalamanchili:
Adaptive virtual channel partitioning for network-on-chip in heterogeneous architectures. ACM Trans. Design Autom. Electr. Syst. 18(4): 48:1-48:28 (2013) - [c31]Joo Hwan Lee, Kaushik Patel, Nimit Nigania, Hyojong Kim, Hyesoon Kim:
OpenCL Performance Evaluation on Modern Multi Core CPUs. IPDPS Workshops 2013: 1177-1185 - [c30]Bevin Brett, Pranith Kumar, Minjang Kim, Hyesoon Kim:
CHiP: A Profiler to Measure the Effect of Cache Contention on Scalability. IPDPS Workshops 2013: 1565-1574 - [c29]Joo Hwan Lee, Jiayuan Meng, Hyesoon Kim:
SESH Framework: A Space Exploration Framework for GPU Application and Hardware Codesign. PMBS@SC 2013: 182-202 - 2012
- [b1]Hyesoon Kim, Richard W. Vuduc, Sara S. Baghsorkhi, JeeWhan Choi, Wen-mei W. Hwu:
Performance Analysis and Tuning for General Purpose Graphics Processing Units (GPGPU). Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers 2012, ISBN 978-3-031-00609-8 - [j12]Nagesh B. Lakshminarayana, Jaekyu Lee, Hyesoon Kim, Jinwoo Shin:
DRAM Scheduling Policy for GPGPU Architectures Based on a Potential Function. IEEE Comput. Archit. Lett. 11(2): 33-36 (2012) - [j11]Jaekyu Lee, Hyesoon Kim, Richard W. Vuduc:
When Prefetching Works, When It Doesn't, and Why. ACM Trans. Archit. Code Optim. 9(1): 2:1-2:29 (2012) - [c28]Jaekyu Lee, Hyesoon Kim:
TAP: A TLP-aware cache management policy for a CPU-GPU heterogeneous architecture. HPCA 2012: 91-102 - [c27]Minjang Kim, Pranith Kumar, Hyesoon Kim, Bevin Brett:
Predicting Potential Speedup of Serial Code via Lightweight Profiling and Emulations with Memory Performance Model. IPDPS 2012: 1318-1329 - [c26]Jaewoong Sim, Jaekyu Lee, Moinuddin K. Qureshi, Hyesoon Kim:
FLEXclusion: Balancing cache capacity and on-chip bandwidth via Flexible Exclusion. ISCA 2012: 321-332 - [c25]Jaewoong Sim, Gabriel H. Loh, Hyesoon Kim, Mike O'Connor, Mithuna Thottethodi:
A Mostly-Clean DRAM Cache for Effective Hit Speculation and Self-Balancing Dispatch. MICRO 2012: 247-257 - [c24]Hyesoon Kim:
Supporting virtual memory in GPGPU without supporting precise exceptions. MSPC 2012: 70-71 - [c23]Jieun Lim, Hyesoon Kim:
Design space exploration of memory model for heterogeneous computing. MSPC 2012: 74-75 - [c22]Jaewoong Sim, Aniruddha Dasgupta, Hyesoon Kim, Richard W. Vuduc:
A performance analysis framework for identifying potential benefits in GPGPU applications. PPoPP 2012: 11-22 - 2010
- [c21]Dongwon Lee, Marilyn Wolf, Hyesoon Kim:
Design space exploration of the turbo decoding algorithm on GPUs. CASES 2010: 217-226 - [c20]Sunpyo Hong, Hyesoon Kim:
An integrated GPU power and performance model. ISCA 2010: 280-289 - [c19]Jaekyu Lee, Nagesh B. Lakshminarayana, Hyesoon Kim, Richard W. Vuduc:
Many-Thread Aware Prefetching Mechanisms for GPGPU Applications. MICRO 2010: 213-224 - [c18]Minjang Kim, Hyesoon Kim, Chi-Keung Luk:
SD3: A Scalable Approach to Dynamic Data-Dependence Profiling. MICRO 2010: 535-546
2000 – 2009
- 2009
- [j10]Hyesoon Kim, José A. Joao, Onur Mutlu, Chang Joo Lee, Yale N. Patt, Robert Cohn:
Virtual Program Counter (VPC) Prediction: Very Low Cost Indirect Branch Prediction Using Conditional Branch Prediction Hardware. IEEE Trans. Computers 58(9): 1153-1170 (2009) - [c17]Sunpyo Hong, Hyesoon Kim:
An analytical model for a GPU architecture with memory-level and thread-level parallelism awareness. ISCA 2009: 152-163 - [c16]Chi-Keung Luk, Sunpyo Hong, Hyesoon Kim:
Qilin: exploiting parallelism on heterogeneous multiprocessors with adaptive mapping. MICRO 2009: 45-55 - [c15]Nagesh B. Lakshminarayana, Jaekyu Lee, Hyesoon Kim:
Age based scheduling for asymmetric multiprocessors. SC 2009 - 2008
- [j9]José A. Joao, Onur Mutlu, Hyesoon Kim, Yale N. Patt:
Dynamic Predication of Indirect Jumps. IEEE Comput. Archit. Lett. 7(1): 1-4 (2008) - [c14]José A. Joao, Onur Mutlu, Hyesoon Kim, Rishi Agarwal, Yale N. Patt:
Improving the performance of object-oriented languages with dynamic predication of indirect jumps. ASPLOS 2008: 80-90 - [c13]Chang Joo Lee, Hyesoon Kim, Onur Mutlu, Yale N. Patt:
Performance-aware speculation control using wrong path usefulness prediction. HPCA 2008: 39-49 - [c12]Nagesh B. Lakshminarayana, Hyesoon Kim:
Understanding performance, power and energy behavior in asymmetric multiprocessors. ICCD 2008: 471-477 - 2007
- [j8]José A. Joao, Onur Mutlu, Hyesoon Kim, Yale N. Patt:
Dynamic Predication of Indirect Jumps. IEEE Comput. Archit. Lett. 6(2): 25-28 (2007) - [j7]Hyesoon Kim, José A. Joao, Onur Mutlu, Yale N. Patt:
Diverge-Merge Processor: Generalized and Energy-Efficient Dynamic Predication. IEEE Micro 27(1): 94-104 (2007) - [c11]Hyesoon Kim, José A. Joao, Onur Mutlu, Yale N. Patt:
Profile-assisted Compiler Support for Dynamic Predication in Diverge-Merge Processors. CGO 2007: 367-378 - [c10]Santhosh Srinath, Onur Mutlu, Hyesoon Kim, Yale N. Patt:
Feedback Directed Prefetching: Improving the Performance and Bandwidth-Efficiency of Hardware Prefetchers. HPCA 2007: 63-74 - [c9]Hyesoon Kim, José A. Joao, Onur Mutlu, Chang Joo Lee, Yale N. Patt, Robert Cohn:
VPC prediction: reducing the cost of indirect branches via hardware-based dynamic devirtualization. ISCA 2007: 424-435 - 2006
- [j6]Onur Mutlu, Hyesoon Kim, Yale N. Patt:
Efficient Runahead Execution: Power-Efficient Memory Latency Tolerance. IEEE Micro 26(1): 10-20 (2006) - [j5]Hyesoon Kim, Onur Mutlu, Yale N. Patt, Jared Stark:
Wish Branches: Enabling Adaptive and Aggressive Predicated Execution. IEEE Micro 26(1): 48-58 (2006) - [j4]Onur Mutlu, Hyesoon Kim, Yale N. Patt:
Address-Value Delta (AVD) Prediction: A Hardware Technique for Efficiently Parallelizing Dependent Cache Misses. IEEE Trans. Computers 55(12): 1491-1508 (2006) - [c8]Hyesoon Kim, M. Aater Suleman, Onur Mutlu, Yale N. Patt:
2D-Profiling: Detecting Input-Dependent Branches with a Single Input Data Set. CGO 2006: 159-172 - [c7]Hyesoon Kim, José A. Joao, Onur Mutlu, Yale N. Patt:
Diverge-Merge Processor (DMP): Dynamic Predicated Execution of Complex Control-Flow Graphs Based on Frequently Executed Paths. MICRO 2006: 53-64 - 2005
- [j3]Onur Mutlu, Hyesoon Kim, Jared Stark, Yale N. Patt:
On Reusing the Results of Pre-Executed Instructions in a Runahead Execution Processor. IEEE Comput. Archit. Lett. 4(1): 2 (2005) - [j2]Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt:
Using the First-Level Caches as Filters to Reduce the Pollution Caused by Speculative Memory References. Int. J. Parallel Program. 33(5): 529-559 (2005) - [j1]Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt:
An Analysis of the Performance Impact of Wrong-Path Memory References on Out-of-Order and Runahead Execution Processors. IEEE Trans. Computers 54(12): 1556-1571 (2005) - [c6]Onur Mutlu, Hyesoon Kim, Yale N. Patt:
Techniques for Efficient Processing in Runahead Execution Engines. ISCA 2005: 370-381 - [c5]Hyesoon Kim, Onur Mutlu, Jared Stark, Yale N. Patt:
Wish Branches: Combining Conditional Branching and Predication for Adaptive Predicated Execution. MICRO 2005: 43-54 - [c4]Onur Mutlu, Hyesoon Kim, Yale N. Patt:
Address-Value Delta (AVD) Prediction: Increasing the Effectiveness of Runahead Execution by Exploiting Regular Memory Allocation Patterns. MICRO 2005: 233-244 - 2004
- [c3]David N. Armstrong, Hyesoon Kim, Onur Mutlu, Yale N. Patt:
Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early Misprediction Detection and Recovery. MICRO 2004: 119-128 - [c2]Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt:
Cache Filtering Techniques to Reduce the Negative Impact of Useless Speculative Memory References on Processor Performance. SBAC-PAD 2004: 2-9 - [c1]Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt:
Understanding the effects of wrong-path memory references on processor performance. WMPI 2004: 56-64
Coauthor Index
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