"A Clock-Gating Method for Low-Power LSI Design."

Takeshi Kitahara et al. (1998)

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DOI: 10.1109/ASPDAC.1998.669476

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Takeshi Kitahara, Fumihiro Minami, Toshiaki Ueda, Kimiyoshi Usami, Seiichi Nishio, Masami Murakata, Takashi Mitsuhashi:
A Clock-Gating Method for Low-Power LSI Design. ASP-DAC 1998: 307-312

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