"A 23mW face recognition accelerator in 40nm CMOS with mostly-read 5T memory."

Dongsuk Jeon et al. (2015)

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DOI: 10.1109/VLSIC.2015.7231322

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-02

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Dongsuk Jeon, Qing Dong, Yejoong Kim, Xiaolong Wang, Shuai Chen, Hao Yu, David T. Blaauw, Dennis Sylvester:
A 23mW face recognition accelerator in 40nm CMOS with mostly-read 5T memory. VLSIC 2015: 48-

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