• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 14 matches

• 2021
• 
  Grace Zgheib, Yu Shen Lu, Ilya Ganusov:
  Clock Skew Scheduling: Avoiding the Runtime Cost of Mixed-Integer Linear Programming. FPL 2021: 327-333
• 2020
• 
  Jeffrey Chromczak, Mark Wheeler, Charles Chiasson, Dana How, Martin Langhammer, Tim Vanderhoek, Grace Zgheib, Ilya Ganusov:
  Architectural Enhancements in Intel® Agilex™ FPGAs. FPGA 2020: 140-149
• 
  Ilya K. Ganusov, Mahesh A. Iyer, Ning Cheng, Alon Meisler:
  Agilex™ Generation of Intel® FPGAs. Hot Chips Symposium 2020: 1-26
• 2016
• 
  Sagheer Ahmad, Vamsi Boppana, Ilya Ganusov, Vinod Kathail, Vidya Rajagopalan, Ralph Wittig:
  A 16-nm Multiprocessing System-on-Chip Field-Programmable Gate Array Platform. IEEE Micro 36(2): 48-62 (2016)
• 
  Ilya Ganusov, Benjamin Devlin:
  Time-borrowing platform in the Xilinx UltraScale+ family of FPGAs and MPSoCs. FPL 2016: 1-9
• 
  Ilya Ganusov, Henri Fraisse, Aaron Ng, Rafael Trapani Possignolo, Sabya Das:
  Automated extra pipeline analysis of applications mapped to Xilinx UltraScale+ FPGAs. FPL 2016: 1-10
• 2015
• 
  Vamsi Boppana, Sagheer Ahmad, Ilya Ganusov, Vinod Kathail, Vidya Rajagopalan, Ralph Wittig:
  UltraScale+ MPSoC and FPGA families. Hot Chips Symposium 2015: 1-37
• 2006
• 
  Ilya Ganusov, Martin Burtscher:
  Future execution: A prefetching mechanism that uses multiple cores to speed up single threads. ACM Trans. Archit. Code Optim. 3(4): 424-449 (2006)
• 
  Ilya Ganusov, Martin Burtscher:
  Efficient emulation of hardware prefetchers via event-driven helper threading. PACT 2006: 144-153
• 2005
• 
  Christianto C. Liu, Ilya Ganusov, Martin Burtscher, Sandip Tiwari:
  Bridging the Processor-Memory Performance Gapwith 3D IC Technology. IEEE Des. Test Comput. 22(6): 556-564 (2005)
• 
  Martin Burtscher, Ilya Ganusov, Sandra J. Jackson, Jian Ke, Paruj Ratanaworabhan, Nana B. Sam:
  The VPC Trace-Compression Algorithms. IEEE Trans. Computers 54(11): 1329-1344 (2005)
• 
  Ilya Ganusov, Martin Burtscher:
  On the importance of optimizing the configuration of stream prefetchers. Memory System Performance 2005: 54-61
• 
  Ilya Ganusov, Martin Burtscher:
  Future Execution: A Hardware Prefetching Technique for Chip Multiprocessors. IEEE PACT 2005: 350-360
• 2004
• 
  Martin Burtscher, Ilya Ganusov:
  Automatic Synthesis of High-Speed Processor Simulators. MICRO 2004: 55-66