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Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 26 matches

• 1994
• 
  Aaron Ashkinazy, David A. Edwards, Craig Farnsworth, Gary Gendel, Shiv S. Sikand:
  Tools for validating asynchronous digital circuits. ASYNC 1994: 12-21
• 
  Peter A. Beerel, Jerry R. Burch, Teresa H.-Y. Meng:
  Sufficient conditions for correct gate-level speed-independent circuits. ASYNC 1994: 33-43
• 
  Igor Benko, Jo C. Ebergen:
  Delay-insensitive solutions to the committee problem. ASYNC 1994: 228-237
• 
  Mark Bickford:
  Composable specifications for asynchronous systems using UNITY. ASYNC 1994: 216-227
• 
  Geoffrey Brown, Wayne Luk, John O'Leary:
  Retargeting a hardware compiler proof using protocol converters. ASYNC 1994: 54-63
• 
  John F. Chappel, Safwat G. Zaky:
  A delay-controlled phase-locked loop to reduce timing errors in synchronous/asynchronous communication links. ASYNC 1994: 156-165
• 
  Edwin G. Y. Chung, Lindsay Kleeman:
  Metastable-robust self-timed circuit synthesis from live safe simple signal transition graphs. ASYNC 1994: 97-105
• 
  Jordi Cortadella, Luciano Lavagno, Peter Vanbekbergen, Alex Yakovlev:
  Designing asynchronous circuits from behavioural specifications with internal conflicts. ASYNC 1994: 106-115
• 
  Uri Cummings, Andrew Lines, Alain J. Martin:
  An asynchronous pipelined lattice structure filter. ASYNC 1994: 126-133
• 
  Craig Farnsworth, David A. Edwards, Shiv S. Sikand:
  Utilising dynamic logic for low power consumption in asynchronous circuits. ASYNC 1994: 186-194
• 
  Mark A. Franklin, Tienyo Pan:
  Performance comparison of asynchronous adders. ASYNC 1994: 117-125
• 
  Mark R. Greenstreet, Peter Cahoon:
  How fast will the flip flop? ASYNC 1994: 77-86
• 
  Henrik Hulgaard, Steven M. Burns:
  Bounded delay timing analysis of a class of CSP programs with choice. ASYNC 1994: 2-11
• 
  Mark B. Josephs, Paul G. Lucassen, Jan Tijmen Udding, Tom Verhoeff:
  Formal design of an asynchronous DSP counterflow pipeline: a case study in handshake algebra. ASYNC 1994: 206-215
• 
  Ajay Khoche, Erik Brunvand:
  Testing micropipelines. ASYNC 1994: 239-246
• 
  Michael Kishinevsky, Jørgen Staunstrup:
  Characterizing speed-independence of high-level designs. ASYNC 1994: 44-53
• 
  Alex Kondratyev, Alexander Taubin:
  Verification of the speed-independent circuits by STG unfoldings. ASYNC 1994: 64-75
• 
  Prabhakar Kudva, Venkatesh Akella:
  A technique for estimating power in asynchronous circuits. ASYNC 1994: 166-175
• 
  Masashi Kuwako, Takashi Nanya:
  Timing-reliability evaluation of asynchronous circuits based on different delay models. ASYNC 1994: 22-31
• 
  Shannon V. Morton, Sam S. Appleton, Michael J. Liebelt:
  An event controlled reconfigurable multi-chip FFT. ASYNC 1994: 144-153
• 
  Priyadarsan Patra, Donald S. Fussell:
  Efficient building blocks for delay insensitive circuits. ASYNC 1994: 196-205
• 
  Per Torstein Røine:
  Building fast bundled data circuits with a specialized standard cell library. ASYNC 1994: 134-143
• 
  Marly Roncken:
  Partial scan test for asynchronous circuits illustrated on a DCC error corrector. ASYNC 1994: 247-256
• 
  Jakov N. Seizovic:
  Pipeline synchronization. ASYNC 1994: 87-96
• 
  José A. Tierno, Alain J. Martin:
  Low-energy asynchronous memory design. ASYNC 1994: 176-185
• 
  Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems, ASYNC 1994, Salt Lake City, UT, USA, November 3-5, 1994. IEEE 1994, ISBN 0-8186-6210-7 [contents]