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Marcello Traiola
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2020 – today
- 2024
- [j9]Alberto Bosio, Samuele Germiniani, Graziano Pravadelli, Marcello Traiola:
Syntactic and Semantic Analysis of Temporal Assertions to Support the Approximation of RTL Designs. J. Electron. Test. 40(2): 199-214 (2024) - [c38]Dennis Gnad, Martin Gotthard, Jonas Krautter, Angeliki Kritikakou, Vincent Meyers, Paolo Rech, Josie E. Rodriguez Condia, Annachiara Ruospo, Ernesto Sánchez, Fernando Fernandes dos Santos, Olivier Sentieys, Mehdi B. Tahoori, Russell Tessier, Marcello Traiola:
Reliability and Security of AI Hardware. ETS 2024: 1-10 - [c37]Marcello Traiola, Salvatore Pappalardo, Ali Piri, Annachiara Ruospo, Bastien Deveautour, Ernesto Sánchez, Alberto Bosio, Sepide Saeedi, Alessio Carpegna, Anil Bayram Gogebakan, Enrico Magliano, Alessandro Savino:
Approximate Fault-Tolerant Neural Network Systems. ETS 2024: 1-10 - [c36]Fernando Fernandes dos Santos, Marcello Traiola, Angeliki Kritikakou:
Combining Fault Simulation and Beam Data for CNN Error Rate Estimation on RISC-V Commercial Platforms. IOLTS 2024: 1-8 - [c35]Mohammad Hasan Ahmadilivani, Alberto Bosio, Bastien Deveautour, Fernando Fernandes dos Santos, Juan-David Guerrero-Balaguera, Maksim Jenihhin, Angeliki Kritikakou, Robert Limas Sierra, Salvatore Pappalardo, Jaan Raik, Josie E. Rodriguez Condia, Matteo Sonza Reorda, Mahdi Taheri, Marcello Traiola:
Special Session: Reliability Assessment Recipes for DNN Accelerators. VTS 2024: 1-11 - 2023
- [j8]Annachiara Ruospo, Ernesto Sánchez, Lucas Matana Luza, Luigi Dilillo, Marcello Traiola, Alberto Bosio:
A Survey on Deep Learning Resilience Assessment Methodologies. Computer 56(2): 57-66 (2023) - [c34]Alberto Bosio, Samuele Germiniani, Graziano Pravadelli, Marcello Traiola:
Exploiting assertions mining and fault analysis to guide RTL-level approximation. DATE 2023: 1-2 - [c33]Marcello Traiola, Angeliki Kritikakou, Olivier Sentieys:
A machine-learning-guided framework for fault-tolerant DNNs. DATE 2023: 1-2 - [c32]Ali Piri, Salvatore Pappalardo, Salvatore Barone, Mario Barbareschi, Bastien Deveautour, Marcello Traiola, Ian O'Connor, Alberto Bosio:
Input-aware accuracy characterization for approximate circuits. DSN-W 2023: 179-182 - [c31]Pegdwende Romaric Nikiema, Angeliki Kritikakou, Marcello Traiola, Olivier Sentieys:
Design with low complexity fine-grained Dual Core Lock-Step (DCLS) RISC-V processors. DSN-S 2023: 224-229 - [c30]Pegdwende Romaric Nikiema, Angeliki Kritikakou, Marcello Traiola, Olivier Sentieys:
Impact of Transient Faults on Timing Behavior and Mitigation with Near-Zero WCET Overhead. ECRTS 2023: 15:1-15:22 - [c29]Marcello Traiola, Angeliki Kritikakou, Olivier Sentieys:
harDNNing: a machine-learning-based framework for fault tolerance assessment and protection of DNNs. ETS 2023: 1-6 - [c28]Pegdwende Romaric Nikiema, Alessandro Palumbo, Allan Aasma, Luca Cassano, Angeliki Kritikakou, Ari Kulmala, Jari Lukkarila, Marco Ottavi, Rafail Psiakis, Marcello Traiola:
Towards Dependable RISC-V Cores for Edge Computing Devices. IOLTS 2023: 1-7 - [e1]Luca Cassano, Mihalis Psarakis, Marcello Traiola, Alberto Bosio:
IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2023, Juan-Les-Pins, France, October 3-5, 2023. IEEE 2023, ISBN 979-8-3503-1500-4 [contents] - 2022
- [j7]Mario Barbareschi, Salvatore Barone, Alberto Bosio, Jie Han, Marcello Traiola:
A Genetic-algorithm-based Approach to the Design of DCT Hardware Accelerators. ACM J. Emerg. Technol. Comput. Syst. 18(3): 50:1-50:25 (2022) - [c27]Ali Piri, Sepide Saeedi, Mario Barbareschi, Bastien Deveautour, Stefano Di Carlo, Ian O'Connor, Alessandro Savino, Marcello Traiola, Alberto Bosio:
Input-Aware Approximate Computing. AQTR 2022: 1-6 - [c26]Mario Barbareschi, Alberto Bosio, Ian O'Connor, Petr Fiser, Marcello Traiola:
A Design Space Exploration Framework for Memristor-Based Crossbar Architecture. DDECS 2022: 38-43 - [c25]Annachiara Ruospo, Gabriele Gavarini, Ilaria Bragaglia, Marcello Traiola, Alberto Bosio, Ernesto Sánchez:
Selective Hardening of Critical Neurons in Deep Neural Networks. DDECS 2022: 136-141 - [c24]Nikolaos Ioannis Deligiannis, Riccardo Cantoro, Matteo Sonza Reorda, Marcello Traiola, Emanuele Valea:
Improving the Fault Resilience of Neural Network Applications Through Security Mechanisms. DSN (Supplements) 2022: 23-24 - [c23]Alberto Bosio, Moreno Bragaglio, Samuele Germiniani, Samuele Mori, Graziano Pravadelli, Marcello Traiola:
Assertion-aware approximate computing design exploration on behavioral models. LATS 2022: 1-6 - [p1]Marcello Traiola, Bastien Deveautour, Alberto Bosio, Patrick Girard, Arnaud Virazel:
Test and Reliability of Approximate Hardware. Approximate Computing 2022: 233-266 - 2021
- [j6]Salvatore Barone, Marcello Traiola, Mario Barbareschi, Alberto Bosio:
Multi-Objective Application-Driven Approximate Design Method. IEEE Access 9: 86975-86993 (2021) - [j5]Nikolaos Ioannis Deligiannis, Riccardo Cantoro, Matteo Sonza Reorda, Marcello Traiola, Emanuele Valea:
Towards the Integration of Reliability and Security Mechanisms to Enhance the Fault Resilience of Neural Networks. IEEE Access 9: 155998-156012 (2021) - [j4]Annachiara Ruospo, Ernesto Sánchez, Marcello Traiola, Ian O'Connor, Alberto Bosio:
Investigating data representation for efficient and reliable Convolutional Neural Networks. Microprocess. Microsystems 86: 104318 (2021) - [c22]Alessandro Savino, Marcello Traiola, Stefano Di Carlo, Alberto Bosio:
Efficient Neural Network Approximation via Bayesian Reasoning. DDECS 2021: 45-50 - [c21]Alberto Bosio, Mayeul Cantan, Cédric Marchand, Ian O'Connor, Petr Fiser, Arnaud Poittevin, Marcello Traiola:
Emerging Technologies: Challenges and Opportunities for Logic Synthesis. DDECS 2021: 93-98 - [c20]Alberto Bosio, Ian O'Connor, Marcello Traiola, Jorge Echavarria, Jürgen Teich, Muhammad Abdullah Hanif, Muhammad Shafique, Said Hamdioui, Bastien Deveautour, Patrick Girard, Arnaud Virazel, Koen Bertels:
Emerging Computing Devices: Challenges and Opportunities for Test and Reliability*. ETS 2021: 1-10 - [c19]Marcello Traiola, Jorge Echavarria, Alberto Bosio, Jürgen Teich, Ian O'Connor:
Design Space Exploration of Approximation-Based Quadruple Modular Redundancy Circuits. ICCAD 2021: 1-9 - [c18]Bastien Deveautour, Marcello Traiola, Arnaud Virazel, Patrick Girard:
Reducing Overprovision of Triple Modular Reduncancy Owing to Approximate Computing. IOLTS 2021: 1-7 - [c17]Annachiara Ruospo, Lucas Matana Luza, Alberto Bosio, Marcello Traiola, Luigi Dilillo, Ernesto Sánchez:
Pros and Cons of Fault Injection Approaches for the Reliability Assessment of Deep Neural Networks. LATS 2021: 1-5 - 2020
- [j3]Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio:
A Survey of Testing Techniques for Approximate Integrated Circuits. Proc. IEEE 108(12): 2178-2194 (2020) - [c16]Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio:
Maximizing Yield for Approximate Integrated Circuits. DATE 2020: 810-815 - [c15]Riccardo Cantoro, Nikolaos Ioannis Deligiannis, Matteo Sonza Reorda, Marcello Traiola, Emanuele Valea:
Evaluating Data Encryption Effects on the Resilience of an Artificial Neural Network. DFT 2020: 1-4 - [c14]Alberto Bosio, Stefano Di Carlo, Patrick Girard, Ernesto Sánchez, Alessandro Savino, Lukás Sekanina, Marcello Traiola, Zdenek Vasícek, Arnaud Virazel:
Design, Verification, Test and In-Field Implications of Approximate Computing Systems. ETS 2020: 1-10 - [c13]Bastien Deveautour, Marcello Traiola, Arnaud Virazel, Patrick Girard:
QAMR: an Approximation-Based Fully Reliable TMR Alternative for Area Overhead Reduction. ETS 2020: 1-6 - [c12]Riccardo Cantoro, Nikolaos Ioannis Deligiannis, Matteo Sonza Reorda, Marcello Traiola, Emanuele Valea:
Evaluating the Code Encryption Effects on Memory Fault Resilience. LATS 2020: 1-6
2010 – 2019
- 2018
- [j2]Lorena Anghel, Mounir Benabdenbi, Alberto Bosio, Marcello Traiola, Elena Ioana Vatajelu:
Test and Reliability in Approximate Computing. J. Electron. Test. 34(4): 375-387 (2018) - [j1]Marcello Traiola, Mario Barbareschi, Alberto Bosio:
Estimating dynamic power consumption for memristor-based CiM architecture. Microelectron. Reliab. 80: 241-248 (2018) - [c11]Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio:
On the Comparison of Different ATPG Approaches for Approximate Integrated Circuits. DDECS 2018: 85-90 - [c10]Umberto Ferrandino, Marcello Traiola, Mario Barbareschi, Antonino Mazzeo, Petr Fiser, Alberto Bosio:
Synthesis of Finite State Machines on Memristor Crossbars. DDECS 2018: 107-112 - [c9]Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio:
Investigation of Mean-Error Metrics for Testing Approximate Integrated Circuits. DFT 2018: 1-6 - [c8]Marcello Traiola, Alessandro Savino, Mario Barbareschi, Stefano Di Carlo, Alberto Bosio:
Predicting the Impact of Functional Approximation: from Component- to Application-Level. IOLTS 2018: 61-64 - [c7]Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio:
Testing approximate digital circuits: Challenges and opportunities. LATS 2018: 1-6 - [c6]Lukás Sekanina, Zdenek Vasícek, Alberto Bosio, Marcello Traiola, Paolo Rech, Daniel Oliveira, Fernando Fernandes, Stefano Di Carlo:
Special session: How approximate computing impacts verification, test and reliability. VTS 2018: 1 - 2017
- [c5]Imran Wali, Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio:
Towards approximation during test of Integrated Circuits. DDECS 2017: 28-33 - [c4]Marcello Traiola, Mario Barbareschi, Alberto Bosio:
Formal Design Space Exploration for memristor-based crossbar architecture. DDECS 2017: 145-150 - [c3]Mario Barbareschi, Alberto Bosio, Hoang Anh Du Nguyen, Said Hamdioui, Marcello Traiola, Elena Ioana Vatajelu:
Memristive devices: Technology, design automation and computing frontiers. DTIS 2017: 1-8 - [c2]Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio:
Towards digital circuit approximation by exploiting fault simulation. EWDTS 2017: 1-7 - 2016
- [c1]Marcello Traiola, Mario Barbareschi, Antonino Mazzeo, Alberto Bosio:
XbarGen: A memristor based boolean logic synthesis tool. VLSI-SoC 2016: 1-6
Coauthor Index
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last updated on 2024-10-07 22:22 CEST by the dblp team
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