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2020 – today
- 2024
[j1]Yuanlong Xiao
, Dongjoon Park, Zeyu Jason Niu, Aditya Hota, André DeHon:
ExHiPR: Extended High-Level Partial Reconfiguration for Fast Incremental FPGA Compilation. ACM Trans. Reconfigurable Technol. Syst. 17(2): 21:1-21:28 (2024)- [c6]Dongjoon Park, André DeHon:
REFINE: Runtime Execution Feedback for INcremental Evolution on FPGA Designs. FPGA 2024: 108-118 - 2023
- [c5]Dongjoon Park, Zhijing Yao, Yuanlong Xiao, André DeHon:
Asymmetry in Butterfly Fat Tree FPGA NoC. ICFPT 2023: 227-231 - 2022
- [c4]Yuanlong Xiao, Aditya Hota, Dongjoon Park, André DeHon:
HiPR: High-level Partial Reconfiguration for Fast Incremental FPGA Compilation. FPL 2022: 70-78 - [c3]Dongjoon Park, Yuanlong Xiao, André DeHon:
Fast and Flexible FPGA Development using Hierarchical Partial Reconfiguration. FPT 2022: 1-10
2010 – 2019
- 2019
- [c2]Yuanlong Xiao, Dongjoon Park, Andrew Butt, Hans Giesen, Zhaoyang Han, Rui Ding, Nevo Magnezi, Raphael Rubin, André DeHon:
Reducing FPGA Compile Time with Separate Compilation for FPGA Building Blocks. FPT 2019: 153-161 - 2018
- [c1]Dongjoon Park, Yuanlong Xiao, Nevo Magnezi, André DeHon:
Case for Fast FPGA Compilation Using Partial Reconfiguration. FPL 2018: 235-238
Coauthor Index
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