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Pieter van der Wolf
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2020 – today
- 2023
- [c41]Sheikh Faizan Qureshi, Stefan A. Damjancevic, Emil Matús, Dmitry Utyansky, Pieter van der Wolf, Gerhard P. Fettweis:
Efficient Handover Mode Synchronization for NR-REDCAP on a Vector DSP. SAMOS 2023: 3-18 - 2022
- [c40]Sheikh Faizan Qureshi, Stefan A. Damjancevic, Emil Matús, Dmitry Utyansky, Pieter van der Wolf, Gerhard P. Fettweis:
Efficient Synchronization for NR-REDCAP Implemented on a Vector DSP. ASAP 2022: 34-42 - 2021
- [j4]Stefan A. Damjancevic, Emil Matús, Dmitry Utyansky, Pieter van der Wolf, Gerhard P. Fettweis:
Channel Estimation for Advanced 5G/6G Use Cases on a Vector Digital Signal Processor. IEEE Open J. Circuits Syst. 2: 265-277 (2021) - [c39]Stefan A. Damjancevic, Samuel Ajay Dasgupta, Emil Matús, Dmitry Utyanksy, Pieter van der Wolf, Gerhard P. Fettweis:
Flexible Channel Estimation for 3GPP 5G IoT on a Vector Digital Signal Processor. SiPS 2021: 12-17
2010 – 2019
- 2019
- [c38]Stefan A. Damjancevic, Emil Matús, Dmitry Utyansky, Pieter van der Wolf, Gerhard P. Fettweis:
Towards GFDM for Handsets - Efficient and Scalable Implementation on a Vector DSP. VTC Fall 2019: 1-7 - 2013
- [c37]Pieter van der Wolf, Ruud Derwig:
Modular SoC integration with subsystems: the audio subsystem case. DATE 2013: 157-162 - [c36]Yankin Tanurhan, Pieter van der Wolf:
Processors as SoC building blocks. VLSI-SoC 2013: 286-287 - 2011
- [c35]Pieter van der Wolf, Jeroen Geuzebroek:
SoC infrastructures for predictable system integration. DATE 2011: 857-862
2000 – 2009
- 2009
- [c34]Zhonghai Lu, Mikael Millberg, Axel Jantsch, Alistair C. Bruce, Pieter van der Wolf, Tomas Henriksson:
Flow regulation for on-chip communication. DATE 2009: 578-581 - 2008
- [c33]Wido Kruijtzer, Pieter van der Wolf, Erwin A. de Kock, Jan Stuyt, Wolfgang Ecker, Albrecht Mayer, Serge Hustin, Christophe Amerijckx, Serge de Paoli, Emmanuel Vaumorin:
Industrial IP Integration Flows based on IP-XACT Standards. DATE 2008: 32-37 - [c32]Jelte Peter Vink, Kees van Berkel, Pieter van der Wolf:
Performance Analysis of SoC Architectures Based on Latency-Rate Servers. DATE 2008: 200-205 - [c31]Pieter van der Wolf, Tomas Henriksson:
Video Processing Requirements on SoC Infrastructures. DATE 2008: 1124-1125 - [c30]Liesbeth Steffens, Manvi Agarwal, Pieter van der Wolf:
Real-Time Analysis for Memory Access in Media Processing SoCs: A Practical Approach. ECRTS 2008: 255-265 - 2007
- [c29]Tomas Henriksson, Pieter van der Wolf, Axel Jantsch, Alistair C. Bruce:
Network Calculus Applied to Verification of Memory Access Performance in SoCs. ESTIMedia 2007: 21-26 - 2006
- [c28]Tomas Henriksson, Pieter van der Wolf:
TTL Hardware Interface: A High-Level Interface for Streaming Multiprocessor Architectures. ESTIMedia 2006: 107-112 - [c27]A. K. Riemens, René J. van der Vleuten, Pieter van der Wolf, G. Jacob, Jan-Willem van de Waerdt, J. G. Janssen:
Transparent Embedded Compression in Systems-on-Chip. SiPS 2006: 256-261 - 2005
- [c26]Tomas Henriksson, Jeffrey Kang, Pieter van der Wolf:
Implementation of dynamic streaming Applications on heterogeneous multi-Processor architectures. CODES+ISSS 2005: 57-62 - [c25]Jeffrey Kang, Tomas Henriksson, Pieter van der Wolf:
An Interface for the Design and Implementation of Dynamic Applications on Multi-Processor Architectures. ESTIMedia 2005: 101-106 - [r1]Tomas Henriksson, Gerben Essink, Pieter van der Wolf, Erwin A. de Kock, Wido Kruijtzer:
Design and Programming of Embedded Multiprocessors. Embedded Systems Handbook 2005 - 2004
- [c24]Pieter van der Wolf, Erwin A. de Kock, Tomas Henriksson, Wido Kruijtzer, Gerben Essink:
Design and programming of embedded multiprocessors: an interface-centric approach. CODES+ISSS 2004: 206-217 - 2003
- [c23]Vladimir D. Zivkovic, Erwin A. de Kock, Pieter van der Wolf, Ed F. Deprettere:
Fast and Accurate Multiprocessor Architecture Exploration with Symbolic Programs. DATE 2003: 10656-10661 - 2002
- [j3]Martijn J. Rutten, Jos T. J. van Eijndhoven, Egbert G. T. Jaspers, Pieter van der Wolf, Evert-Jan D. Pol, Om Prakash Gangwal, Adwin H. Timmer:
A Heterogeneous Multiprocessor Architecture for Flexible Media Processing. IEEE Des. Test Comput. 19(4): 39-50 (2002) - [c22]Martijn J. Rutten, Jos T. J. van Eijndhoven, Evert-Jan D. Pol, Egbert G. T. Jaspers, Pieter van der Wolf, Om Prakash Gangwal, Adwin H. Timmer:
Eclipse: Heterogeneous Multiprocessor Architecture for Flexible Media Processing. IPDPS 2002 - [c21]Bart Kienhuis, Ed F. Deprettere, Pieter van der Wolf, Kees A. Vissers:
A Methodology to Design Programmable Embedded Systems - The Y-Chart Approach. Embedded Processor Design Challenges 2002: 18-37 - [c20]Pieter van der Wolf, W. M. Kruijtzer, Jos T. J. van Eijndhoven:
System-Level Design of Embedded Media Systems (Tutorial Abstract). ASP-DAC/VLSI Design 2002: 14-15 - 2001
- [j2]Andy D. Pimentel, Louis O. Hertzberger, Paul Lieverse, Pieter van der Wolf, Ed F. Deprettere:
Exploring Embedded-Systems Architectures with Artemis. Computer 34(11): 57-63 (2001) - [j1]Paul Lieverse, Pieter van der Wolf, Kees A. Vissers, Ed F. Deprettere:
A Methodology for Architecture Exploration of Heterogeneous Signal Processing Systems. J. VLSI Signal Process. 29(3): 197-207 (2001) - [c19]Paul Lieverse, Pieter van der Wolf, Ed F. Deprettere:
A trace transformation technique for communication refinement. CODES 2001: 134-139 - [c18]Paul Lieverse, Todor P. Stefanov, Pieter van der Wolf, Ed F. Deprettere:
System Level Design with Spade: an M-JPEG Case Study. ICCAD 2001: 31-38 - 2000
- [c17]Erwin A. de Kock, W. J. M. Smits, Pieter van der Wolf, Jean-Yves Brunel, W. M. Kruijtzer, Paul Lieverse, Kees A. Vissers, Gerben Essink:
YAPI: application modeling for signal processing systems. DAC 2000: 402-405
1990 – 1999
- 1999
- [c16]Pieter van der Wolf, Paul Lieverse, Mudit Goel, David La Hei, Kees A. Vissers:
An MPEG-2 decoder case study as a driver for a system level design methodology. CODES 1999: 33-37 - [c15]Rolf Ernst, Kees A. Vissers, Pieter van der Wolf, Gert-Jan van Rootselaar:
System level design and debug of high-performance embedded media systems (tutorial). ICCAD 1999: 461 - [c14]Jos T. J. van Eijndhoven, Kees A. Vissers, Evert-Jan D. Pol, P. Struik, R. H. J. Bloks, Pieter van der Wolf, Harald P. E. Vranken, Frans Sijstermans, M. J. A. Tromp, Andy D. Pimentel:
TriMedia CPU64 Architecture. ICCD 1999: 586-592 - [c13]Evert-Jan D. Pol, Bas Aarts, Jos T. J. van Eijndhoven, P. Struik, Pieter van der Wolf, Frans Sijstermans, M. J. A. Tromp, Jan-Willem van de Waerdt:
TriMedia CPU64 Application Development Environment. ICCD 1999: 593-598 - 1998
- [c12]Bart Kienhuis, Ed F. Deprettere, Kees A. Vissers, Pieter van der Wolf:
The construction of a retargetable simulator for an architecture template. CODES 1998: 125-129 - 1997
- [c11]Bart Kienhuis, Ed F. Deprettere, Kees A. Vissers, Pieter van der Wolf:
An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures. ASAP 1997: 338-349 - 1994
- [c10]A. J. van der Hoeven, K. Olav ten Bosch, Rene van Leuken, Pieter van der Wolf:
A flexible access control mechanism for CAD frameworks. EURO-DAC 1994: 188-193 - [c9]Pieter van der Wolf, K. Olav ten Bosch, Alfred van der Hoeven:
An enhanced flow model for constraint handling in hierarchical multi-view design environments. ICCAD 1994: 500-507 - 1993
- [c8]K. Olav ten Bosch, Pieter van der Wolf, Peter Bingley:
A flow-based user interface for efficient execution of the design cycle. ICCAD 1993: 356-363 - 1992
- [c7]Peter Bingley, K. Olav ten Bosch, Pieter van der Wolf:
Incorporating design flow management in a framework based CAD system. ICCAD 1992: 538-545 - 1991
- [c6]K. Olav ten Bosch, Peter Bingley, Pieter van der Wolf:
Design Flow Management in the NELSIS CAD Framework. DAC 1991: 711-716 - 1990
- [c5]Pieter van der Wolf, G. W. Sloof, Peter Bingley, Patrick M. Dewilde:
Meta Data Management in the NELSIS CAD Framework. DAC 1990: 142-149 - [c4]Pieter van der Wolf, Peter Bingley, Patrick M. Dewilde:
On the architecture of a CAD framework: the NELSIS approach. EURO-DAC 1990: 29-33 - [c3]G. W. Sloof, Peter Bingley, Patrick M. Dewilde, T. G. R. M. van Leuken, Pieter van der Wolf:
Design data management in a distributed hardware environment. EURO-DAC 1990: 34-38
1980 – 1989
- 1988
- [c2]Pieter van der Wolf, T. G. R. M. van Leuken:
Object Type Oriented Data Modeling for VLSI Data Management. DAC 1988: 351-356 - [c1]Ing Widya, T. G. R. M. van Leuken, Pieter van der Wolf:
Concurrency Control in a VLSI Design Database. DAC 1988: 357-362
Coauthor Index
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