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2020 – today
- 2024
[j89]Muhammad Noman Sohail
, Adeel Anjum, Iftikhar Ahmed Saeed, Madiha Haider Syed, Axel Jantsch, Semeen Rehman:
Optimizing Industrial IoT Data Security Through Blockchain-Enabled Incentive-Driven Game Theoretic Approach for Data Sharing. IEEE Access 12: 51176-51192 (2024)- [j88]Matthias Wess, Daniel Schnöll, Dominik Dallinger, Matthias Bittner, Axel Jantsch:
Conformal Prediction Based Confidence for Latency Estimation of DNN Accelerators: A Black-Box Approach. IEEE Access 12: 109847-109860 (2024) - [j87]Axel Jantsch, Swaroop Ghosh, Ümit Y. Ogras, Pascal Meinerzhagen:
ISLPED 2023: International Symposium on Low-Power Electronics and Design. IEEE Des. Test 41(1): 93-94 (2024) - 2023
- [c205]Isaac Sánchez Leal, Eiraj Saqib, Irida Shallari, Axel Jantsch, Silvia Krug, Mattias O'Nils:
Waist Tightening of CNNs: A Case study on Tiny YOLOv3 for Distributed IoT Implementations. CPS-IoT Week Workshops 2023: 241-246 - [c204]Lukas Esterle, Nikil D. Dutt, Christian Gruhl, Peter R. Lewis, Lucio Marcenaro, Carlo S. Regazzoni, Axel Jantsch:
Self-awareness in Cyber-Physical Systems: Recent Developments and Open Challenges. DATE 2023: 1-6 - [c203]Thomas Kotrba, Martin Lechner, Omair Sarwar, Axel Jantsch:
Multispectral Feature Fusion for Deep Object Detection on Embedded NVIDIA Platforms. DATE 2023: 1-2 - [c202]Matthias Wess, Dominik Dallinger, Daniel Schnöll, Matthias Bittner, Maximilian Götzinger, Axel Jantsch:
Energy Profiling of DNN Accelerators. DSD 2023: 53-60 - [c201]David Breuss, Maximilian Götzinger, Jenny Vuong, Clemens Reisner, Axel Jantsch:
VADAR: A Vision-based Anomaly Detection Algorithm for Railroads. DSD 2023: 130-137 - [c200]Daniel Schnöll, Matthias Wess, Matthias Bittner, Maximilian Götzinger, Axel Jantsch:
Fast, Quantization Aware DNN Training for Efficient HW Implementation. DSD 2023: 700-707 - [c199]Matthias Bittner, Daniel Hauer, Christian Stippel, Katharina Scheucher, Robin Sudhoff, Axel Jantsch:
Forecasting Critical Overloads based on Heterogeneous Smart Grid Simulation. ICMLA 2023: 339-346 - [c198]Eiraj Saqib, Isaac Sánchez Leal, Irida Shallari, Axel Jantsch, Silvia Krug, Mattias O'Nils:
Optimizing the IoT Performance: A Case Study on Pruning a Distributed CNN. SAS 2023: 1-6 - [i5]Sofia Maragkou, Axel Jantsch:
Information Flow Tracking Methods for Protecting Cyber-Physical Systems against Hardware Trojans - a Survey. CoRR abs/2301.02620 (2023) - 2022
- [j86]Adam Lundström, Mattias O'Nils, Faisal Z. Qureshi, Axel Jantsch:
Improving Deep Learning Based Anomaly Detection on Multivariate Time Series Through Separated Anomaly Scoring. IEEE Access 10: 108194-108204 (2022) - [j85]Nima Taherinejad, Andreas Herkersdorf, Axel Jantsch:
Autonomous Systems, Trust, and Guarantees. IEEE Des. Test 39(1): 42-48 (2022) - [j84]Amid Mozelli, Nima Taherinejad, Axel Jantsch:
A Study on Confidence: An Unsupervised Multiagent Machine Learning Experiment. IEEE Des. Test 39(3): 54-62 (2022) - [j83]Mojtaba Valinataj, Axel Jantsch:
Hierarchical multipliers: A framework for high-speed multiple error detecting architectures. Microelectron. J. 125: 105459 (2022) - [j82]Maximilian Götzinger, Arman Anzanpour, Iman Azimi, Nima TaheriNejad, Axel Jantsch, Amir M. Rahmani, Pasi Liljeberg:
Confidence-Enhanced Early Warning Score Based on Fuzzy Logic. Mob. Networks Appl. 27(2): 691-708 (2022) - [c197]Maryna Kolisnyk, Axel Jantsch, Iryna Piskachova:
Markov Model for Availability Assessment of PLC in Industrial IoT Considering Subsystems Failures. DESSERT 2022: 1-4 - [c196]Nahla A. El-Araby, Axel Jantsch:
Reliable Power Efficient Systems through Run-time Reconfiguration. NEWCAS 2022: 347-351 - [c195]Martin Lechner, Lukas Steindl, Axel Jantsch:
Study of DNN-Based Ragweed Detection from Drones. SAMOS 2022: 187-199 - [c194]Nahla A. El-Araby, David Frismuth, Nilson Neves Filho, Axel Jantsch:
Run Time Power and Accuracy Management with Approximate Circuits. VLSI-SoC 2022: 1-6 - 2021
- [j81]Matthias Wess, Matvey Ivanov, Christoph Unger, Anvesh Nookala, Alexander Wendt, Axel Jantsch:
ANNETTE: Accurate Neural Network Execution Time Estimation With Stacked Models. IEEE Access 9: 3545-3556 (2021) - [j80]Irida Shallari, Isaac Sánchez Leal, Silvia Krug, Axel Jantsch, Mattias O'Nils:
Design Space Exploration for an IoT Node: Trade-Offs in Processing and Communication. IEEE Access 9: 65078-65090 (2021) - [j79]Martin Lechner, Axel Jantsch:
Blackthorn: Latency Estimation Framework for CNNs on Embedded Nvidia Platforms. IEEE Access 9: 110074-110084 (2021) - [c193]Alessio Colucci, Dávid Juhász, Martin Mosbeck, Alberto Marchisio, Semeen Rehman, Manfred Kreutzer, Günther Nadbath, Axel Jantsch, Muhammad Shafique:
MLComp: A Methodology for Machine Learning-based Performance Estimation and Adaptive Selection of Pareto-Optimal Compiler Optimization Sequences. DATE 2021: 108-113 - [c192]Friedrich Bauer, Felix Braun, Daniel Hauer, Axel Jantsch, Markus D. Kobelrausch, Martin Mosbeck, Nima Taherinejad, Philipp-Sebastian Vogt:
MELODI: An Online Platform for Mass Education of Digital Design - HDL to Remote FPGA. FPL 2021: 399 - [c191]Bernhard Haas, Alexander Wendt, Axel Jantsch, Matthias Wess:
Neural Network Compression Through Shunt Connections and Knowledge Distillation for Semantic Segmentation Problems. AIAI 2021: 349-361 - [c190]Daniel Hauer, Maximilian Götzinger, Axel Jantsch, Florian Kintzler:
Context Aware Monitoring for Smart Grids. ISIE 2021: 1-6 - [c189]Yassmeen Elderhalli, Nahla A. El-Araby, Osman Hasan, Axel Jantsch, Sofiène Tahar:
Dynamic Fault Tree Models for FPGA Fault Tolerance and Reliability. ISVLSI 2021: 194-199 - [i4]Matthias Wess, Matvey Ivanov, Anvesh Nookala, Christoph Unger, Alexander Wendt, Axel Jantsch:
ANNETTE: Accurate Neural Network Execution Time Estimation with Stacked Models. CoRR abs/2105.03176 (2021) - 2020
- [j78]Maximilian Götzinger, Dávid Juhász, Nima Taherinejad, Edwin Willegger, Benedikt Tutzer, Pasi Liljeberg, Axel Jantsch, Amir M. Rahmani:
RoSA: A Framework for Modeling Self-Awareness in Cyber-Physical Systems. IEEE Access 8: 141373-141394 (2020) - [j77]Henry Hoffmann, Axel Jantsch, Nikil D. Dutt:
Embodied Self-Aware Computing Systems. Proc. IEEE 108(7): 1027-1046 (2020) - [j76]Santiago Pagani, Sai Manoj P. D., Axel Jantsch, Jörg Henkel:
Machine Learning for Power, Energy, and Thermal Management on Multicore Processors: A Survey. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(1): 101-116 (2020) - [j75]Axel Jantsch, Peter R. Lewis, Nikil D. Dutt:
Introduction to the Special Issue on Self-Aware Cyber-physical Systems. ACM Trans. Cyber Phys. Syst. 4(4): 37:1-37:2 (2020) - [j74]Kirstie L. Bellman, Christopher Landauer, Nikil D. Dutt, Lukas Esterle, Andreas Herkersdorf, Axel Jantsch, Nima Taherinejad, Peter R. Lewis, Marco Platzner, Kalle Tammemäe:
Self-aware Cyber-Physical Systems. ACM Trans. Cyber Phys. Syst. 4(4): 38:1-38:26 (2020) - [j73]Marcelo Ruaro, Anderson Camargo Sant'Ana, Axel Jantsch, Fernando Gehm Moraes:
Modular and Distributed Management of Many-Core SoCs. ACM Trans. Comput. Syst. 38(1-2): 1:1-1:16 (2020) - [c188]David Bechtold, Alexander Wendt, Axel Jantsch:
Evaluation of Reinforcement Learning Methods for a Self-learning System. ICAART (2) 2020: 36-47 - [c187]Daniel Hauer, Denise Ratasich, Lukas Krammer, Axel Jantsch:
A Methodology for Resilient Control and Monitoring in Smart Grids. ICIT 2020: 589-594 - [c186]Alexander Wendt, Stefan Kollmann, Aleksey Bratukhin, Alireza Estaji, Thilo Sauter, Axel Jantsch:
Cognitive Architectures for Process Monitoring - an Analysis. INDIN 2020: 167-173 - [i3]Bryan Donyanavard, Amir M. Rahmani, Axel Jantsch, Onur Mutlu, Nikil D. Dutt:
Intelligent Management of Mobile Systems through Computational Self-Awareness. CoRR abs/2008.00095 (2020) - [i2]Alessio Colucci, Dávid Juhász, Martin Mosbeck, Alberto Marchisio, Semeen Rehman, Manfred Kreutzer, Guenther Nadbath, Axel Jantsch, Muhammad Shafique:
MLComp: A Methodology for Machine Learning-based Performance Estimation and Adaptive Selection of Pareto-Optimal Compiler Optimization Sequences. CoRR abs/2012.05270 (2020)
2010 – 2019
- 2019
- [j72]Sai Manoj Pudukotai Dinakarrao, Axel Jantsch, Muhammad Shafique:
Computer-aided Arrhythmia Diagnosis with Bio-signal Processing: A Survey of Trends and Techniques. ACM Comput. Surv. 52(2): 23:1-23:37 (2019) - [j71]Antonio Miele, Anil Kanduri, Kasra Moazzemi, Dávid Juhász, Amir-Mohammad Rahmani, Nikil D. Dutt, Pasi Liljeberg, Axel Jantsch:
On-Chip Dynamic Resource Management. Found. Trends Electron. Des. Autom. 13(1-2): 1-14 (2019) - [j70]Maximilian Götzinger, Nima Taherinejad, Hedyeh A. Kholerdi, Axel Jantsch, Edwin Willegger, Thomas Glatzl, Amir M. Rahmani, Thilo Sauter, Pasi Liljeberg:
Model-free condition monitoring with confidence. Int. J. Comput. Integr. Manuf. 32(4-5): 466-481 (2019) - [j69]Junshi Wang, Masoumeh Ebrahimi, Letian Huang, Xuan Xie, Qiang Li, Guangjun Li, Axel Jantsch:
Efficient Design-for-Test Approach for Networks-on-Chip. IEEE Trans. Computers 68(2): 198-213 (2019) - [j68]Marcelo Ruaro, Axel Jantsch, Fernando Gehm Moraes:
Self-Adaptive QoS Management of Computation and Communication Resources in Many-Core SoCs. ACM Trans. Embed. Comput. Syst. 18(4): 37:1-37:21 (2019) - [c185]Arman Anzanpour, Humayun Rashid, Amir M. Rahmani, Axel Jantsch, Nikil D. Dutt, Pasi Liljeberg:
Energy-efficient and Reliable Wearable Internet-of-Things through Fog-Assisted Dynamic Goal Management. ANT/EDI40 2019: 493-500 - [c184]Nima Taherinejad, Axel Jantsch:
Improved Machine Learning using Confidence. CCECE 2019: 1-5 - [c183]Dávid Juhász, Axel Jantsch:
Dynamic Constraints for Mixed-Criticality Systems. COINS 2019: 25-30 - [c182]Axel Jantsch:
Towards a Formal Model of Recursive Self-Reflection. ASD@DATE 2019: 6:1-6:15 - [c181]Imran Hafeez Abbassi, Faiq Khalid, Semeen Rehman, Awais Mehmood Kamboh, Axel Jantsch, Siddharth Garg, Muhammad Shafique:
TrojanZero: Switching Activity-Aware Design of Undetectable Hardware Trojans with Zero Power and Area Footprint. DATE 2019: 914-919 - [c180]Elham Shamsa, Anil Kanduri, Amir M. Rahmani, Pasi Liljeberg, Axel Jantsch, Nikil D. Dutt:
Goal-Driven Autonomy for Efficient On-chip Resource Management: Transforming Objectives to Goals. DATE 2019: 1397-1402 - [c179]Sina Shahhosseini, Iman Azimi, Arman Anzanpour, Axel Jantsch, Pasi Liljeberg, Nikil D. Dutt, Amir M. Rahmani:
Dynamic Computation Migration at the Edge: Is There an Optimal Choice? ACM Great Lakes Symposium on VLSI 2019: 519-524 - [c178]Martin Lechner, Axel Jantsch, Sai Manoj Pudukotai Dinakarrao:
ResCoNN: Resource-Efficient FPGA-Accelerated CNN for Traffic Sign Classification. IGSC 2019: 1-6 - [c177]Muhammad Abdullah Hanif, Muhammad Zuhaib Akbar, Rehan Ahmed, Semeen Rehman, Axel Jantsch, Muhammad Shafique:
MemGANs: Memory Management for Energy-Efficient Acceleration of Complex Computations in Hardware Architectures for Generative Adversarial Networks. ISLPED 2019: 1-6 - [c176]Marcelo Ruaro, Nedison Velloso, Axel Jantsch, Fernando Gehm Moraes:
Distributed SDN architecture for NoC-based many-core SoCs. NOCS 2019: 8:1-8:8 - [c175]Nima Taherinejad, Peter R. Lewis, Axel Jantsch, Amir M. Rahmani, Lukas Esterle:
Resource Constrained Self-Aware Cyber-Physical Systems (Tutorial). FAS*W@SASO/ICAC 2019: 259-260 - 2018
- [j67]Nikil D. Dutt, Axel Jantsch:
Guest Editorial: Special Issue on Self-Aware Systems on Chip. IEEE Des. Test 35(5): 5-6 (2018) - [j66]Lydia C. Siafara, Hedyeh A. Kholerdi, Aleksey Bratukhin, Nima Taherinejad, Axel Jantsch:
SAMBA - an architecture for adaptive cognitive control of distributed Cyber-Physical Production Systems based on its self-awareness. Elektrotech. Informationstechnik 135(3): 270-277 (2018) - [j65]Amir M. Rahmani, Axel Jantsch, Nikil D. Dutt:
HDGM: Hierarchical Dynamic Goal Management for Many-Core Resource Allocation. IEEE Embed. Syst. Lett. 10(3): 61-64 (2018) - [j64]Sai Manoj P. D., Axel Jantsch, Muhammad Shafique:
SmartDPM: Machine Learning-Based Dynamic Power Management for Multi-Core Microprocessors. J. Low Power Electron. 14(4): 460-474 (2018) - [j63]Anil Kanduri, Mohammad Hashem Haghbayan, Amir M. Rahmani, Muhammad Shafique, Axel Jantsch, Pasi Liljeberg:
adBoost: Thermal Aware Performance Boosting Through Dark Silicon Patterning. IEEE Trans. Computers 67(8): 1062-1077 (2018) - [j62]Matthias Wess, Sai Manoj Pudukotai Dinakarrao, Axel Jantsch:
Weighted Quantization-Regularization in DNNs for Weight Memory Minimization Toward HW Implementation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(11): 2929-2939 (2018) - [j61]Tiago Mück, Bryan Donyanavard, Kasra Moazzemi, Amir M. Rahmani, Axel Jantsch, Nikil D. Dutt:
Design Methodology for Responsive and Rrobust MIMO Control of Heterogeneous Multicores. IEEE Trans. Multi Scale Comput. Syst. 4(4): 944-951 (2018) - [c174]Amir M. Rahmani, Bryan Donyanavard, Tiago Mück, Kasra Moazzemi, Axel Jantsch, Onur Mutlu, Nikil D. Dutt:
SPECTR: Formal Supervisory Control and Coordination for Many-core Systems Resource Management. ASPLOS 2018: 169-183 - [c173]Kasra Moazzemi, Anil Kanduri, David Juhasz, Antonio Miele, Amir M. Rahmani, Pasi Liljeberg, Axel Jantsch, Nikil D. Dutt:
Trends in On-chip Dynamic Resource Management. DSD 2018: 62-69 - [c172]Robin Arbaud, David Juhasz, Axel Jantsch:
Resource Management for Mixed-Criticality Systems on Multi-core Platforms with Focus on Communication. DSD 2018: 627-641 - [c171]Sai Manoj Pudukotai Dinakarrao, Axel Jantsch:
ADDHard: Arrhythmia Detection with Digital Hardware by Learning ECG Signal. ACM Great Lakes Symposium on VLSI 2018: 495-498 - [c170]Maximilian Götzinger, Edwin Willegger, Nima Taherinejad, Axel Jantsch, Thilo Sauter, Thomas Glatzl, P. Lilieberg:
Applicability of Context-Aware Health Monitoring to Hydraulic Circuits. IECON 2018: 4712-4719 - [c169]Hedyeh A. Kholerdi, Nima Taherinejad, Axel Jantsch:
Enhancement of Classification of Small Data Sets Using Self-awareness - An Iris Flower Case-Study. ISCAS 2018: 1-5 - [c168]Axel Jantsch, Arman Anzanpour, Hedyeh A. Kholerdi, Iman Azimi, Lydia C. Siafara, Amir M. Rahmani, Nima Taherinejad, Pasi Liljeberg, Nikil D. Dutt:
Hierarchical dynamic goal management for IoT systems. ISQED 2018: 370-375 - [c167]Martin Mosbeck, Daniel Hauer, Axel Jantsch:
VELS: VHDL E-Learning System for Automatic Generation and Evaluation of Per-Student Randomized Assignments. NORCAS 2018: 1-7 - [c166]Elham Shamsa, Anil Kanduri, Amir M. Rahmani, Pasi Liljeberg, Axel Jantsch, Nikil D. Dutt:
Goal Formulation: Abstracting Dynamic Objectives for Efficient On-chip Resource Allocation. NORCAS 2018: 1-4 - [i1]Imran Hafeez Abbassi, Faiq Khalid, Semeen Rehman, Awais Mehmood Kamboh, Axel Jantsch, Siddharth Garg, Muhammad Shafique:
TrojanZero: Switching Activity-Aware Design of Undetectable Hardware Trojans with Zero Power and Area Footprint. CoRR abs/1812.02770 (2018) - 2017
- [j60]Mohammad Hashem Haghbayan, Amir M. Rahmani, Pasi Liljeberg, Axel Jantsch, Antonio Miele, Cristiana Bolchini, Hannu Tenhunen:
Can Dark Silicon Be Exploited to Prolong System Lifetime? IEEE Des. Test 34(2): 51-59 (2017) - [j59]Axel Jantsch, Nikil D. Dutt:
Guest Editorial: Special Issue on Self-Aware Systems on Chip. IEEE Des. Test 34(6): 6-7 (2017) - [j58]Axel Jantsch, Nikil D. Dutt, Amir M. Rahmani:
Self-Awareness in Systems on Chip - A Survey. IEEE Des. Test 34(6): 8-26 (2017) - [j57]Junshi Wang, Masoumeh Ebrahimi, Letian Huang, Qiang Li, Guangjun Li, Axel Jantsch:
Minimizing the system impact of router faults by means of reconfiguration and adaptive routing. Microprocess. Microsystems 51: 252-263 (2017) - [j56]Amir M. Rahmani, Mohammad Hashem Haghbayan, Antonio Miele, Pasi Liljeberg, Axel Jantsch, Hannu Tenhunen:
Reliability-Aware Runtime Power Management for Many-Core Systems in the Dark Silicon Era. IEEE Trans. Very Large Scale Integr. Syst. 25(2): 427-440 (2017) - [j55]Anil Kanduri, Mohammad Hashem Haghbayan, Amir M. Rahmani, Pasi Liljeberg, Axel Jantsch, Hannu Tenhunen, Nikil D. Dutt:
Accuracy-Aware Power Management for Many-Core Systems Running Error-Resilient Applications. IEEE Trans. Very Large Scale Integr. Syst. 25(10): 2749-2762 (2017) - [c165]Maximilian Gotzinger, Nima Taherinejad, Hedyeh A. Kholerdi, Axel Jantsch:
On the design of context-aware health monitoring without a priori knowledge; an AC-Motor case-study. CCECE 2017: 1-5 - [c164]Christian Krieg, Clifford Wolf, Axel Jantsch, Tanja Zseby:
Toggle MUX: How X-Optimism Can Lead to Malicious Hardware. DAC 2017: 7:1-7:6 - [c163]Arman Anzanpour, Iman Azimi, Maximilian Gotzinger, Amir M. Rahmani, Nima Taherinejad, Pasi Liljeberg, Axel Jantsch, Nikil D. Dutt:
Self-awareness in remote health monitoring systems using wearable electronics. DATE 2017: 1056-1061 - [c162]Lydia C. Siafara, Hedyeh A. Kholerdi, Aleksey Bratukhin, Nima Taherinejad, Alexander Wendt, Axel Jantsch, Albert Treytl, Thilo Sauter:
SAMBA: A self-aware health monitoring architecture for distributed industrial systems. IECON 2017: 3512-3517 - [c161]Junshi Wang, Letian Huang, Masoumeh Ebrahimi, Qiang Li, Guangjun Li, Axel Jantsch:
Non-blocking BIST for continuous reliability monitoring of Networks-on-Chip. ISCAS 2017: 1-4 - [c160]Matthias Wess, Sai Manoj P. D., Axel Jantsch:
Neural network based ECG anomaly detection on FPGA and trade-off analysis. ISCAS 2017: 1-4 - [c159]Nikil D. Dutt, Amir M. Rahmani, Axel Jantsch:
Empowering autonomy through self-awareness in MPSoCs. NEWCAS 2017: 73-76 - [c158]Maximilian Götzinger, Martin Pongratz, Amir-Mohammad Rahmani, Axel Jantsch:
Parallelized Flight Path Prediction using a Graphics Processing Unit. VISIGRAPP (6: VISAPP) 2017: 386-393 - [c157]Carna Radojicic, Christoph Grimm, Axel Jantsch, Michael Rathmair:
Towards Verification of Uncertain Cyber-Physical Systems. SNR@ETAPS 2017: 1-17 - [p4]Ingo Sander, Axel Jantsch, Seyed-Hosein Attarzadeh-Niaki:
ForSyDe: System Design Using a Functional Language and Models of Computation. Handbook of Hardware/Software Codesign 2017: 99-140 - [e5]Axel Jantsch, Hiroki Matsutani, Zhonghai Lu, Ümit Y. Ogras:
Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2017, Seoul, Republic of Korea, October 19 - 20, 2017. ACM 2017, ISBN 978-1-4503-4984-0 [contents] - 2016
- [j54]Letian Huang, Junshi Wang, Masoumeh Ebrahimi, Masoud Daneshtalab, Xiaofan Zhang, Guangjun Li, Axel Jantsch:
Non-Blocking Testing for Network-on-Chip. IEEE Trans. Computers 65(3): 679-692 (2016) - [j53]Nikil D. Dutt, Axel Jantsch, Santanu Sarma:
Toward Smart Embedded Systems: A Self-aware System-on-Chip (SoC) Perspective. ACM Trans. Embed. Comput. Syst. 15(2): 22:1-22:27 (2016) - [j52]Fahimeh Jafari, Axel Jantsch, Zhonghai Lu:
Weighted Round Robin Configuration for Worst-Case Delay Optimization in Network-on-Chip. IEEE Trans. Very Large Scale Integr. Syst. 24(12): 3387-3400 (2016) - [c156]Junshi Wang, Letian Huang, Qiang Li, Guangjun Li, Axel Jantsch:
Optimizing the location of ECC protection in network-on-chip. CODES+ISSS 2016: 19:1-19:10 - [c155]Nima Taherinejad, Axel Jantsch, David Pollreisz:
Comprehensive Observation and its Role in Self-Awareness; An Emotion Recognition System Example. FedCSIS (Position Papers) 2016: 117-124 - [c154]Christian Krieg, Clifford Wolf, Axel Jantsch:
Malicious LUT: a stealthy FPGA trojan injected and triggered by the design flow. ICCAD 2016: 43 - [c153]Anil Kanduri, Mohammad Hashem Haghbayan, Amir-Mohammad Rahmani, Pasi Liljeberg, Axel Jantsch, Nikil D. Dutt, Hannu Tenhunen:
Approximation knob: power capping meets energy efficiency. ICCAD 2016: 122 - [c152]Nima Taherinejad, Sai Manoj P. D., Michael Rathmair, Axel Jantsch:
Fully digital write-in scheme for multi-bit memristive storage. CCE 2016: 1-6 - [c151]Junshi Wang, Yang Huang, Masoumeh Ebrahimi, Letian Huang, Qiang Li, Axel Jantsch, Guangjun Li:
VisualNoC: A Visualization and Evaluation Environment for Simulation and Mapping. MES@ISCA 2016: 18-25 - [c150]Maximilian Gotzinger, Amir M. Rahmani, Martin Pongratz, Pasi Liljeberg, Axel Jantsch, Hannu Tenhunen:
The Role of Self-Awareness and Hierarchical Agents in Resource Management for Many-Core Systems. MCSoC 2016: 53-60 - [c149]Maximilian Götzinger, Nima Taherinejad, Amir M. Rahmani, Pasi Liljeberg, Axel Jantsch, Hannu Tenhunen:
Enhancing the Early Warning Score System Using Data Confidence. MobiHealth 2016: 91-99 - 2015
- [j51]Jürgo-Sören Preden, Kalle Tammemäe, Axel Jantsch, Mairo Leier, Andri Riid, Emine Calis:
The Benefits of Self-Awareness and Attention in Fog and Mist Computing. Computer 48(7): 37-45 (2015) - [j50]Andreas Steininger, Horst Zimmermann, Axel Jantsch, Michael Hofbauer, Ulrich Schmid, Kurt Schweiger, Varadan Savulimedu Veeravalli:
Building reliable systems-on-chip in nanoscale technologies. Elektrotech. Informationstechnik 132(6): 301-306 (2015) - [j49]Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen, Yang Guo, Shenggang Chen, Hu Chen:
Performance Analysis of Homogeneous On-Chip Large-Scale Parallel Computing Architectures for Data-Parallel Applications. J. Electr. Comput. Eng. 2015: 902591:1-902591:20 (2015) - [j48]Shaoteng Liu, Axel Jantsch, Zhonghai Lu:
MultiCS: Circuit switched NoC with multiple sub-networks and sub-channels. J. Syst. Archit. 61(9): 423-434 (2015) - [j47]Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen, Yang Guo, Shenggang Chen, Hu Chen, Man Liao:
Command-Triggered Microcode Execution for Distributed Shared Memory Based Multi-Core Network-on-Chips. J. Softw. 10(2): 142-161 (2015) - [j46]Awet Yemane Weldezion, Matt Grange, Axel Jantsch, Hannu Tenhunen, Dinesh Pamunuwa:
Zero-load predictive model for performance analysis in deflection routing NoCs. Microprocess. Microsystems 39(8): 634-647 (2015) - [j45]Fahimeh Jafari, Zhonghai Lu, Axel Jantsch:
Least Upper Delay Bound for VBR Flows in Networks-on-Chip with Virtual Channels. ACM Trans. Design Autom. Electr. Syst. 20(3): 35:1-35:33 (2015) - [c148]Chaochao Feng, Zhuofan Liao, Zhonghai Lu, Axel Jantsch, Zhenyu Zhao:
Performance analysis of on-chip bufferless router with multi-ejection ports. ASICON 2015: 1-4 - [c147]Yuang Zhang, Li Li, Axel Jantsch, Zhonghai Lu, Minglun Gao, Yuxiang Fu, Hongbing Pan:
Exploring stacked main memory architecture for 3D GPGPUs. ASICON 2015: 1-4 - [c146]Runan Ma, Zhida Hui, Axel Jantsch:
A packet-switched interconnect for many-core systems with BE and RT service. DATE 2015: 980-983 - [c145]Nima Taherinejad, Sai Manoj P. D., Axel Jantsch:
Memristors' Potential for Multi-bit Storage and Pattern Learning. EMS 2015: 450-455 - [c144]Nikil D. Dutt, Axel Jantsch, Santanu Sarma:
Self-Aware Cyber-Physical Systems-on-Chip. ICCAD 2015: 46-50 - [c143]Anil Kanduri, Mohammad Hashem Haghbayan, Amir-Mohammad Rahmani, Pasi Liljeberg, Axel Jantsch, Hannu Tenhunen:
Dark silicon aware runtime mapping for many-core systems: A patterning approach. ICCD 2015: 573-580 - [c142]Amir-Mohammad Rahmani, Mohammad Hashem Haghbayan, Anil Kanduri, Awet Yemane Weldezion, Pasi Liljeberg, Juha Plosila, Axel Jantsch, Hannu Tenhunen:
Dynamic power management for many-core platforms in the dark silicon era: A multi-objective control approach. ISLPED 2015: 219-224 - [c141]Xiaowen Chen, Zhonghai Lu, Yang Li, Axel Jantsch, Xueqian Zhao, Shuming Chen, Yang Guo, Zonglin Liu, Jianzhuang Lu, Jianghua Wan, Shuwei Sun, Shenggang Chen, Hu Chen:
Achieving Memory Access Equalization Via Round-Trip Routing Latency Prediction in 3D Many-Core NoCs. ISVLSI 2015: 398-403 - [c140]Junshi Wang, Masoumeh Ebrahimi, Letian Huang, Axel Jantsch, Guangjun Li:
Design of Fault-Tolerant and Reliable Networks-on-Chip. ISVLSI 2015: 545-550 - [c139]Shaoteng Liu, Zhonghai Lu, Axel Jantsch:
Highway in TDM NoCs. NOCS 2015: 15:1-15:8 - [c138]Mohammad Hashem Haghbayan, Anil Kanduri, Amir-Mohammad Rahmani, Pasi Liljeberg, Axel Jantsch, Hannu Tenhunen:
MapPro: Proactive Runtime Mapping for Dynamic Workloads by Quantifying Ripple Effect of Applications on Networks-on-Chip. NOCS 2015: 26:1-26:8 - [c137]Xiaofan Zhang, Masoumeh Ebrahimi, Letian Huang, Guangjun Li, Axel Jantsch:
A Routing-Level Solution for Fault Detection, Masking, and Tolerance in NoCs. PDP 2015: 365-369 - 2014
- [j44]Martin Radetzki, Axel Jantsch:
Editorial introduction - Special issue on languages, models and model based design for embedded systems. Des. Autom. Embed. Syst. 18(1-2): 61-62 (2014) - [j43]Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen, Yang Guo, Hengzhu Liu:
Cooperative communication for efficient and scalable all-to-all barrier synchronization on mesh-based many-core NoCs. IEICE Electron. Express 11(18): 20140542 (2014) - [j42]Yuang Zhang, Li Li, Zhonghai Lu, Axel Jantsch, Minglun Gao, Hongbing Pan, Feng Han:
A survey of memory architecture for 3D chip multi-processors. Microprocess. Microsystems 38(5): 415-430 (2014) - [j41]Shaoteng Liu, Axel Jantsch, Zhonghai Lu:
A Fair and Maximal Allocator for Single-Cycle On-Chip Homogeneous Resource Allocation. IEEE Trans. Very Large Scale Integr. Syst. 22(10): 2229-2233 (2014) - [c136]Axel Jantsch, Kalle Tammemäe:
A framework of awareness for artificial subjects. CODES+ISSS 2014: 20:1-20:3 - [c135]Shaoteng Liu, Axel Jantsch, Zhonghai Lu:
Parallel probe based dynamic connection setup in TDM NoCs. DATE 2014: 1-6 - [c134]Masoumeh Ebrahimi, Junshi Wang, Letian Huang, Masoud Daneshtalab, Axel Jantsch:
Rescuing healthy cores against disabled routers. DFT 2014: 98-103 - [c133]Mohammad Hashem Haghbayan, Amir-Mohammad Rahmani, Awet Yemane Weldezion, Pasi Liljeberg, Juha Plosila, Axel Jantsch, Hannu Tenhunen:
Dark silicon aware power management for manycore systems under dynamic workloads. ICCD 2014: 509-512 - [c132]Yuang Zhang, Li Li, Zhonghai Lu, Axel Jantsch, Yuxiang Fu, Minglun Gao:
Performance and network power evaluation of tightly mixed SRAM NUCA for 3D Multi-core Network on Chips. ISCAS 2014: 1961-1964 - 2013
- [j40]Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen, Shenggang Chen, Huitao Gu:
Reducing Virtual-to-Physical address translation overhead in Distributed Shared Memory based multi-core Network-on-Chips according to data property. Comput. Electr. Eng. 39(2): 596-612 (2013) - [j39]Abbas Eslami Kiasari, Axel Jantsch, Zhonghai Lu:
Mathematical formalisms for performance evaluation of networks-on-chip. ACM Comput. Surv. 45(3): 38:1-38:41 (2013) - [j38]Martin Radetzki, Chaochao Feng, Xueqian Zhao, Axel Jantsch:
Methods for fault tolerance in networks-on-chip. ACM Comput. Surv. 46(1): 8:1-8:38 (2013) - [j37]Abdul Naeem, Axel Jantsch, Zhonghai Lu:
Scalability Analysis of Memory Consistency Models in NoC-Based Distributed Shared Memory SoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(5): 760-773 (2013) - [j36]Abbas Eslami Kiasari, Zhonghai Lu, Axel Jantsch:
An Analytical Latency Model for Networks-on-Chip. IEEE Trans. Very Large Scale Integr. Syst. 21(1): 113-123 (2013) - [j35]Chaochao Feng, Zhonghai Lu, Axel Jantsch, Minxuan Zhang, Zuocheng Xing:
Addressing Transient and Permanent Faults in NoC With Efficient Fault-Tolerant Deflection Router. IEEE Trans. Very Large Scale Integr. Syst. 21(6): 1053-1066 (2013) - [c131]Awet Yemane Weldezion, Matt Grange, Dinesh Pamunuwa, Axel Jantsch, Hannu Tenhunen:
A scalable multi-dimensional NoC simulation model for diverse spatio-temporal traffic patterns. 3DIC 2013: 1-5 - [c130]Shaoteng Liu, Axel Jantsch, Zhonghai Lu:
Analysis and Evaluation of Circuit Switched NoC and Packet Switched NoC. DSD 2013: 21-28 - [c129]Jiajie Zhang, Zheng Yu, Zhiyi Yu, Kexin Zhang, Zhonghai Lu, Axel Jantsch:
Efficient distributed memory management in a multi-core H.264 decoder on FPGA. ISSoC 2013: 1-4 - [c128]Ahsen Ejaz, Axel Jantsch:
Costs and benefits of flexibility in spatial division circuit switched networks-on-chip. NoCArc@MICRO 2013: 41-46 - 2012
- [j34]Wenmin Hu, Hengzhu Liu, Zhonghai Lu, Axel Jantsch, Guitao Fu:
Self-selection pseudo- circuit: a clever crossbar pre-allocation. IEICE Electron. Express 9(6): 558-564 (2012) - [j33]Chaochao Feng, Zhonghai Lu, Axel Jantsch, Minxuan Zhang, Xianju Yang:
Support Efficient and Fault-Tolerant Multicast in Bufferless Network-on-Chip. IEICE Trans. Inf. Syst. 95-D(4): 1052-1061 (2012) - [j32]Chaochao Feng, Zhonghai Lu, Axel Jantsch, Minxuan Zhang:
A 1-Cycle 1.25 GHz Bufferless Router for 3D Network-on-Chip. IEICE Trans. Inf. Syst. 95-D(5): 1519-1522 (2012) - [j31]Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, Li-Rong Zheng:
Performance Analysis of Flow-Based Traffic Splitting Strategy on Cluster-Mesh Sensor Networks. Int. J. Distributed Sens. Networks 8 (2012) - [j30]Ming Liu, Zhonghai Lu, Wolfgang Kuehn, Axel Jantsch:
A Survey of FPGA Dynamic Reconfiguration Design Methodology and Applications. Int. J. Embed. Real Time Commun. Syst. 3(2): 23-39 (2012) - [j29]Wenmin Hu, Zhonghai Lu, Hengzhu Liu, Axel Jantsch:
TPSS: A Flexible Hardware Support for Unicast and Multicast on Network-on-Chip. J. Comput. 7(7): 1743-1752 (2012) - [j28]Jun Zhu, Ingo Sander, Axel Jantsch:
Performance Analysis of Reconfigurations in Adaptive Real-Time Streaming Applications. ACM Trans. Embed. Comput. Syst. 11(S1): 12 (2012) - [c127]Abbas Eslami Kiasari, Axel Jantsch, Marco Bekooij, Alan Burns, Zhonghai Lu:
Analytical approaches for performance evaluation of networks-on-chip. CASES 2012: 211-212 - [c126]Fahimeh Jafari, Axel Jantsch, Zhonghai Lu:
Worst-case delay analysis of Variable Bit-Rate flows in network-on-chip with aggregate scheduling. DATE 2012: 538-541 - [c125]Shaoteng Liu, Axel Jantsch, Zhonghai Lu:
Parallel probing: Dynamic and constant time setup procedure in circuit switching NoC. DATE 2012: 1289-1294 - [c124]Abdul Naeem, Axel Jantsch, Zhonghai Lu:
Architecture Support and Comparison of Three Memory Consistency Models in NoC Based Systems. DSD 2012: 304-311 - [c123]Abdul Naeem, Axel Jantsch, Zhonghai Lu:
Scalability analysis of release and sequential consistency models in NoC based multicore systems. ISSoC 2012: 1-7 - [c122]Huimin She, Zhonghai Lu, Axel Jantsch:
System-level evaluation of sensor networks deployment strategies: Coverage, lifetime and cost. IWCMC 2012: 549-554 - [c121]Syed M. A. H. Jafri, Liang Guang, Axel Jantsch, Kolin Paul, Ahmed Hemani, Hannu Tenhunen:
Self-adaptive Noc Power Management with Dual-level Agents - Architecture and Implementation. PECCS 2012: 450-458 - 2011
- [j27]Ming Liu, Wolfgang Kuehn, S. Lange, Shuo Yang, J. Roskoss, Zhonghai Lu, Axel Jantsch, Qiang Wang, Hao Xu, Dapeng Jin:
A High-End Reconfigurable Computation Platform for Nuclear and Particle Physics Experiments. Comput. Sci. Eng. 13(2): 52-63 (2011) - [j26]Ming Liu, Zhonghai Lu, Wolfgang Kuehn, Axel Jantsch:
FPGA-Based Particle Recognition in the HADES Experiment. IEEE Des. Test Comput. 28(4): 48-57 (2011) - [j25]Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Zhonghai Lu, Dimitrios Soudris, Axel Jantsch:
Custom Microcoded Dynamic Memory Management for Distributed On-Chip Memory Organizations. IEEE Embed. Syst. Lett. 3(2): 66-69 (2011) - [j24]Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen, Hai Liu:
Cooperative communication based barrier synchronization in on-chip mesh architectures. IEICE Electron. Express 8(22): 1856-1862 (2011) - [j23]Xiaowen Chen, Shuming Chen, Zhonghai Lu, Axel Jantsch:
Hybrid Distributed Shared Memory Space in Multi-core Processors. J. Softw. 6(12): 2369-2378 (2011) - [c120]Ming Liu, Zhonghai Lu, Wolfgang Kuehn, Axel Jantsch:
FPGA-Based Cherenkov Ring Recognition in Nuclear and Particle Physics Experiments. ARC 2011: 169-180 - [c119]Chaochao Feng, Jinwen Li, Zhonghai Lu, Axel Jantsch, Minxuan Zhang:
Evaluation of deflection routing on various NoC topologies. ASICON 2011: 163-166 - [c118]Abdul Naeem, Xiaowen Chen, Zhonghai Lu, Axel Jantsch:
Realization and performance comparison of sequential and weak memory consistency models in network-on-chip based multi-core systems. ASP-DAC 2011: 154-159 - [c117]Wenmin Hu, Zhonghai Lu, Axel Jantsch, Hengzhu Liu:
Power-efficient tree-based multicast support for Networks-on-Chip. ASP-DAC 2011: 363-368 - [c116]Abdul Naeem, Axel Jantsch, Xiaowen Chen, Zhonghai Lu:
Realization and Scalability of Release and Protected Release Consistency Models in NoC Based Systems. DSD 2011: 47-54 - [c115]Matthew Grange, Axel Jantsch, Roshan Weerasekera, Dinesh Pamunuwa:
Modeling the computational efficiency of 2-D and 3-D silicon processors for early-chip planning. ICCAD 2011: 310-317 - [c114]Fahimeh Jafari, Axel Jantsch, Zhonghai Lu:
Output process of variable bit-rate flows in on-chip networks based on aggregate scheduling. ICCD 2011: 445-446 - [c113]Chaochao Feng, Minxuan Zhang, Jinwen Li, Jiang Jiang, Zhonghai Lu, Axel Jantsch:
A Low-Overhead Fault-Aware Deflection Routing Algorithm for 3D Network-on-Chip. ISVLSI 2011: 19-24 - [c112]Matt Grange, Roshan Weerasekera, Dinesh Pamunuwa, Axel Jantsch, Awet Yemane Weldezion:
Optimal network architectures for minimizing average distance in k-ary n-dimensional mesh networks. NOCS 2011: 57-64 - [c111]Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, Li-Rong Zheng:
Stochastic coverage in event-driven sensor networks. PIMRC 2011: 915-919 - [c110]Meganathan Deivasigamani, Shaghayeghsadat Tabatabaei, Naveed Ul Mustafa, Hamza Ijaz, Haris Bin Aslam, Shaoteng Liu, Axel Jantsch:
Concept and design of exhaustive-parallel search algorithm for Network-on-Chip. SoCC 2011: 150-155 - [c109]Wenmin Hu, Zhonghai Lu, Axel Jantsch, Hengzhu Liu, Botao Zhang, Dongpei Liu:
Network-on-Chip multicasting with low latency path setup. VLSI-SoC 2011: 290-295 - [c108]Dinesh Pamunuwa, Matthew Grange, Roshan Weerasekera, Axel Jantsch:
3-D integration and the limits of silicon computation. VLSI-SoC 2011: 343-348 - [c107]Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, Li-Rong Zheng:
Modeling and analysis of Rayleigh fading channels using stochastic network calculus. WCNC 2011: 1056-1061 - [p3]Axel Jantsch, Matthew Grange, Dinesh Pamunuwa:
The Promises and Limitations of 3-D Integration. 3D Integration for NoC-based SoC Architectures 2011: 27-44 - [e4]Abbas Sheibanyrad, Frédéric Pétrot, Axel Jantsch:
3D Integration for NoC-based SoC Architectures. Integrated Circuits and Systems, Springer 2011, ISBN 978-1-4419-7617-8 [contents] - 2010
- [j22]Radu Marculescu, Axel Jantsch:
Guest Editorial: Special Section on the ACM/IEEE Symposium on Networks-on-Chip 2009. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(6): 853-854 (2010) - [j21]Fahimeh Jafari, Zhonghai Lu, Axel Jantsch, Mohammad Hossien Yaghmaee:
Buffer Optimization in Network-on-Chip Through Flow Regulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(12): 1973-1986 (2010) - [c106]Jun Zhu, Ingo Sander, Axel Jantsch:
Constrained global scheduling of streaming applications on MPSoCs. ASP-DAC 2010: 223-228 - [c105]Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen:
Supporting Distributed Shared Memory on multi-core Network-on-Chips using a dual microcoded controller. DATE 2010: 39-44 - [c104]Ming Liu, Zhonghai Lu, Wolfgang Kuehn, Axel Jantsch:
FPGA-based adaptive computing for correlated multi-stream processing. DATE 2010: 973-976 - [c103]Jun Zhu, Ingo Sander, Axel Jantsch:
Pareto efficient design for reconfigurable streaming applications on CPU/FPGAs. DATE 2010: 1035-1040 - [c102]Fahimeh Jafari, Zhonghai Lu, Axel Jantsch, Mohammad Hossien Yaghmaee:
Optimal regulation of traffic flows in networks-on-chip. DATE 2010: 1621-1624 - [c101]Amr Helmy, Laurence Pierre, Axel Jantsch:
Theorem proving techniques for the formal verification of NoC communications with non-minimal adaptive routing. DDECS 2010: 221-224 - [c100]Jun Zhu, Ingo Sander, Axel Jantsch:
HetMoC: Heterogeneous Modelling in SystemC. FDL 2010: 117-122 - [c99]Abdul Naeem, Xiaowen Chen, Zhonghai Lu, Axel Jantsch:
Scalability of weak consistency in NoC based multicore architectures. ISCAS 2010: 3497-3500 - [c98]Ming Liu, Zhonghai Lu, Wolfgang Kuehn, Axel Jantsch:
Inter-process Communication Using Pipes in FPGA-Based Adaptive Computing. ISVLSI 2010: 80-85 - [c97]Bernard Candaele, Sylvain Aguirre, Michel Sarlotte, Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Dimitris Bekiaris, Dimitrios Soudris, Zhonghai Lu, Xiaowen Chen, Jean-Michel Chabloz, Ahmed Hemani, Axel Jantsch, Geert Vanmeerbeeck, Jari Kreku, Kari Tiensyrjä, Fragkiskos Ieromnimon, Dimitrios Kritharidis, Andreas Wiefrink, Bart Vanthournout, Philippe Martin:
The MOSART Mapping Optimization for Multi-Core ARchiTectures. ISVLSI (Selected papers) 2010: 181-195 - [c96]Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen, Jianzhuang Lu, Hucheng Wu:
Supporting Efficient Synchronization in Multi-core NoCs Using Dynamic Buffer Allocation Technique. ISVLSI 2010: 462-463 - [c95]Bernard Candaele, Sylvain Aguirre, Michel Sarlotte, Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Dimitris Bekiaris, Dimitrios Soudris, Zhonghai Lu, Xiaowen Chen, Jean-Michel Chabloz, Ahmed Hemani, Axel Jantsch, Geert Vanmeerbeeck, Jari Kreku, Kari Tiensyrjä, Fragkiskos Ieromnimon, Dimitrios Kritharidis, Andreas Wiefrink, Bart Vanthournout, Philippe Martin:
Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach. ISVLSI 2010: 518-523 - [c94]Chaochao Feng, Zhonghai Lu, Axel Jantsch, Jinwen Li, Minxuan Zhang:
A reconfigurable fault-tolerant deflection routing algorithm based on reinforcement learning for network-on-chip. NoCArc@MICRO 2010: 11-16 - [c93]Abbas Eslami Kiasari, Axel Jantsch, Zhonghai Lu:
A framework for designing congestion-aware deterministic routing. NoCArc@MICRO 2010: 45-50 - [c92]Zhipeng Chen, Axel Jantsch:
A Worst Case Performance Model for TDM Virtual Circuit in NoCs. NPC 2010: 452-461 - [c91]Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen:
Run-Time Partitioning of Hybrid Distributed Shared Memory on Multi-core Network-on-Chips. PAAP 2010: 39-46 - [c90]Ming Liu, Zhonghai Lu, Wolfgang Kuehn, Axel Jantsch:
Reducing FPGA Reconfiguration Time Overhead using Virtual Configurations. ReCoSoC 2010: 149-152 - [c89]Chaochao Feng, Zhonghai Lu, Axel Jantsch, Jinwen Li, Minxuan Zhang:
FoN: Fault-on-Neighbor aware routing algorithm for Networks-on-Chip. SoCC 2010: 441-446 - [c88]Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen:
Handling shared variable synchronization in multi-core Network-on-Chips with distributed memory. SoCC 2010: 467-472
2000 – 2009
- 2009
- [j20]Abdul Naeem, Xiaowen Chen, Zhonghai Lu, Axel Jantsch:
Scalability of relaxed consistency models in NoC based multicore architectures. SIGARCH Comput. Archit. News 37(5): 8-15 (2009) - [c87]Matt Grange, Awet Yemane Weldezion, Dinesh Pamunuwa, Roshan Weerasekera, Zhonghai Lu, Axel Jantsch, Dave Shippen:
Physical mapping and performance study of a multi-clock 3-Dimensional Network-on-Chip mesh. 3DIC 2009: 1-7 - [c86]Zhonghai Lu, Mikael Millberg, Axel Jantsch, Alistair C. Bruce, Pieter van der Wolf, Tomas Henriksson:
Flow regulation for on-chip communication. DATE 2009: 578-581 - [c85]Mikael Millberg, Axel Jantsch:
Priority based forced requeue to reduce worst-case latencies for bursty traffic. DATE 2009: 1070-1075 - [c84]Jun Zhu, Ingo Sander, Axel Jantsch:
Buffer minimization of real-time streaming applications scheduling on hybrid CPU/FPGA architectures. DATE 2009: 1506-1511 - [c83]Ming Liu, Wolfgang Kuehn, Zhonghai Lu, Axel Jantsch:
Run-time Partial Reconfiguration speed investigation and architectural design space exploration. FPL 2009: 498-502 - [c82]Ingo Sander, Jun Zhu, Axel Jantsch, Andreas Herrholz, Philipp A. Hartmann, Wolfgang Nebel:
High-level estimation and trade-off analysis for adaptive real-time systems. IPDPS 2009: 1-4 - [c81]Awet Yemane Weldezion, Matt Grange, Dinesh Pamunuwa, Zhonghai Lu, Axel Jantsch, Roshan Weerasekera, Hannu Tenhunen:
Scalability of network-on-chip communication architecture for 3-D meshes. NOCS 2009: 114-123 - [c80]Ming Liu, Zhonghai Lu, Wolfgang Kuehn, Shuo Yang, Axel Jantsch:
A Reconfigurable Design Framework for FPGA Adaptive Computing. ReConFig 2009: 439-444 - [c79]Zhonghai Lu, Dimitris Brachos, Axel Jantsch:
A flow regulator for On-Chip Communication. SoCC 2009: 151-154 - [c78]Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, Li-Rong Zheng:
Analytical Evaluation of Retransmission Schemes in Wireless Sensor Networks. VTC Spring 2009 - [p2]Axel Jantsch:
Models of Embedded Computation for Distributed Embedded Systems. Embedded Systems Design and Verification 2009: 3 - 2008
- [j19]Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch:
SML-Sys: a functional framework with multiple models of computation for modeling heterogeneous system. Des. Autom. Embed. Syst. 12(1-2): 1-30 (2008) - [j18]Christoph Grimm, Axel Jantsch, Sandeep Kumar Shukla, Eugenio Villar:
C-Based Design of Heterogeneous Embedded Systems. EURASIP J. Embed. Syst. 2008 (2008) - [j17]Tiberiu Seceleanu, Axel Jantsch:
Modeling Communication with Synchronized Environments. Fundam. Informaticae 86(3): 343-369 (2008) - [j16]Arseni Vitkovski, Axel Jantsch, Robert Lauter, Raimo Haukilahti, Erland Nilsson:
Low-power and error protection coding for network-on-chip traffic. IET Comput. Digit. Tech. 2(6): 483-492 (2008) - [j15]Tarvo Raudvere, Ingo Sander, Axel Jantsch:
Application and Verification of Local Nonsemantic-Preserving Transformations in System Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(6): 1091-1103 (2008) - [j14]Iyad Al Khatib, Francesco Poletti, Davide Bertozzi, Luca Benini, Mohamed Bechara, Hasan Khalifeh, Axel Jantsch, Rustam Nabiev:
A multiprocessor system-on-chip for real-time biomedical monitoring and analysis: ECG prototype architectural design space exploration. ACM Trans. Design Autom. Electr. Syst. 13(2): 31:1-31:21 (2008) - [j13]Zhonghai Lu, Axel Jantsch:
TDM Virtual-Circuit Configuration for Network-on-Chip. IEEE Trans. Very Large Scale Integr. Syst. 16(8): 1021-1034 (2008) - [c77]Eugenio Villar, Axel Jantsch, Christoph Grimm, Tim Kogel:
Heterogeneous System-level Specification Using SystemC. DATE 2008 - [c76]Zhonghai Lu, Lei Xia, Axel Jantsch:
Cluster-based Simulated Annealing for Mapping Cores onto 2D Mesh Networks on Chip. DDECS 2008: 92-97 - [c75]Ming Liu, Wolfgang Kuehn, Zhonghai Lu, Axel Jantsch:
System-on-an-FPGA Design for Real-time Particle Track Recognition and Reconstruction in Physics Experiments. DSD 2008: 599-605 - [c74]Jun Zhu, Ingo Sander, Axel Jantsch:
Energy efficient streaming applications with guaranteed throughput on MPSoCs. EMSOFT 2008: 119-128 - [c73]Jun Zhu, Ingo Sander, Axel Jantsch:
Performance analysis of reconfiguration in adaptive real-time streaming applications. ESTIMedia 2008: 53-58 - [c72]Ming Liu, Johannes Lang, Shuo Yang, Tiago Perez, Wolfgang Kuehn, Hao Xu, Dapeng Jin, Qiang Wang, Lu Li, Zhen'An Liu, Zhonghai Lu, Axel Jantsch:
ATCA-based computation platform for data acquisition and triggering in particle physics experiments. FPL 2008: 287-292 - 2007
- [j12]Erik Jan Marinissen, Axel Jantsch, Nicola Nicolici:
DATE 07 workshop on diagnostic services in NoCs. IEEE Des. Test Comput. 24(5): 510 (2007) - [j11]Zhonghai Lu, Axel Jantsch:
Admitting and ejecting flits in wormhole-switched networks on chip. IET Comput. Digit. Tech. 1(5): 546-556 (2007) - [j10]Iyad Al Khatib, Davide Bertozzi, Francesco Poletti, Luca Benini, Axel Jantsch, Mohamed Bechara, Hasan Khalifeh, Mazen Hajjar, Rustam Nabiev, Sven Jonsson:
Hardware/Software Architecture for Real-Time ECG Monitoring and Analysis Leveraging MPSoC Technology. Trans. High Perform. Embed. Archit. Compil. 1: 239-258 (2007) - [j9]Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch:
EWD: A metamodeling driven customizable multi-MoC system modeling framework. ACM Trans. Design Autom. Electr. Syst. 12(3): 33:1-33:43 (2007) - [c71]Tarvo Raudvere, Ingo Sander, Axel Jantsch:
Synchronization after design refinements with sensitive delay elements. CODES+ISSS 2007: 21-26 - [c70]Iyad Al Khatib, Davide Bertozzi, Axel Jantsch, Luca Benini:
Performance analysis and design space exploration for high-end biomedical applications: challenges and solutions. CODES+ISSS 2007: 217-226 - [c69]Zhonghai Lu, Ming Liu, Axel Jantsch:
Layered Switching for Networks on Chip. DAC 2007: 122-127 - [c68]Mikael Millberg, Axel Jantsch:
Increasing NoC Performance and Utilisation using a Dual Packet Exit Strategy. DSD 2007: 511-518 - [c67]Tomas Henriksson, Pieter van der Wolf, Axel Jantsch, Alistair C. Bruce:
Network Calculus Applied to Verification of Memory Access Performance in SoCs. ESTIMedia 2007: 21-26 - [c66]Huimin She, Zhonghai Lu, Axel Jantsch, Li-Rong Zheng, Dian Zhou:
Traffic Splitting with Network Calculus for Mesh Sensor Networks. FGCN (2) 2007: 368-373 - [c65]Andreas Herrholz, Frank Oppenheimer, Philipp A. Hartmann, Andreas Schallenberg, Wolfgang Nebel, Christoph Grimm, Markus Damm, Jan Haase, Florian Brame, Fernando Herrera, Eugenio Villar, Ingo Sander, Axel Jantsch, Anne-Marie Fouilliart, Marcos Martínez:
The ANDRES Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems. FPL 2007: 396-401 - [c64]Ming Liu, Wolfgang Kuehn, Zhonghai Lu, Axel Jantsch, Shuo Yang, Tiago Perez, Zhen'An Liu:
Hardware/Software Co-design of a General-Purpose Computation Platform in Particle Physics. FPT 2007: 177-183 - [c63]Tarvo Raudvere, Ingo Sander, Axel Jantsch:
A synchronization algorithm for local temporal refinements in perfectly synchronous models with nested feedback loops. ACM Great Lakes Symposium on VLSI 2007: 353-358 - [c62]Zhonghai Lu, Axel Jantsch:
Slot allocation using logical networks for TDM virtual-circuit configuration for network-on-chip. ICCAD 2007: 18-25 - [c61]Cristian Grecu, André Ivanov, Partha Pratim Pande, Axel Jantsch, Erno Salminen, Ümit Y. Ogras, Radu Marculescu:
Towards Open Network-on-Chip Benchmarks. NOCS 2007: 205 - [c60]Per Badlund, Axel Jantsch:
An Analytical Approach for Dimensioning Mixed Traffic Networks. NOCS 2007: 215 - [c59]Mikael Millberg, Axel Jantsch:
A Study of NoC Exit Strategies. NOCS 2007: 217 - [c58]Zhonghai Lu, Jonas Sicking, Ingo Sander, Axel Jantsch:
Using Synchronizers for Refining Synchronous Communication onto Hardware/Software Architectures. IEEE International Workshop on Rapid System Prototyping 2007: 143-149 - [c57]Ingo Sander, Axel Jantsch:
Modelling Adaptive Systems in ForSyDe. VerAS@TPHOLs 2007: 39-54 - 2006
- [c56]Tiberiu Seceleanu, Axel Jantsch:
Communicating with Synchronized Environments. ACSD 2006: 15-24 - [c55]Axel Jantsch:
Models of Computation for Networks on Chip. ACSD 2006: 165-178 - [c54]Iyad Al Khatib, Davide Bertozzi, Francesco Poletti, Luca Benini, Axel Jantsch, Mohamed Bechara, Hasan Khalifeh, Mazen Hajjar, Rustam Nabiev, Sven Jonsson:
MPSoC ECG biochip: a multiprocessor system-on-chip for real-time human heart monitoring and analysis. Conf. Computing Frontiers 2006: 21-28 - [c53]Iyad Al Khatib, Francesco Poletti, Davide Bertozzi, Luca Benini, Mohamed Bechara, Hasan Khalifeh, Axel Jantsch, Rustam Nabiev:
A multiprocessor system-on-chip for real-time biomedical monitoring and analysis: architectural design space exploration. DAC 2006: 125-130 - [c52]Zhonghai Lu, Ingo Sander, Axel Jantsch:
Towards Performance-Oriented Pattern-Based Refinement of Synchronous Models onto NoC Communication. DSD 2006: 37-44 - [c51]Guang Liang, Axel Jantsch:
Adaptive Power Management for the On-Chip Communication Network. DSD 2006: 649-656 - [c50]Sandro Penolazzi, Axel Jantsch:
A High Level Power Model for the Nostrum NoC. DSD 2006: 673-676 - [c49]Rikard Thid, Ingo Sander, Axel Jantsch:
Flexible Bus and NoC Performance Analysis with Configurable Synthetic Workloads. DSD 2006: 681-688 - [c48]Zhonghai Lu, Mingchen Zhong, Axel Jantsch:
Evaluation of on-chip networks using deflection routing. ACM Great Lakes Symposium on VLSI 2006: 296-301 - [c47]Zhonghai Lu, Bei Yin, Axel Jantsch:
Connection-oriented Multicasting in Wormhole-switched Networks on Chip. ISVLSI 2006: 205-210 - [c46]Weixing Wang, Axel Jantsch:
An algorithm for electing cluster heads based on maximum residual energy. IWCMC 2006: 1465-1470 - [c45]Tiberiu Seceleanu, Axel Jantsch, Hannu Tenhunen:
On-Chip Distributed Architectures. SoCC 2006: 329-330 - 2005
- [c44]Zhonghai Lu, Axel Jantsch, Ingo Sander:
Feasibility analysis of messages for on-chip networks using wormhole routing. ASP-DAC 2005: 960-964 - [c43]Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch:
Modelling Environment for Heterogeneous Systems based on MoCs. FDL 2005: 291-303 - [c42]Zhonghai Lu, Ingo Sander, Axel Jantsch:
Refinement of Perfectly Synchronous Communication Model. FDL 2005: 453-465 - [c41]Tarvo Raudvere, Ashish Kumar Singh, Ingo Sander, Axel Jantsch:
System level verification of digital signal processing applications based on the polynomial abstraction technique. ICCAD 2005: 285-290 - [c40]Axel Jantsch, Robert Lauter, Arseni Vitkovski:
Power analysis of link level and end-to-end data protection in networks on chip. ISCAS (2) 2005: 1770-1773 - [c39]Zhonghai Lu, Axel Jantsch:
Traffic Configuration for Evaluating Networks on Chips. IWSOC 2005: 535-540 - [e3]Petru Eles, Axel Jantsch, Reinaldo A. Bergamaschi:
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2005, Jersey City, NJ, USA, September 19-21, 2005. ACM 2005, ISBN 1-59593-161-9 [contents] - [r1]Axel Jantsch:
Models of Embedded Computation. Embedded Systems Handbook 2005 - 2004
- [j8]Dinesh Pamunuwa, Johnny Öberg, Li-Rong Zheng, Mikael Millberg, Axel Jantsch, Hannu Tenhunen:
A study on the implementation of 2-D mesh-based networks-on-chip in the nanometre regime. Integr. 38(1): 3-17 (2004) - [j7]Axel Jantsch, Johnny Öberg, Hannu Tenhunen:
Special issue on networks on chip. J. Syst. Archit. 50(2-3): 61-63 (2004) - [j6]Ingo Sander, Axel Jantsch:
System modeling and transformational design refinement in ForSyDe [formal system design]. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(1): 17-32 (2004) - [c38]Abhijit K. Deb, Axel Jantsch, Johnny Öberg:
System design for DSP applications in transaction level modeling paradigm. DAC 2004: 466-471 - [c37]Abhijit K. Deb, Axel Jantsch, Johnny Öberg:
System Design for DSP Applications Using the MASIC Methodology. DATE 2004: 630-635 - [c36]Tarvo Raudvere, Ashish Kumar Singh, Ingo Sander, Axel Jantsch:
Polynomial Abstraction for Verification of Sequentially Implemented Combinational Circuits. DATE 2004: 690-691 - [c35]Mikael Millberg, Erland Nilsson, Rikard Thid, Axel Jantsch:
Guaranteed Bandwidth Using Looped Containers in Temporally Disjoint Networks within the Nostrum Network on Chip. DATE 2004: 890-895 - [c34]Zhonghai Lu, Axel Jantsch:
Flit admission in on-chip wormhole-switched networks with virtual channels. SoC 2004: 21-24 - [c33]Mikael Millberg, Erland Nilsson, Rikard Thid, Shashi Kumar, Axel Jantsch:
The Nostrum Backbone - a Communication Protocol Stack for Networks on Chip. VLSI Design 2004: 693-696 - [e2]Alex Orailoglu, Pai H. Chou, Petru Eles, Axel Jantsch:
Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2004, Stockholm, Sweden, September 8-10, 2004. ACM 2004, ISBN 1-58113-937-3 [contents] - 2003
- [b1]Axel Jantsch:
Modeling embedded systems and SoCs - concurrency and time in models of computation. The Morgan Kaufmann series in systems on silicon, Elsevier Morgan Kaufmann 2003, ISBN 978-1-55860-925-9, pp. I-XXII, 1-351 - [c32]Tarvo Raudvere, Ingo Sander, Ashish Kumar Singh, Axel Jantsch:
Verification of design decisions in ForSyDe. CODES+ISSS 2003: 176-181 - [c31]Heiko Zimmer, Axel Jantsch:
A fault model notation and error-control scheme for switch-to-switch buses in a network-on-chip. CODES+ISSS 2003: 188-193 - [c30]Ingo Sander, Axel Jantsch, Zhonghai Lu:
Development and Application of Design Transformations in ForSyDe. DATE 2003: 10364-10369 - [c29]Abhijit K. Deb, Johnny Öberg, Axel Jantsch:
Simulation and Analysis of Embedded DSP Systems Using MASIC Methodology. DATE 2003: 11100-11101 - [c28]Erland Nilsson, Mikael Millberg, Johnny Öberg, Axel Jantsch:
Load Distribution with the Proximity Congestion Awareness in a Network on Chip. DATE 2003: 11126-11127 - [c27]Axel Jantsch:
NoCs: A new Contract between Hardware and Software. DSD 2003: 10-16 - [c26]Abhijit K. Deb, Johnny Öberg, Axel Jantsch:
Simulation and Analysis of Embedded DSP Systems Using Petri Nets. IEEE International Workshop on Rapid System Prototyping 2003: 64-70 - [c25]Dinesh Pamunuwa, Johnny Öberg, Li-Rong Zheng, Mikael Millberg, Axel Jantsch:
Layout, Performance and Power Trade-Offs in Mesh-Based Network-on-Chip Architectures. VLSI-SOC 2003: 362- - [c24]Juha-Pekka Soininen, Axel Jantsch, Martti Forsell, Antti Pelkonen, Jari Kreku, Shashi Kumar:
Extending Platform-Based Design to Network on Chip Systems. VLSI Design 2003: 401- - [p1]Axel Jantsch, Hannu Tenhunen:
Will Networks on Chip Close the Productivity Gap? Networks on Chip 2003: 3-18 - [e1]Axel Jantsch, Hannu Tenhunen:
Networks on Chip. Kluwer / Springer 2003, ISBN 978-1-4020-7392-2 [contents] - 2002
- [c23]Per Bjuréus, Mikael Millberg, Axel Jantsch:
FPGA resource and timing estimation from Matlab execution traces. CODES 2002: 31-36 - [c22]Ingo Sander, Axel Jantsch:
Transformation based communication and clock domain refinement for system design. DAC 2002: 281-286 - [c21]Ingo Sander, Axel Jantsch, Zhonghai Lu:
A Case Study of Hardware and Software Synthesis in ForSyDe. ISSS 2002: 86-91 - [c20]Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnny Öberg, Juha-Pekka Soininen, Martti Forsell, Kari Tiensyrjä, Ahmed Hemani:
A Network on Chip Architecture and Design Methodology. ISVLSI 2002: 117-124 - 2001
- [j5]Mattias O'Nils, Axel Jantsch:
Device Driver and DMA Controller Synthesis from HW /SW Communication Protocol Specifications. Des. Autom. Embed. Syst. 6(2): 177-205 (2001) - [j4]Johnny Öberg, Mattias O'Nils, Axel Jantsch, Adam Postula, Ahmed Hemani:
Grammar-based design of embedded systems. J. Syst. Archit. 47(3-4): 225-240 (2001) - [j3]Per Bjuréus, Axel Jantsch:
Modeling of mixed control and dataflow systems in MASCOT. IEEE Trans. Very Large Scale Integr. Syst. 9(5): 690-703 (2001) - [c19]Axel Jantsch, Ingo Sander, Wenbiao Wu:
The usage of stochastic processes in embedded system specifications. CODES 2001: 5-10 - [c18]Per Bjuréus, Axel Jantsch:
Performance analysis with confidence intervals for embedded software processes. ISSS 2001: 45-50 - [c17]Abhijit K. Deb, Johnny Öberg, Axel Jantsch:
Control and communication performance analysis of embedded DSP systems in the MASIC methodology. ISSS 2001: 274-273 - 2000
- [j2]Axel Jantsch, Johann Notbauer, Thomas W. Albrecht:
Functional Validation of Mixed Hardware/Software Systems based on Specification, Partitioning, and Simulation of Test Cases. Des. Autom. Embed. Syst. 5(1): 83-113 (2000) - [j1]Axel Jantsch, Shashi Kumar, Ahmed Hemani:
A Metamodel for Studying Concepts in Electronic System Design. IEEE Des. Test Comput. 17(3): 78-85 (2000) - [c16]Axel Jantsch, Ingo Sander:
On the roles of functions and objects in system specification. CODES 2000: 8-12 - [c15]Axel Jantsch, Per Bjuréus:
Composite Signal Flow: A Computational Model Combining Events, Sampled Streams, and Vectors. DATE 2000: 154-160 - [c14]Per Bjuréus, Axel Jantsch:
MASCOT: A Specification and Cosimulation Method Integrating Data and Control Flow. DATE 2000: 161-168 - [c13]Johan Ditmar, Kjell Torkelsson, Axel Jantsch:
A Dynamically Reconfigurable FPGA-Based Content Addressable Memory for Internet Protocol Characterization. FPL 2000: 19-28
1990 – 1999
- 1999
- [c12]Ingo Sander, Axel Jantsch:
System synthesis utilizing a layered functional model. CODES 1999: 136-140 - [c11]Axel Jantsch, Shashi Kumar, Ahmed Hemani:
The Rugby Model: A Conceptual Frame for the Study of Modelling, Analysis and Synthesis Concepts of Electronic Systems. DATE 1999: 256-262 - [c10]Mattias O'Nils, Axel Jantsch:
Operating System Sensitive Device Driver Synthesis from Implementation Independent Protocol Specification. DATE 1999: 562-567 - [c9]Mattias O'Nils, Axel Jantsch:
Synthesis of DMA Controllers from Architecture Independent Descriptions of HW/SW Communication Protocols. VLSI Design 1999: 138-145 - [c8]Ingo Sander, Axel Jantsch:
Formal System Design Based on the Synchrony Hypothesis, Functional Models and Skeletons. VLSI Design 1999: 318-323 - 1998
- [c7]Mattias O'Nils, Johnny Öberg, Axel Jantsch:
Grammar Based Modelling and Synthesis of Device Drivers and Bus Interfaces. EUROMICRO 1998: 10055-10058 - [c6]Johnny Öberg, Axel Jantsch, Anshul Kumar:
An Object-Oriented Concept for Intelligent Library Functions. VLSI Design 1998: 355-358 - 1997
- [c5]Lars Hellberg, Ahmed Hemani, Jouni Isoaho, Axel Jantsch, Mehran Mokhtari, Hannu Tenhunen:
System oriented VLSI curriculum at KTH. MSE 1997: 57-59 - 1996
- [c4]Bengt Svantesson, Ahmed Hemani, Peeter Ellervee, Adam Postula, Johnny Öberg, Axel Jantsch, Hannu Tenhunen:
A Novell Allocation Strategy for Control and Memory Intensive Telecommunication Circiuts. VLSI Design 1996: 23-28 - [c3]Johnny Öberg, Jouni Isoaho, Peeter Ellervee, Axel Jantsch, Ahmed Hemani:
A Rule-Based Approach for Improving Allocation of Filter Structures in HLS. VLSI Design 1996: 133-139 - 1994
- [c2]Axel Jantsch, Peeter Ellervee, Ahmed Hemani, Johnny Öberg, Hannu Tenhunen:
Hardware/software partitioning and minimizing memory interface traffic. EURO-DAC 1994: 226-231 - [c1]Jouni Isoaho, Axel Jantsch, Hannu Tenhunen:
DSP Development with Full-Speed Prototyping Based on HW/SW Codesign Techniques. FPL 1994: 318-320
Coauthor Index
Sai Manoj Pudukotai Dinakarrao
aka: Sai Manoj P. D.
aka: Sai Manoj P. D.
Maximilian Götzinger
aka: Maximilian Gotzinger
aka: Maximilian Gotzinger
M. H. Haghbayan
aka: Mohammad Hashem Haghbayan
aka: Mohammad Hashem Haghbayan
[e5] [j52] [j49] [j48] [j47] [j45] [c148] [c147] [c141] [c139] [j43] [j42] [j41] [c135] [c132] [j40] [j39] [j37] [j36] [j35] [c130] [c129] [j34] [j33] [j32] [j31] [j30] [j29] [c127] [c126] [c125] [c124] [c123] [c122] [j27] [j26] [j25] [j24] [j23] [c120] [c119] [c118] [c117] [c116] [c114] [c113] [c111] [c109] [c107] [j21] [c105] [c104] [c102] [c99] [c98] [c97] [c96] [c95] [c94] [c93] [c91] [c90] [c89] [c88] [j20] [c87] [c86] [c83] [c81] [c80] [c79] [c78] [j13] [c76] [c75] [c72] [j11] [c69] [c66] [c64] [c62] [c58] [c52] [c48] [c47] [c44] [c42] [c39] [c34] [c30] [c21]
Amir-Mohammad Rahmani
aka: Amir M. Rahmani
aka: Amir M. Rahmani
Nima Taherinejad
aka: Nima TaheriNejad
aka: Nima TaheriNejad
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