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ORCIDTomas Henriksson
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2020 – today
- 2020
[c17]Renzo Andri, Tomas Henriksson, Luca Benini:
Extending the RISC-V ISA for Efficient RNN-based 5G Radio Resource Management. DAC 2020: 1-6
2010 – 2019
- 2016
- [c16]Daniel Günther, Tomas Henriksson, Rainer Leupers, Gerd Ascheid:
Mantissa-masking for energy-efficient floating-point LTE uplink MIMO baseband processing. DATE 2016: 1028-1029 - 2015
- [c15]Maximilian Odendahl, Andres Goens
, Rainer Leupers, Gerd Ascheid, Tomas Henriksson:
Buffer Allocation Based On-Chip Memory Optimization for Many-Core Platforms. IPDPS Workshops 2015: 1119-1124 - 2014
- [c14]Maximilian Odendahl, Andres Goens, Rainer Leupers, Gerd Ascheid, Benjamin Ries, Berthold Vöcking, Tomas Henriksson:
Optimized buffer allocation in multicore platforms. DATE 2014: 1-6
2000 – 2009
- 2009
- [c13]Zhonghai Lu, Mikael Millberg, Axel Jantsch, Alistair C. Bruce, Pieter van der Wolf, Tomas Henriksson:
Flow regulation for on-chip communication. DATE 2009: 578-581 - [c12]Peter Kollig, Colin Osborne, Tomas Henriksson:
Heterogeneous multi-core platform for consumer multimedia applications. DATE 2009: 1254-1259 - 2008
- [c11]Pieter van der Wolf, Tomas Henriksson:
Video Processing Requirements on SoC Infrastructures. DATE 2008: 1124-1125 - [c10]Jack Alexander Goossen, Tomas Henriksson:
Media Player Software in a System of Subsystems. WICSA 2008: 61-70 - 2007
- [c9]Tomas Henriksson, Pieter van der Wolf, Axel Jantsch, Alistair C. Bruce:
Network Calculus Applied to Verification of Memory Access Performance in SoCs. ESTIMedia 2007: 21-26 - 2006
- [c8]Tomas Henriksson, Pieter van der Wolf:
TTL Hardware Interface: A High-Level Interface for Streaming Multiprocessor Architectures. ESTIMedia 2006: 107-112 - 2005
- [c7]Tomas Henriksson, Jeffrey Kang, Pieter van der Wolf:
Implementation of dynamic streaming Applications on heterogeneous multi-Processor architectures. CODES+ISSS 2005: 57-62 - [c6]Jeffrey Kang, Tomas Henriksson, Pieter van der Wolf:
An Interface for the Design and Implementation of Dynamic Applications on Multi-Processor Architectures. ESTIMedia 2005: 101-106 - [r1]Tomas Henriksson, Gerben Essink, Pieter van der Wolf, Erwin A. de Kock, Wido Kruijtzer:
Design and Programming of Embedded Multiprocessors. Embedded Systems Handbook 2005 - 2004
- [c5]Pieter van der Wolf, Erwin A. de Kock, Tomas Henriksson, Wido Kruijtzer, Gerben Essink:
Design and programming of embedded multiprocessors: an interface-centric approach. CODES+ISSS 2004: 206-217 - 2003
- [c4]Henrik Eriksson, Per Larsson-Edefors, Tomas Henriksson, Christer Svensson:
Full-custom vs. standard-cell design flow: an adder case study. ASP-DAC 2003: 507-510 - [c3]Tomas Henriksson, Dake Liu:
Implementation of fast CRC calculation. ASP-DAC 2003: 563-564 - 2002
- [c2]Tomas Henriksson, Ulf Nordqvist, Dake Liu:
Embedded Protocol Processor for Fast and Efficient Packet Reception. ICCD 2002: 414- - 2001
- [c1]Tomas Henriksson, Henrik Eriksson, Ulf Nordqvist, Per Larsson-Edefors, Dake Liu:
VLSI implementation of CRC-32 for 10 Gigabit Ethernet. ICECS 2001: 1215-1218
Coauthor Index
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