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ORCIDChrister Svensson
Person information
- affiliation: Linköping University, Sweden
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2020 – today
- 2020
[c51]Timmy Sundström, Javad Bagheri Asli
, Christer Svensson, Atila Alvandpour:
A 10b 1GS/s Inverter-Based Pipeline ADC in 65nm CMOS. NorCAS 2020: 1-4
2010 – 2019
- 2014
- [j31]Emil Nilsson, Christer Svensson:
Power Consumption of Integrated Low-Power Receivers. IEEE J. Emerg. Sel. Topics Circuits Syst. 4(3): 273-283 (2014) - [c50]Nasim Farahini, Ahmed Hemani, Anders Lansner, Fabien Clermidy, Christer Svensson:
A scalable custom simulation machine for the Bayesian Confidence Propagation Neural Network model of the brain. ASP-DAC 2014: 578-585 - 2013
- [j30]Emil Nilsson, Christer Svensson:
Ultra Low Power Wake-Up Radio Using Envelope Detector and Transmission Line Voltage Transformer. IEEE J. Emerg. Sel. Topics Circuits Syst. 3(1): 5-12 (2013) - [c49]Christer Svensson, Zhongxia Simon He, Herbert Zirath, Lei Bao, Jingjing Chen:
Resource efficient implementation of a 10Gb/s radio receiver baseband in FPGA. FPGAworld 2013: 10:1-10:6 - 2012
- [j29]Jonas Fritzin, Christer Svensson, Atila Alvandpour:
Design and Analysis of a Class-D Stage With Harmonic Suppression. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(6): 1178-1186 (2012) - [j28]Jonas Fritzin, Christer Svensson, Atila Alvandpour:
Analysis of a 5.5-V Class-D Stage Used in +30-dBm Outphasing RF PAs in 130- and 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 59-II(11): 726-730 (2012) - 2011
- [j27]Timmy Sundström, Christer Svensson, Atila Alvandpour:
A 2.4 GS/s, Single-Channel, 31.3 dB SNDR at Nyquist, Pipeline ADC in 65 nm CMOS. IEEE J. Solid State Circuits 46(7): 1575-1584 (2011) - [c48]Dai Zhang, Christer Svensson, Atila Alvandpour:
Power consumption bounds for SAR ADCs. ECCTD 2011: 556-559 - [c47]Emil Nilsson, Christer Svensson:
Envelope detector sensitivity and blocking characteristics. ECCTD 2011: 773-776 - [c46]Jonas Fritzin, Christer Svensson, Atila Alvandpour:
A +32 dBm 1.85 GHz class-D outphasing RF PA in 130nm CMOS for WCDMA/LTE. ESSCIRC 2011: 127-130 - 2010
- [c45]Jonas Fritzin, Christer Svensson, Atila Alvandpour:
A Class-D outphasing RF amplifier with harmonic suppression in 90nm CMOS. ESSCIRC 2010: 310-313 - [c44]Timmy Sundström, Christer Svensson, Atila Alvandpour:
A 2.4 GS/s, 4.9 ENOB at Nyquist, single-channel pipeline ADC in 65nm CMOS. ESSCIRC 2010: 370-373
2000 – 2009
- 2009
- [j26]Timmy Sundström, Boris Murmann, Christer Svensson:
Power Dissipation Bounds for High-Speed Nyquist Analog-to-Digital Converters. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(3): 509-518 (2009) - 2008
- [c43]Henrik Fredriksson, Christer Svensson:
2.6 Gb/s over a four-drop bus using an adaptive 12-tap DFE. ESSCIRC 2008: 470-473 - 2007
- [c42]Stefan Back Andersson, Rashad Ramzan, Jerzy J. Dabrowski, Christer Svensson:
Multiband direct RF-sampling receiver front-end for WLAN in 0.13 μm CMOS. ECCTD 2007: 168-171 - [c41]Rashad Ramzan, Stefan Back Andersson, Jerzy J. Dabrowski, Christer Svensson:
A 1.4V 25mW Inductorless Wideband LNA in 0.13μm CMOS. ISSCC 2007: 424-613 - [c40]Henrik Fredriksson, Christer Svensson:
3-Gb/s, Single-ended Adaptive Equalization of Bidirectional Data over a Multi-drop Bus. SoC 2007: 1-4 - [c39]Christer Svensson:
Analog Power Modelling. PATMOS 2007: 578 - 2006
- [c38]Stefan Back Andersson, Jerzy J. Dabrowski, Christer Svensson, J. Konopacki:
SC filter for RF down conversion with wideband image rejection. ISCAS 2006 - [c37]Peter Caputa, Christer Svensson:
An on-chip delay- and skew-insensitive multicycle communication scheme. ISSCC 2006: 1765-1774 - [c36]Peter Caputa, Christer Svensson:
A 3Gb/s/wire Global On-Chip Bus with Near Velocity-of-Light Latency. VLSI Design 2006: 117-122 - 2005
- [j25]Darius Jakonis, Kalle Folkesson, Jerzy J. Dabrowski, Patrik Eriksson, Christer Svensson:
A 2.4-GHz RF sampling receiver front-end in 0.18-μm CMOS. IEEE J. Solid State Circuits 40(6): 1265-1277 (2005) - [j24]Peter Caputa, Christer Svensson:
Well-behaved global on-chip interconnect. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(2): 318-323 (2005) - [c35]Kalle Folkesson, Christer Svensson, B. Knuthammar, A. Dreyfert:
A high-level dynamic-error model of a pipelined analog-to-digital converter. ISCAS (6) 2005: 5625-5628 - [c34]Anders Edman, Christer Svensson, Behzad Mesgarzadeh:
Synchronous latency-insensitive design for multiple clock domain. SoCC 2005: 83-86 - 2004
- [c33]Christer Svensson:
Synchronous Latency Insensitive Design. ASYNC 2004: 3 - [c32]Anders Edman, Christer Svensson:
Timing closure through a globally synchronous, timing partitioned design methodology. DAC 2004: 71-74 - [c31]Peter Caputa, Mark A. Anders, Christer Svensson, Ram K. Krishnamurthy, Shekhar Borkar:
A low-swing single-ended L1 cache bus technique for sub-90nm technologies. ESSCIRC 2004: 475-477 - [c30]Håkan Bengtson, Christer Svensson:
2 GB/S decision feedback equalizer in 3.3 V 0.35 µM CMOS. Circuits, Signals, and Systems 2004: 114-119 - [c29]Behzad Mesgarzadeh, Christer Svensson, Atila Alvandpour:
A new mesochronous clocking scheme for synchronization in SoC. ISCAS (2) 2004: 605-608 - [c28]Peter Caputa, Henrik Fredriksson, Martin Hansson, Stefan Back Andersson, Atila Alvandpour, Christer Svensson:
An Extended Transition Energy Cost Model for Buses in Deep Submicron Technologies. PATMOS 2004: 849-858 - [c27]Håkan Bengtson, Christer Svensson:
A scalable and robust rail-to-rail delay cell for DLLs. SoCC 2004: 135-136 - [c26]Henrik Fredriksson, Christer Svensson:
Mixed-signal DFE for multi-drop, gb/s, memory buses - a feasibility study. SoCC 2004: 147-148 - [c25]Kalle Folkesson, Christer Svensson:
Robust multi-phase clock generation with reduced jitter. SoCC 2004: 167-168 - 2003
- [c24]Henrik Eriksson, Per Larsson-Edefors, Tomas Henriksson, Christer Svensson:
Full-custom vs. standard-cell design flow: an adder case study. ASP-DAC 2003: 507-510 - [c23]Atila Alvandpour, Dinesh Somasekhar, Ram Krishnamurthy, Vivek De, Shekhar Borkar, Christer Svensson:
Bitline leakage equalization for sub-100nm caches. ESSCIRC 2003: 401-404 - [c22]Darius Jakonis, Christer Svensson:
A 1.6 GHz downconversion sampling mixer in CMOS. ISCAS (1) 2003: 725-728 - 2002
- [j23]Christer Svensson:
Electrical interconnects revitalized. IEEE Trans. Very Large Scale Integr. Syst. 10(6): 777-788 (2002) - [c21]Martin Malis, Christer Svensson, Lars Hvam:
Application of Knowledge-based System in a B-to-B Environment. IMSA 2002: 152-157 - [c20]Darius Jakonis, Christer Svensson:
A 1 GHz linearized CMOS track-and-hold circuit. ISCAS (5) 2002: 577-580 - [c19]Stefan Rusu, Manoj Sachdev, Christer Svensson, Bram Nauta:
Trends and Challenges in VLSI Technology Scaling towards 100nm (Tutorial Abstract). ASP-DAC/VLSI Design 2002: 16-17 - 2001
- [j22]Anders Edman, Jacob Christensen, Anders Emrich, Christer Svensson:
A low-power 416-lag 1.5-b 0.5-TMAC correlator in 0.6-μm CMOS. IEEE J. Solid State Circuits 36(2): 258-265 (2001) - [j21]Christer Svensson:
Optimum voltage swing on on-chip and off-chip interconnect. IEEE J. Solid State Circuits 36(7): 1108-1112 (2001) - [c18]Håkan Bengtson, Christer Svensson:
3V CMOS 0.35 µ transimpedance receiver for optical applications. ISCAS (4) 2001: 69-71 - [c17]Kalle Folkesson, Christer Svensson, Jan-Erik Eklund:
Modeling of dynamic errors in algorithmic A/D converters. ISCAS (5) 2001: 455-458 - 2000
- [j20]Fenghao Mu, Christer Svensson:
Pulsewidth control loop in high-speed CMOS clock buffers. IEEE J. Solid State Circuits 35(2): 134-141 (2000) - [j19]Peter Hazucha, Christer Svensson:
Optimized test circuits for SER characterization of a manufacturing process. IEEE J. Solid State Circuits 35(2): 142-148 (2000) - [j18]Peter Hazucha, Christer Svensson, Stephen A. Wender:
Cosmic-ray soft error rate characterization of a standard 0.6-μm CMOS process. IEEE J. Solid State Circuits 35(10): 1422-1429 (2000) - [c16]Atila Alvandpour, Per Larsson-Edefors, Christer Svensson:
GLMC: interconnect length estimation by growth-limited multifold clustering. ISCAS 2000: 465-468 - [c15]Mattias Duppils, Christer Svensson:
Low power mixed analog-digital signal processing. ISLPED 2000: 61-66
1990 – 1999
- 1999
- [j17]Fenghao Mu, Christer Svensson:
Vector Transfer by Self-Tested Self-Synchronization for Parallel Systems. IEEE Trans. Parallel Distributed Syst. 10(8): 769-780 (1999) - [j16]Fenghao Mu, Christer Svensson:
A layout-based schematic method for very high-speed CMOS cell design. IEEE Trans. Very Large Scale Integr. Syst. 7(1): 144-148 (1999) - [c14]Atila Alvandpour, Per Larsson-Edefors, Christer Svensson:
A leakage-tolerant multi-phase keeper for wide domino circuits. ICECS 1999: 209-212 - [c13]Mattias Duppils, Jan-Erik Eklund, Christer Svensson:
A novel mixed analog/digital MAC unit implemented with SC technique suitable for fully programmable narrow-band FIR filter applications. ICECS 1999: 1197-1200 - [c12]Fenghao Mu, Christer Svensson:
Methodology of layout based schematic and its usage in efficient high performance CMOS design. ISCAS (6) 1999: 254-257 - [c11]Fenghao Mu, Christer Svensson:
High speed interface for system-on-chip design by self-tested self-synchronization. ISCAS (2) 1999: 516-519 - [c10]Fenghao Mu, Christer Svensson:
High speed multistage CMOS clock buffers with pulse width control loop. ISCAS (2) 1999: 541-544 - 1998
- [j15]Henrik O. Johansson, Christer Svensson:
Time resolution of NMOS sampling switches used on low-swing signals. IEEE J. Solid State Circuits 33(2): 237-245 (1998) - [c9]Fenghao Mu, Christer Svensson:
Efficient High-Speed CMOS Design by Layout Based Schematic Method. EUROMICRO 1998: 10337-10340 - [c8]Fenghao Mu, Christer Svensson:
Self-Synchronized Vector Transfer for High Speed Parallel Systems. ICPADS 1998: 2-9 - [c7]Christer Svensson, Atila Alvandpour:
Low power and low voltage CMOS digital circuit techniques. ISLPED 1998: 7-10 - [c6]Atila Alvandpour, Per Larsson-Edefors, Christer Svensson:
Separation and extraction of short-circuit power consumption in digital CMOS VLSI circuits. ISLPED 1998: 245-249 - 1997
- [j14]Jiren Yuan, Christer Svensson:
New single-clock CMOS latches and flipflops with improved speed and power savings. IEEE J. Solid State Circuits 32(1): 62-69 (1997) - 1996
- [j13]Jan-Erik Eklund, Christer Svensson, Anders Åström:
VLSI implementation of a focal plane image processor-a realization of the near-sensor image processing concept. IEEE Trans. Very Large Scale Integr. Syst. 4(3): 322-335 (1996) - 1994
- [j12]Patrik Larsson, Christer Svensson:
Noise in digital dynamic CMOS circuits. IEEE J. Solid State Circuits 29(6): 655-662 (1994) - [j11]Dake Liu, Christer Svensson:
Power consumption estimation in CMOS VLSI chips. IEEE J. Solid State Circuits 29(6): 663-670 (1994) - [j10]Patrik Larsson, Christer Svensson:
Impact of clock slope on true single phase clocked (TSPC) CMOS circuits. IEEE J. Solid State Circuits 29(6): 723-726 (1994) - [c5]Jacob Midtgaard, Christer Svensson:
5.8Gb/s 16: 1 Multiplexer and 1: 16 Demultiplexer Using 1.2µm BiCMOS. ISCAS 1994: 43-46 - 1993
- [j9]Robert Forchheimer, Keping Chen, Christer Svensson, Anders Ödmark:
Single-chip image sensors with a digital processor array. J. VLSI Signal Process. 5(2-3): 121-131 (1993) - [c4]A. Dell'Acqua, M. Hansen, Sami J. Inkinen, B. Lofstedt, J. P. Vanuxem, Christer Svensson, Jiren Yuan, H. Hentzell, L. Del Buono, J. David, J. F. Genat, H. Lebbolo, O. LeDortz, P. Nayman, Aurore Savoy-Navarro, R. Zitoun, Cesare Alippi, Luca Breveglieri, Luigi Dadda, Vincenzo Piuri, Fabio Salice, Mariagiovanna Sami, Renato Stefanelli, P. Cattaneo, G. Fumagalli, G. Goggi, Simona Brigati, Umberto Gatti, Franco Maloberti, Guido Torelli, P. Carlson, A. Kerek, Goran Appelquist, S. Berglund, C. Bohm, Magnus Engström, N. Yamdagni, Rolf Sundblad, I. Höglund, S. T. Persson:
System Level Policies for Fault Tolerance Issues in the FERMI Project. DFT 1993: 1-8 - [c3]Christer Jansson, Christer Svensson:
A sensor array for phase and amplitude detection of synchronous modulated light sources. ISCAS 1993: 164-167 - [c2]Christer Svensson, Jiren Yuan:
Ultra high speed CMOS design. VLSI 1993: 273-282 - 1992
- [j8]Morteza Afghahi, Christer Svensson:
Performance of Synchronous and Asynchronous Schemes for VLSI Systems. IEEE Trans. Computers 41(7): 858-872 (1992) - 1990
- [c1]Per-Erik Danielsson, Pär Emanuelsson, Keping Chen, Per Ingelhag, Christer Svensson:
Single-Chip High-Speed Computation of Optical Flow. MVA 1990: 331-336
1980 – 1989
- 1989
- [j7]Jiren Yuan, Christer Svensson:
High-speed CMOS circuit technique. IEEE J. Solid State Circuits 24(1): 62-70 (1989) - 1988
- [j6]Christer Svensson, Robert Tjärnström:
Switch-level simulation and the pass transistor EXOR gate. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(9): 994-997 (1988) - 1987
- [j5]Christer Svensson:
Guest editorial. Integr. 5(2): 123 (1987) - [j4]Rolf Sundblad, Christer Svensson:
Fully Dynamic Switch-Level Simulation of CMOS Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6(2): 282-289 (1987) - 1986
- [j3]Christer Svensson:
Signal resynchronization in VLSI systems. Integr. 4(1): 75-80 (1986) - 1984
- [j2]Ole Olesen, Christer Svensson:
NORCHIP, a silicon brokers model. Integr. 2(1): 3-13 (1984) - 1983
- [j1]Christer Svensson:
VLSI physics. Integr. 1(1): 3-19 (1983)
Coauthor Index
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