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2020 – today
- 2024
[j4]Riccardo Vignali
, Riccardo Zurla, Marco Pasotti, Pier Luigi Rolandi, Abhairaj Singh, Manuel Le Gallo, Abu Sebastian, Taekwang Jang, Alessio Antolini, Eleonora Franchi Scarselli, Alessandro Cabrini:
Designing Circuits for AiMC Based on Non-Volatile Memories: A Tutorial Brief on Trade-Off and Strategies for ADCs and DACs Co-Design. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1650-1655 (2024)- [c16]L. Pistolesi, Artem Glukhov, Amadeo de Gracia Herranz, M. Lopez-Vallejo, Marcella Carissimi, Marco Pasotti, Pier Luigi Rolandi, Andrea Redaelli, I. Muñoz-Martín, S. Bianchi, Andrea Bonfanti, Daniele Ielmini:
Drift Compensation in Multilevel PCM for in-Memory Computing Accelerators. IRPS 2024: 1-4
2000 – 2009
- 2009
- [c15]Roberto Canegallo, Luca Perugini, Alberto Pasini, Massimiliano Innocenti, Mauro Scandiuzzo, Roberto Guerrieri, Pier Luigi Rolandi:
System on chip with 1.12mW-32Gb/s AC-coupled 3D memory interface. CICC 2009: 463-466 - 2008
- [j3]Alberto Fazzi, Roberto Canegallo, Luca Ciccarelli, Luca Magagni, Federico Natali, Erik Jung, Pier Luigi Rolandi, Roberto Guerrieri:
3-D Capacitive Interconnections With Mono- and Bi-Directional Capabilities. IEEE J. Solid State Circuits 43(1): 275-284 (2008) - 2007
- [c14]Roberto Canegallo, Alberto Fazzi, Luca Ciccarelli, Luca Magagni, Federico Natali, Pier Luigi Rolandi, Erik Jung, Léa Di Cioccio, Roberto Guerrieri:
3D Capacitive Interconnections for High Speed Interchip Communication. CICC 2007: 1-8 - [c13]Fabio Campi, Antonio Deledda, Matteo Pizzotti, Luca Ciccarelli, Pier Luigi Rolandi, Claudio Mucci, Andrea Lodi, Arseni Vitkovski, Luca Vanzolini:
A dynamically adaptive DSP for heterogeneous reconfigurable platforms. DATE 2007: 9-14 - [c12]Anna Richelli, Luca Mensi, Luigi Colalongo, Zsolt Miklós Kovács-Vajna, Pier Luigi Rolandi:
A 1.2V-5V High Efficiency CMOS Charge Pump for Non-Volatile Memories. ISCAS 2007: 2411-2414 - [c11]Alberto Fazzi, Roberto Canegallo, Luca Ciccarelli, Luca Magagni, Federico Natali, Erik Jung, Pier Luigi Rolandi, Roberto Guerrieri:
3D Capacitive Interconnections with Mono- and Bi-Directional Capabilities. ISSCC 2007: 356-608 - [c10]Anna Richelli, Luca Mensi, Luigi Colalongo, Pier Luigi Rolandi, Zsolt Miklós Kovács-Vajna:
A 1.2-to-8V Charge-Pump with Improved Power Efficiency for Non-Volatille Memories. ISSCC 2007: 522-619 - 2006
- [c9]Luca Ciccarelli, Domenico Loparco, Massimiliano Innocenti, Andrea Lodi, Claudio Mucci, Pier Luigi Rolandi:
A Low-Power Routing Architecture Optimized for Deep Sub-Micron FPGAs. CICC 2006: 309-312 - [c8]Alberto Fazzi, Luca Magagni, Mario de Dominicis, Paolo Zoffoli, Roberto Canegallo, Pier Luigi Rolandi, Alberto L. Sangiovanni-Vincentelli, Roberto Guerrieri:
Yield prediction for 3D capacitive interconnections. ICCAD 2006: 809-814 - 2003
- [j2]Roberto Pelliconi, David Iezzi, Andrea Baroni, Marco Pasotti, Pier Luigi Rolandi:
Power efficient charge pump in deep submicron standard CMOS technology. IEEE J. Solid State Circuits 38(6): 1068-1071 (2003) - [c7]Michele Borgatti, Lorenzo Cali, Guido De Sandre, Benoit Forêt, David Iezzi, Francesco Lertora, Gilberto Muzzi, Marco Pasotti, Marco Poles, Pier Luigi Rolandi:
A reconfigurable signal processing IC with embedded FPGA and multi-port flash memory. DAC 2003: 691-695 - [c6]Michele Quarantelli, Marco Poles, Marco Pasotti, Pier Luigi Rolandi:
A high compliance CMOS current source for low voltage applications. ISCAS (1) 2003: 425-428 - 2001
- [j1]Michele Borgatti, Alessandro Rocchi, Marco Bisio, Monica Besana, Loris Navoni, Pier Luigi Rolandi:
A 64-min single-chip voice recorder/player using embedded 4-b/cell flash memory. IEEE J. Solid State Circuits 36(3): 516-521 (2001) - 2000
- [c5]Michele Borgatti, Alessandro Rocchi, Marco Bisio, Monica Besana, Loris Navoni, Pier Luigi Rolandi:
A 64 min single-chip voice recorder/player using embedded 4 bit/cell flash memory. CICC 2000: 219-222
1990 – 1999
- 1999
- [c4]Marco Pasotti, Pier Luigi Rolandi, Roberto Canegallo, Danilo Gerna, Giovanni Guaitini, Frank Lhermet, Alan Kramer:
Analog sense amplifiers for high density NOR flash memories. CICC 1999: 247-250 - [c3]Loris Navoni, Monica Besana, Pier Luigi Rolandi:
An analog associative memory chip for VQ image compression. ICASSP 1999: 1965-1968 - 1997
- [c2]Loris Navoni, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Alan Kramer, Pier Luigi Rolandi:
Words Recognition using Associative Memory. ICDAR 1997: 97-101 - 1995
- [c1]Alan Kramer, Roberto Canegallo, Mauro Chinosi, D. Doise, Giovanni Gozzini, Pier Luigi Rolandi, Marco Sabatini, P. Zabberoni:
Ultra-low-power analog associative memory core using flash-EEPROM-based programmable capacitors. ISLPD 1995: 203-208
Coauthor Index
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