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Bernd Becker 0001
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- affiliation: University of Freiburg, Germany
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- Bernd Becker 0002 — EuroCloud Europe, Luxembourg
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2020 – today
- 2024
- [j75]Leonore Winterer, Ralf Wimmer, Bernd Becker, Nils Jansen:
Strong Simple Policies for POMDPs. Int. J. Softw. Tools Technol. Transf. 26(3): 269-299 (2024) - 2023
- [j74]Tobias Seufert, Felix Winterer, Christoph Scholl, Karsten Scheibler, Tobias Paxian, Bernd Becker:
Everything You Always Wanted to Know About Generalization of Proof Obligations in PDR. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(4): 1351-1364 (2023) - [j73]Nikolaos Ioannis Deligiannis, Tobias Faller, Riccardo Cantoro, Tobias Paxian, Bernd Becker, Matteo Sonza Reorda:
Automating the Generation of Programs Maximizing the Repeatable Constant Switching Activity in Microprocessor Units via MaxSAT. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 4270-4281 (2023) - [c366]Nikolaos Ioannis Deligiannis, Tobias Faller, Iacopo Guglielminetti, Riccardo Cantoro, Bernd Becker, Matteo Sonza Reorda:
Automatic Identification of Functionally Untestable Cell-Aware Faults in Microprocessors. ATS 2023: 1-6 - [c365]Jens Anders, Pablo Andreu, Bernd Becker, Steffen Becker, Riccardo Cantoro, Nikolaos Ioannis Deligiannis, Nourhan Elhamawy, Tobias Faller, Carles Hernández, Nele Mentens, Mahnaz Namazi Rizi, Ilia Polian, Abolfazl Sajadi, Matthias Sauer, Denis Schwachhofer, Matteo Sonza Reorda, Todor Stefanov, Ilya Tuzov, Stefan Wagner, Nusa Zidaric:
A Survey of Recent Developments in Testability, Safety and Security of RISC-V Processors. ETS 2023: 1-10 - [c364]Nikolaos Ioannis Deligiannis, Tobias Faller, Chenghan Zhou, Riccardo Cantoro, Bernd Becker, Matteo Sonza Reorda:
Automating the Generation of Functional Stress Inducing Stimuli for Burn-In Testing. ETS 2023: 1-5 - [c363]Tobias Faller, Nikolaos Ioannis Deligiannis, Markus Schwörer, Matteo Sonza Reorda, Bernd Becker:
Constraint-Based Automatic SBST Generation for RISC-V Processor Families. ETS 2023: 1-6 - 2022
- [c362]Nikolaos Ioannis Deligiannis, Tobias Faller, Josie E. Rodriguez Condia, Riccardo Cantoro, Bernd Becker, Matteo Sonza Reorda:
Using Formal Methods to Support the Development of STLs for GPUs. ATS 2022: 84-89 - [c361]Wolfgang Ecker, Peer Adelt, Wolfgang Müller, Reinhold Heckmann, Milos Krstic, Vladimir Herdt, Rolf Drechsler, Gerhard Angst, Ralf Wimmer, Andreas Mauderer, Rafael Stahl, Karsten Emrich, Daniel Mueller-Gritschneder, Bernd Becker, Philipp Scholl, Eyck Jentzsch, Jan Schlamelcher, Kim Grüttner, Paul Palomero Bernardo, Oliver Bringmann, Mihaela Damian, Julian Oppermann, Andreas Koch, Jörg Bormann, Johannes Partzsch, Christian Mayr, Wolfgang Kunz:
The Scale4Edge RISC-V Ecosystem. DATE 2022: 808-813 - 2021
- [j72]Leonore Winterer, Sebastian Junges, Ralf Wimmer, Nils Jansen, Ufuk Topcu, Joost-Pieter Katoen, Bernd Becker:
Strategy Synthesis for POMDPs in Robot Planning via Game-Based Abstractions. IEEE Trans. Autom. Control. 66(3): 1040-1054 (2021) - [c360]Nikolaos Ioannis Deligiannis, Riccardo Cantoro, Tobias Faller, Tobias Paxian, Bernd Becker, Matteo Sonza Reorda:
Effective SAT-based Solutions for Generating Functional Sequences Maximizing the Sustained Switching Activity in a Pipelined Processor. ATS 2021: 73-78 - [c359]Karsten Scheibler, Felix Winterer, Tobias Seufert, Tino Teige, Christoph Scholl, Bernd Becker:
ICP and IC3. DATE 2021: 1116-1121 - [c358]Benjamin Völker, Marc Pfeifer, Florian Wolling, Philipp M. Scholl, Bernd Becker:
Introducing MILM: A Hybrid Minimal-Intrusive Load Monitoring Approach: Poster. e-Energy 2021: 298-299 - [c357]Tobias Faller, Philipp Scholl, Tobias Paxian, Bernd Becker:
Towards SAT-Based SBST Generation for RISC-V Cores. LATS 2021: 1-2 - [c356]Lukas Mentel, Karsten Scheibler, Felix Winterer, Bernd Becker, Tino Teige:
Benchmarking SMT Solvers on Automotive Code. MBMV 2021: 1-10 - [c355]Felix Winterer, Tobias Seufert, Karsten Scheibler, Tino Teige, Chritsoph Scholl, Bernd Becker:
ICP and IC3 with Stronger Generalization. MBMV 2021: 1-12 - [c354]Benjamin Völker, Philipp M. Scholl, Bernd Becker:
A Feature and Classifier Study for Appliance Event Classification. SESC 2021: 99-116 - [c353]Tobias Paxian, Pascal Raiola, Bernd Becker:
On Preprocessing for Weighted MaxSAT. VMCAI 2021: 556-577 - [c352]Nikolaos Ioannis Deligiannis, Riccardo Cantoro, Matthias Sauer, Bernd Becker, Matteo Sonza Reorda:
New Techniques for the Automatic Identification of Uncontrollable Lines in a CPU Core. VTS 2021: 1-7 - [i16]Tobias Seufert, Felix Winterer, Christoph Scholl, Karsten Scheibler, Tobias Paxian, Bernd Becker:
Everything You Always Wanted to Know About Generalization of Proof Obligations in PDR. CoRR abs/2105.09169 (2021) - 2020
- [c351]Pascal Raiola, Tobias Paxian, Bernd Becker:
Minimal Witnesses for Security Weaknesses in Reconfigurable Scan Networks. ETS 2020: 1-6 - [c350]Leonore Winterer, Ralf Wimmer, Nils Jansen, Bernd Becker:
Strengthening Deterministic Policies for POMDPs. NFM 2020: 115-132 - [c349]Benjamin Völker, Marc Pfeifer, Philipp M. Scholl, Bernd Becker:
Annoticity: A Smart Annotation Tool and Data Browser for Electricity Datasets. NILM@SenSys 2020: 1-5 - [c348]Benjamin Völker, Marc Pfeifer, Philipp M. Scholl, Bernd Becker:
FIRED: A Fully-labeled hIgh-fRequency Electricity Disaggregation Dataset. BuildSys@SenSys 2020: 294-297 - [i15]Leonore Winterer, Ralf Wimmer, Nils Jansen, Bernd Becker:
Strengthening Deterministic Policies for POMDPs. CoRR abs/2007.08351 (2020)
2010 – 2019
- 2019
- [j71]Ralf Wimmer, Christoph Scholl, Bernd Becker:
The (D)QBF Preprocessor HQSpre - Underlying Theory and Its Implementation. J. Satisf. Boolean Model. Comput. 11(1): 3-52 (2019) - [c347]Leonie Feldbusch, Felix Winterer, Johannes Gramsch, Linus Feiten, Bernd Becker:
SMILE Goes Gaming: Gamification in a Classroom Response System for Academic Teaching. CSEDU (2) 2019: 268-277 - [c346]Pascal Raiola, Benjamin Thiemann, Jan Burchard, Ahmed Atteya, Natalia Lylina, Hans-Joachim Wunderlich, Bernd Becker, Matthias Sauer:
On Secure Data Flow in Reconfigurable Scan Networks. DATE 2019: 1016-1021 - [c345]Benjamin Völker, Philipp M. Scholl, Bernd Becker:
Semi-Automatic Generation and Labeling of Training Data for Non-intrusive Load Monitoring. e-Energy 2019: 17-23 - [c344]Benjamin Thiemann, Linus Feiten, Pascal Raiola, Bernd Becker, Matthias Sauer:
On Integrating Lightweight Encryption in Reconfigurable Scan Networks. ETS 2019: 1-6 - [c343]Marc Pfeifer, Philipp M. Scholl, Rainer Voigt, Bernd Becker:
Active Stereo Vision with High Resolution on an FPGA. FCCM 2019: 118-126 - [c342]Maël Gay, Tobias Paxian, Devanshi Upadhyaya, Bernd Becker, Ilia Polian:
Hardware-Oriented Algebraic Fault Attack Framework with Multiple Fault Injection Support. FDTC 2019: 25-32 - [c341]Steven Carr, Nils Jansen, Ralf Wimmer, Alexandru Constantin Serban, Bernd Becker, Ufuk Topcu:
Counterexample-Guided Strategy Improvement for POMDPs Using Recurrent Neural Networks. IJCAI 2019: 5532-5539 - [c340]Natalia Lylina, Ahmed Atteya, Pascal Raiola, Matthias Sauer, Bernd Becker, Hans-Joachim Wunderlich:
Security Compliance Analysis of Reconfigurable Scan Networks. ITC 2019: 1-9 - [c339]Benjamin Völker, Marc Pfeifer, Philipp M. Scholl, Bernd Becker:
A Versatile High Frequency Electricity Monitoring Framework for Our Future Connected Home. SESC 2019: 221-231 - [c338]Nils Jansen, Sebastian Junges, Joost-Pieter Katoen, Tim Quatmann, Bernd Becker, Ralf Wimmer, Leonore Winterer:
Correct-by-construction policies for POMDPs. SNR 2019: 6-8 - [p3]Philipp M. Scholl, Benjamin Völker, Bernd Becker, Kristof Van Laerhoven:
A Multi-media Exchange Format for Time-Series Dataset Curation. Human Activity Sensing 2019: 111-119 - [i14]Steven Carr, Nils Jansen, Ralf Wimmer, Alexandru Constantin Serban, Bernd Becker, Ufuk Topcu:
Counterexample-Guided Strategy Improvement for POMDPs Using Recurrent Neural Networks. CoRR abs/1903.08428 (2019) - [i13]Philipp M. Scholl, Benjamin Völker, Bernd Becker, Kristof Van Laerhoven:
A Multi-Media Exchange Format for Time-Series Dataset Curation. CoRR abs/1908.00928 (2019) - 2018
- [j70]Jan Burchard, Dominik Erb, Sudhakar M. Reddy, Adit D. Singh, Bernd Becker:
On the Generation of Waveform-Accurate Hazard and Charge-Sharing Aware Tests for Transistor Stuck-Off Faults in CMOS Logic Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(10): 2152-2165 (2018) - [c337]Jan Burchard, Dominik Erb, Bernd Becker:
Characterization of possibly detected faults by accurately computing their detection probability. DATE 2018: 385-390 - [c336]Benjamin Völker, Philipp M. Scholl, Tobias Schubert, Bernd Becker:
Towards the Fusion of Intrusive and Non-intrusive Load Monitoring: A Hybrid Approach. e-Energy 2018: 436-438 - [c335]Ahmed Atteya, Michael A. Kochte, Matthias Sauer, Pascal Raiola, Bernd Becker, Hans-Joachim Wunderlich:
Online prevention of security violations in reconfigurable scan networks. ETS 2018: 1-6 - [c334]Johanna Sepúlveda, Damian Aboul-Hassan, Georg Sigl, Bernd Becker, Matthias Sauer:
Towards the formal verification of security properties of a Network-on-Chip router. ETS 2018: 1-6 - [c333]Pascal Raiola, Michael A. Kochte, Ahmed Atteya, Laura Rodríguez Gómez, Hans-Joachim Wunderlich, Bernd Becker, Matthias Sauer:
Detecting and Resolving Security Violations in Reconfigurable Scan Networks. IOLTS 2018: 91-96 - [c332]Ralf Wimmer, Andreas Karrenbauer, Ruben Becker, Christoph Scholl, Bernd Becker:
From DQBF to QBF by Dependency Elimination. MBMV 2018 - [c331]Leonore Winterer, Sebastian Junges, Ralf Wimmer, Nils Jansen, Ufuk Topcu, Joost-Pieter Katoen, Bernd Becker:
Abstraktions-basierte Verifikation von POMDPs im Motion-Planning-Kontext. MBMV 2018 - [c330]Tobias Paxian, Sven Reimer, Bernd Becker:
Dynamic Polynomial Watchdog Encoding for Solving Weighted MaxSAT. SAT 2018: 37-53 - [c329]Sebastian Junges, Nils Jansen, Ralf Wimmer, Tim Quatmann, Leonore Winterer, Joost-Pieter Katoen, Bernd Becker:
Finite-State Controllers of POMDPs using Parameter Synthesis. UAI 2018: 519-529 - [c328]Felix Neubauer, Jan Burchard, Pascal Raiola, Jochen Rivoir, Bernd Becker, Matthias Sauer:
Efficient generation of parametric test conditions for AMS chips with an interval constraint solver. VTS 2018: 1-6 - [p2]Ralf Wimmer, Karina Wimmer, Christoph Scholl, Bernd Becker:
Analysis of Incomplete Circuits Using Dependency Quantified Boolean Formulas. Advanced Logic Synthesis 2018: 151-168 - 2017
- [j69]Pascal Raiola, Jan Burchard, Felix Neubauer, Dominik Erb, Bernd Becker:
Evaluating the Effectiveness of D-chains in SAT-based ATPG and Diagnostic TPG. J. Electron. Test. 33(6): 751-767 (2017) - [j68]Hassan Hatefi, Ralf Wimmer, Bettina Braitling, Luis María Ferrer Fioriti, Bernd Becker, Holger Hermanns:
Cost vs. time in stochastic games and Markov automata. Formal Aspects Comput. 29(4): 629-649 (2017) - [c327]Erika Ábrahám, John Abbott, Bernd Becker, Anna Maria Bigatti, Martin Brain, Alessandro Cimatti, James H. Davenport, Matthew England, Pascal Fontaine, Stephen Forrest, Vijay Ganesh, Alberto Griggio, Daniel Kroening, Werner M. Seiler:
SC-square: when Satisfiability Checking and Symbolic Computation join forces. ARCADE@CADE 2017: 6-10 - [c326]Leonore Winterer, Sebastian Junges, Ralf Wimmer, Nils Jansen, Ufuk Topcu, Joost-Pieter Katoen, Bernd Becker:
Motion planning under partial observability using game-based abstraction. CDC 2017: 2201-2208 - [c325]Jan Burchard, Dominik Erb, Adit D. Singh, Sudhakar M. Reddy, Bernd Becker:
Fast and waveform-accurate hazard-aware SAT-based TSOF ATPG. DATE 2017: 422-427 - [c324]Matthias Sauer, Pascal Raiola, Linus Feiten, Bernd Becker, Ulrich Rührmair, Ilia Polian:
Sensitized path PUF: A lightweight embedded physical unclonable function. DATE 2017: 680-685 - [c323]Bernd Becker, Adit D. Singh:
Best paper. ETS 2017: 1 - [c322]Michael A. Kochte, Matthias Sauer, Laura Rodríguez Gómez, Pascal Raiola, Bernd Becker, Hans-Joachim Wunderlich:
Specification and verification of security in reconfigurable scan networks. ETS 2017: 1-6 - [c321]Jan Burchard, Mael Gay, Ange-Salomé Messeng Ekossono, Jan Horácek, Bernd Becker, Tobias Schubert, Martin Kreuzer, Ilia Polian:
AutoFault: Towards Automatic Construction of Algebraic Fault Attacks. FDTC 2017: 65-72 - [c320]Jan Burchard, Ange-Salomé Messeng Ekossono, Jan Horácek, Mael Gay, Bernd Becker, Tobias Schubert, Martin Kreuzer, Ilia Polian:
Towards mixed structural-functional models for algebraic fault attacks on ciphers. IVSW 2017: 7-12 - [c319]Jan Burchard, Felix Neubauer, Pascal Raiola, Dominik Erb, Bernd Becker:
Evaluating the effectiveness of D-chains in SAT-based ATPG. LATS 2017: 1-6 - [c318]Jan Horácek, Jan Burchard, Bernd Becker, Martin Kreuzer:
Integrating Algebraic and SAT Solvers. MACIS 2017: 147-162 - [c317]Felix Neubauer, Karsten Scheibler, Bernd Becker, Ahmed Mahdi, Martin Fränzle, Tino Teige, Tom Bienmüller, Detlef Fehrer:
Accurate Dead Code Detection in Embedded C Code by Arithmetic Constraint Solving. MBMV 2017: 53-54 - [c316]Ralf Wimmer, Andreas Karrenbauer, Ruben Becker, Christoph Scholl, Bernd Becker:
From DQBF to QBF by Dependency Elimination. SAT 2017: 326-343 - [c315]Ralf Wimmer, Sven Reimer, Paolo Marin, Bernd Becker:
HQSpre - An Effective Preprocessor for QBF and DQBF. TACAS (1) 2017: 373-390 - [c314]Pascal Raiola, Dominik Erb, Sudhakar M. Reddy, Bernd Becker:
Accurate Diagnosis of Interconnect Open Defects Based on the Robust Enhanced Aggressor Victim Model. VLSID 2017: 135-140 - [c313]Jan Burchard, Dominik Erb, Sudhakar M. Reddy, Adit D. Singh, Bernd Becker:
Efficient SAT-based generation of hazard-activated TSOF tests. VTS 2017: 1-6 - [i12]Leonore Winterer, Sebastian Junges, Ralf Wimmer, Nils Jansen, Ufuk Topcu, Joost-Pieter Katoen, Bernd Becker:
Motion Planning under Partial Observability using Game-Based Abstraction. CoRR abs/1708.04236 (2017) - [i11]Sebastian Junges, Nils Jansen, Ralf Wimmer, Tim Quatmann, Leonore Winterer, Joost-Pieter Katoen, Bernd Becker:
Permissive Finite-State Controllers of POMDPs using Parameter Synthesis. CoRR abs/1710.10294 (2017) - 2016
- [j67]Erika Ábrahám, John Abbott, Bernd Becker, Anna Maria Bigatti, Martin Brain, Bruno Buchberger, Alessandro Cimatti, James H. Davenport, Matthew England, Pascal Fontaine, Stephen Forrest, Alberto Griggio, Daniel Kroening, Werner M. Seiler, Thomas Sturm:
Satisfiability checking and symbolic computation. ACM Commun. Comput. Algebra 50(4): 145-147 (2016) - [j66]Matthias Sauer, Bernd Becker, Ilia Polian:
PHAETON: A SAT-Based Framework for Timing-Aware Path Sensitization. IEEE Trans. Computers 65(6): 1869-1881 (2016) - [j65]Linus Feiten, Jonathan Oesterle, Tobias Martin, Matthias Sauer, Bernd Becker:
Systemic Frequency Biases in Ring Oscillator PUFs on FPGAs. IEEE Trans. Multi Scale Comput. Syst. 2(3): 174-185 (2016) - [j64]Andreas Riefert, Riccardo Cantoro, Matthias Sauer, Matteo Sonza Reorda, Bernd Becker:
A Flexible Framework for the Automatic Generation of SBST Programs. IEEE Trans. Very Large Scale Integr. Syst. 24(10): 3055-3066 (2016) - [c312]Dominik Erb, Karsten Scheibler, Michael A. Kochte, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker:
Mixed 01X-RSL-Encoding for fast and accurate ATPG with unknowns. ASP-DAC 2016: 749-754 - [c311]Matthias Sauer, Jie Jiang, Sven Reimer, Kohei Miyase, Xiaoqing Wen, Bernd Becker, Ilia Polian:
On Optimal Power-Aware Path Sensitization. ATS 2016: 179-184 - [c310]Karina Wimmer, Ralf Wimmer, Christoph Scholl, Bernd Becker:
Skolem Functions for DQBF. ATVA 2016: 395-411 - [c309]Jan Burchard, Tobias Schubert, Bernd Becker:
Distributed Parallel #SAT Solving. CLUSTER 2016: 326-335 - [c308]Karsten Scheibler, Dominik Erb, Bernd Becker:
Accurate CEGAR-based ATPG in presence of unknown values for large industrial designs. DATE 2016: 972-977 - [c307]Michael A. Kochte, Rafal Baranowski, Matthias Sauer, Bernd Becker, Hans-Joachim Wunderlich:
Formal verification of secure reconfigurable scan network infrastructure. ETS 2016: 1-6 - [c306]Karsten Scheibler, Felix Neubauer, Ahmed Mahdi, Martin Fränzle, Tino Teige, Tom Bienmüller, Detlef Fehrer, Bernd Becker:
Accurate ICP-based floating-point reasoning. FMCAD 2016: 177-184 - [c305]Sebastian Volkmann, Linus Feiten, Christian Zimmermann, Sebastian Sester, Laura Wehle, Bernd Becker:
Digitale Tarnkappe: Anonymisierung in Videoaufnahmen. GI-Jahrestagung 2016: 413-426 - [c304]Linus Feiten, Sebastian Sester, Christian Zimmermann, Sebastian Volkmann, Laura Wehle, Bernd Becker:
Revocable Anonymisation in Video Surveillance: A "Digital Cloak of Invisibility". HCC 2016: 314-327 - [c303]Mathias Soeken, Pascal Raiola, Baruch Sterin, Bernd Becker, Giovanni De Micheli, Matthias Sauer:
SAT-Based Combinational and Sequential Dependency Computation. Haifa Verification Conference 2016: 1-17 - [c302]Ahmed Mahdi, Karsten Scheibler, Felix Neubauer, Martin Fränzle, Bernd Becker:
Advancing Software Model Checking Beyond Linear Arithmetic Theories. Haifa Verification Conference 2016: 186-201 - [c301]Bernd Becker:
Known unknowns - Knowledge in the presence of unknowns. LATS 2016: 1 - [c300]Karsten Scheibler, Dominik Erb, Bernd Becker:
Applying Tailored Formal Methods to X-ATPG. MBMV 2016: 138 - [c299]Erika Ábrahám, John Abbott, Bernd Becker, Anna Maria Bigatti, Martin Brain, Bruno Buchberger, Alessandro Cimatti, James H. Davenport, Matthew England, Pascal Fontaine, Stephen Forrest, Alberto Griggio, Daniel Kroening, Werner M. Seiler, Thomas Sturm:
SC2: Satisfiability Checking Meets Symbolic Computation - (Project Paper). CICM 2016: 28-43 - [c298]Ralf Wimmer, Christoph Scholl, Karina Wimmer, Bernd Becker:
Dependency Schemes for DQBF. SAT 2016: 473-489 - [c297]Benjamin Völker, Tobias Schubert, Bernd Becker:
iHouse: A Voice-Controlled, Centralized, Retrospective Smart Home. S-CUBE 2016: 68-80 - [c296]Marc Pfeifer, Tobias Schubert, Bernd Becker:
PackSens: A Condition and Transport Monitoring System Based on an Embedded Sensor Platform. S-CUBE 2016: 81-92 - [c295]Felix Neubauer, Karsten Scheibler, Bernd Becker, Ahmed Mahdi, Martin Fränzle, Tino Teige, Tom Bienmüller, Detlef Fehrer:
Accurate Dead Code Detection in Embedded C Code by Arithmetic Constraint Solving. SC²@SYNASC 2016: 32-38 - [c294]Andreas Riefert, Riccardo Cantoro, Matthias Sauer, Matteo Sonza Reorda, Bernd Becker:
Effective generation and evaluation of diagnostic SBST programs. VTS 2016: 1-6 - [i10]Erika Ábrahám, John Abbott, Bernd Becker, Anna Maria Bigatti, Martin Brain, Bruno Buchberger, Alessandro Cimatti, James H. Davenport, Matthew England, Pascal Fontaine, Stephen Forrest, Alberto Griggio, Daniel Kroening, Werner M. Seiler, Thomas Sturm:
Satisfiability Checking and Symbolic Computation. CoRR abs/1607.06945 (2016) - [i9]Erika Ábrahám, John Abbott, Bernd Becker, Anna Maria Bigatti, Martin Brain, Bruno Buchberger, Alessandro Cimatti, James H. Davenport, Matthew England, Pascal Fontaine, Stephen Forrest, Alberto Griggio, Daniel Kroening, Werner M. Seiler, Thomas Sturm:
Satisfiability Checking meets Symbolic Computation (Project Paper). CoRR abs/1607.08028 (2016) - [i8]Linus Feiten, Matthias Sauer, Bernd Becker:
On Metrics to Quantify the Inter-Device Uniqueness of PUFs. IACR Cryptol. ePrint Arch. 2016: 320 (2016) - 2015
- [j63]Christian Miller, Paolo Marin, Bernd Becker:
Verification of partial designs using incremental QBF. AI Commun. 28(2): 283-307 (2015) - [j62]Ralf Wimmer, Nils Jansen, Andreas Vorpahl, Erika Ábrahám, Joost-Pieter Katoen, Bernd Becker:
High-level Counterexamples for Probabilistic Automata. Log. Methods Comput. Sci. 11(1) (2015) - [j61]Linus Feiten, Matthias Sauer, Tobias Schubert, Victor Tomashevich, Ilia Polian, Bernd Becker:
Formal Vulnerability Analysis of Security Components. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(8): 1358-1369 (2015) - [j60]Dominik Erb, Michael A. Kochte, Sven Reimer, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker:
Accurate QBF-Based Test Pattern Generation in Presence of Unknown Values. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(12): 2025-2038 (2015) - [j59]Ernst Moritz Hahn, Holger Hermanns, Ralf Wimmer, Bernd Becker:
Transient Reward Approximation for Continuous-Time Markov Chains. IEEE Trans. Reliab. 64(4): 1254-1275 (2015) - [c293]Andreas Riefert, Riccardo Cantoro, Matthias Sauer, Matteo Sonza Reorda, Bernd Becker:
On the automatic generation of SBST test programs for in-field test. DATE 2015: 1186-1191 - [c292]Karina Gitina, Ralf Wimmer, Sven Reimer, Matthias Sauer, Christoph Scholl, Bernd Becker:
Solving DQBF through quantifier elimination. DATE 2015: 1617-1622 - [c291]Linus Feiten, Tobias Martin, Matthias Sauer, Bernd Becker:
Improving RO-PUF quality on FPGAs by incorporating design-dependent frequency biases. ETS 2015: 1-6 - [c290]Kohei Miyase, Matthias Sauer, Bernd Becker, Xiaoqing Wen, Seiji Kajihara:
Identification of high power consuming areas with gate type and logic level information. ETS 2015: 1-6 - [c289]Karsten Scheibler, Dominik Erb, Bernd Becker:
Improving test pattern generation in presence of unknown values beyond restricted symbolic logic. ETS 2015: 1-6 - [c288]Tim Quatmann, Nils Jansen, Christian Dehnert, Ralf Wimmer, Erika Ábrahám, Joost-Pieter Katoen, Bernd Becker:
Counterexamples for Expected Rewards. FM 2015: 435-452 - [c287]Karsten Scheibler, Leonore Winterer, Ralf Wimmer, Bernd Becker:
Towards Verification of Artificial Neural Networks. MBMV 2015: 30-40 - [c286]Jan Burchard, Tobias Schubert, Bernd Becker:
Laissez-Faire Caching for Parallel #SAT Solving. SAT 2015: 46-61 - [c285]Ralf Wimmer, Karina Gitina, Jennifer Nist, Christoph Scholl, Bernd Becker:
Preprocessing for DQBF. SAT 2015: 173-190 - [c284]Hassan Hatefi, Bettina Braitling, Ralf Wimmer, Luis María Ferrer Fioriti, Holger Hermanns, Bernd Becker:
Cost vs. Time in Stochastic Games and Markov Automata. SETTA 2015: 19-34 - [c283]Bernd Becker, Matthias Sauer, Christoph Scholl, Ralf Wimmer:
Modeling Unknown Values in Test and Verification. SyDe Summer School 2015: 122-150 - [c282]Bettina Braitling, Luis María Ferrer Fioriti, Hassan Hatefi, Ralf Wimmer, Bernd Becker, Holger Hermanns:
Abstraction-Based Computation of Reward Measures for Markov Automata. VMCAI 2015: 172-189 - [c281]Dominik Erb, Karsten Scheibler, Matthias Sauer, Sudhakar M. Reddy, Bernd Becker:
Multi-cycle Circuit Parameter Independent ATPG for interconnect open defects. VTS 2015: 1-6 - [c280]Andreas Riefert, Matthias Sauer, Sudhakar M. Reddy, Bernd Becker:
Improving diagnosis resolution of a fault detection test set. VTS 2015: 1-6 - 2014
- [j58]Sven Reimer, Matthias Sauer, Paolo Marin, Bernd Becker:
QBF with Soft Variables. Electron. Commun. Eur. Assoc. Softw. Sci. Technol. 70 (2014) - [j57]Nils Jansen, Ralf Wimmer, Erika Ábrahám, Barna Zajzon, Joost-Pieter Katoen, Bernd Becker, Johann Schuster:
Symbolic counterexample generation for large discrete-time Markov chains. Sci. Comput. Program. 91: 90-114 (2014) - [j56]Ralf Wimmer, Nils Jansen, Erika Ábrahám, Joost-Pieter Katoen, Bernd Becker:
Minimal counterexamples for linear-time probabilistic verification. Theor. Comput. Sci. 549: 61-100 (2014) - [j55]Dominik Erb, Michael A. Kochte, Matthias Sauer, Stefan Hillebrecht, Tobias Schubert, Hans-Joachim Wunderlich, Bernd Becker:
Exact Logic and Fault Simulation in Presence of Unknowns. ACM Trans. Design Autom. Electr. Syst. 19(3): 28:1-28:17 (2014) - [c279]Dominik Erb, Karsten Scheibler, Matthias Sauer, Sudhakar M. Reddy, Bernd Becker:
Circuit Parameter Independent Test Pattern Generation for Interconnect Open Defects. ATS 2014: 131-136 - [c278]Sven Reimer, Matthias Sauer, Tobias Schubert, Bernd Becker:
Incremental Encoding and Solving of Cardinality Constraints. ATVA 2014: 297-313 - [c277]Dominik Erb, Karsten Scheibler, Matthias Sauer, Bernd Becker:
Efficient SMT-based ATPG for interconnect open defects. DATE 2014: 1-6 - [c276]Sven Reimer, Matthias Sauer, Tobias Schubert, Bernd Becker:
Using MaxBMC for Pareto-optimal circuit initialization. DATE 2014: 1-6 - [c275]Andreas Riefert, Lyl M. Ciganda, Matthias Sauer, Paolo Bernardi, Matteo Sonza Reorda, Bernd Becker:
An effective approach to automatic functional processor test generation for small-delay faults. DATE 2014: 1-6 - [c274]Urs Sonderegger, Martin Zimmermann, Katrin Weber, Bernd Becker:
Mobile Learning mit kontextbezogenen mobilen Diensten in der "KMU Smart Factory": Szenarien und Lösungsansätze für Fertigungsprozesse. DeLFI Workshops 2014: 229-239 - [c273]Bernd Becker, Rolf Drechsler, Stephan Eggersglüß, Matthias Sauer:
Recent advances in SAT-based ATPG: Non-standard fault models, multi constraints and optimization. DTIS 2014: 1-10 - [c272]Matthias Sauer, Ilia Polian, Michael E. Imhof, Abdullah Mumtaz, Eric Schneider, Alexander Czutro, Hans-Joachim Wunderlich, Bernd Becker:
Variation-aware deterministic ATPG. ETS 2014: 1-6 - [c271]Karsten Scheibler, Bernd Becker:
Using interval constraint propagation for pseudo-Boolean constraint solving. FMCAD 2014: 203-206 - [c270]Georges Morbé, Christian Miller, Christoph Scholl, Bernd Becker:
Combined Bounded and Symbolic Model Checking for Incomplete Timed Systems. Haifa Verification Conference 2014: 30-47 - [c269]Dominik Erb, Karsten Scheibler, Michael A. Kochte, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker:
Test pattern generation in presence of unknown values based on restricted symbolic logic. ITC 2014: 1-10 - [c268]Karsten Scheibler, Bernd Becker:
Implication Graph Compression inside the SMT Solver iSAT3. MBMV 2014: 25-36 - [c267]Nils Jansen, Florian Corzilius, Matthias Volk, Ralf Wimmer, Erika Ábrahám, Joost-Pieter Katoen, Bernd Becker:
Accelerating Parametric Probabilistic Verification. QEST 2014: 404-420 - [c266]Erika Ábrahám, Bernd Becker, Christian Dehnert, Nils Jansen, Joost-Pieter Katoen, Ralf Wimmer:
Counterexample Generation for Discrete-Time Markov Models: An Introductory Survey. SFM 2014: 65-121 - [c265]Alexander Czutro, Sudhakar M. Reddy, Ilia Polian, Bernd Becker:
SAT-Based Test Pattern Generation with Improved Dynamic Compaction. VLSID 2014: 56-61 - [c264]Matthias Sauer, Sven Reimer, Sudhakar M. Reddy, Bernd Becker:
Efficient SAT-Based Circuit Initialization for Larger Designs. VLSID 2014: 62-67 - [c263]Bettina Braitling, Luis María Ferrer Fioriti, Hassan Hatefi, Ralf Wimmer, Bernd Becker, Holger Hermanns:
MeGARA: Menu-based Game Abstraction and Abstraction Refinement of Markov Automata. QAPL 2014: 48-63 - 2013
- [j54]Matthias Sauer, Alexander Czutro, Tobias Schubert, Stefan Hillebrecht, Ilia Polian, Bernd Becker:
SAT-Based Analysis of Sensitizable Paths. IEEE Des. Test 30(4): 81-88 (2013) - [j53]Linus Feiten, Andreas Spilla, Matthias Sauer, Tobias Schubert, Bernd Becker:
Implementation and Analysis of Ring Oscillator PUFs on 60 nm Altera Cyclone FPGAs. Inf. Secur. J. A Glob. Perspect. 22(5-6): 265-273 (2013) - [c262]Matthias Sauer, Sven Reimer, Ilia Polian, Tobias Schubert, Bernd Becker:
Provably optimal test cube generation using quantified boolean formula solving. ASP-DAC 2013: 533-539 - [c261]Kohei Miyase, Matthias Sauer, Bernd Becker, Xiaoqing Wen, Seiji Kajihara:
Search Space Reduction for Low-Power Test Generation. Asian Test Symposium 2013: 171-176 - [c260]Dominik Erb, Michael A. Kochte, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker:
Accurate Multi-cycle ATPG in Presence of X-Values. Asian Test Symposium 2013: 245-250 - [c259]Ulrich Loup, Karsten Scheibler, Florian Corzilius, Erika Ábrahám, Bernd Becker:
A Symbiosis of Interval Constraint Propagation and Cylindrical Algebraic Decomposition. CADE 2013: 193-207 - [c258]Young Moon Kim, Jun Seomun, Hyung-Ock Kim, Kyung Tae Do, Jung Yun Choi, Kee Sup Kim, Matthias Sauer, Bernd Becker, Subhasish Mitra:
Detection of early-life failures in high-K metal-gate transistors and ultra low-K inter-metal dielectrics. CICC 2013: 1-4 - [c257]Stefan Hillebrecht, Michael A. Kochte, Dominik Erb, Hans-Joachim Wunderlich, Bernd Becker:
Accurate QBF-based test pattern generation in presence of unknown values. DATE 2013: 436-441 - [c256]Matthias Sauer, Sven Reimer, Tobias Schubert, Ilia Polian, Bernd Becker:
Efficient SAT-based dynamic compaction and relaxation for longest sensitizable paths. DATE 2013: 448-453 - [c255]Linus Feiten, Katrin Weber, Bernd Becker:
SMILE: Smartphones in der Lehre - ein Rück- und Überblick. GI-Jahrestagung 2013: 255-269 - [c254]Karina Gitina, Sven Reimer, Matthias Sauer, Ralf Wimmer, Christoph Scholl, Bernd Becker:
Equivalence checking of partial designs using dependency quantified Boolean formulae. ICCD 2013: 396-403 - [c253]Matthias Sauer, Young Moon Kim, Jun Seomun, Hyung-Ock Kim, Kyung Tae Do, Jung Yun Choi, Kee Sup Kim, Subhasish Mitra, Bernd Becker:
Early-life-failure detection using SAT-based ATPG. ITC 2013: 1-10 - [c252]Marina Aparicio, Mariane Comte, Florence Azaïs, Michel Renovell, Jie Jiang, Ilia Polian, Bernd Becker:
Pre-characterization procedure for a mixed mode simulation of IR-drop induced delays. LATW 2013: 1-6 - [c251]Benjamin Andres, Matthias Sauer, Martin Gebser, Tobias Schubert, Bernd Becker, Torsten Schaub:
Accurate Computation of Sensitizable Paths Using Answer Set Programming. LPNMR 2013: 92-101 - [c250]Karina Gitina, Sven Reimer, Matthias Sauer, Ralf Wimmer, Christoph Scholl, Bernd Becker:
Equivalence Checking for Partial Implementations Revisited. MBMV 2013: 61-70 - [c249]Karsten Scheibler, Stefan Kupferschmid, Bernd Becker:
Recent Improvements in the SMT Solver iSAT. MBMV 2013: 231-241 - [c248]Bettina Braitling, Ralf Wimmer, Bernd Becker, Erika Ábrahám:
Stochastic Bounded Model Checking: Bounded Rewards and Compositionality. MBMV 2013: 243-254 - [c247]Christian Miller, Christoph Scholl, Bernd Becker:
Proving QBF-hardness in Bounded Model Checking for Incomplete Designs. MTV 2013: 23-28 - [c246]Ralf Wimmer, Nils Jansen, Andreas Vorpahl, Erika Ábrahám, Joost-Pieter Katoen, Bernd Becker:
High-Level Counterexamples for Probabilistic Automata. QEST 2013: 39-54 - [c245]Andreas Riefert, Jörg Müller, Matthias Sauer, Wolfram Burgard, Bernd Becker:
Identification of critical variables using an FPGA-based fault injection framework. VTS 2013: 1-6 - [i7]Nils Jansen, Florian Corzilius, Matthias Volk, Ralf Wimmer, Erika Ábrahám, Joost-Pieter Katoen, Bernd Becker:
Accelerating Parametric Probabilistic Verification. CoRR abs/1312.3979 (2013) - 2012
- [c244]Alexander Czutro, Michael E. Imhof, J. Jiang, Abdullah Mumtaz, Matthias Sauer, Bernd Becker, Ilia Polian, Hans-Joachim Wunderlich:
Variation-Aware Fault Grading. Asian Test Symposium 2012: 344-349 - [c243]Nils Jansen, Erika Ábrahám, Matthias Volk, Ralf Wimmer, Joost-Pieter Katoen, Bernd Becker:
The COMICS Tool - Computing Minimal Counterexamples for DTMCs. ATVA 2012: 349-353 - [c242]Bernd Becker, Rüdiger Ehlers, Matthew Lewis, Paolo Marin:
ALLQBF Solving by Computational Learning. ATVA 2012: 370-384 - [c241]Linus Feiten, Manuel Bührer, Sebastian Sester, Bernd Becker:
SMILE - Smartphones in Lectures - Initiating a Smartphone-based Audience Response System as a Student Project. CSEDU (1) 2012: 288-293 - [c240]Jie Jiang, Matthias Sauer, Alexander Czutro, Bernd Becker, Ilia Polian:
On the optimality of K longest path generation algorithm under memory constraints. DATE 2012: 418-423 - [c239]Paolo Marin, Christian Miller, Matthew Lewis, Bernd Becker:
Verification of partial designs using incremental QBF solving. DATE 2012: 623-628 - [c238]Linus Feiten, Matthias Sauer, Tobias Schubert, Alexander Czutro, Eberhard Böhl, Ilia Polian, Bernd Becker:
#SAT-based vulnerability analysis of security components - A case study. DFT 2012: 49-54 - [c237]Alexander Czutro, Matthias Sauer, Ilia Polian, Bernd Becker:
Multi-conditional SAT-ATPG for power-droop testing. ETS 2012: 1-6 - [c236]Stefan Hillebrecht, Michael A. Kochte, Hans-Joachim Wunderlich, Bernd Becker:
Exact stuck-at fault classification in presence of unknowns. ETS 2012: 1-6 - [c235]Matthias Sauer, Alexander Czutro, Bernd Becker, Ilia Polian:
On the quality of test vectors for post-silicon characterization. ETS 2012: 1-6 - [c234]Nils Jansen, Erika Ábrahám, Barna Zajzon, Ralf Wimmer, Johann Schuster, Joost-Pieter Katoen, Bernd Becker:
Symbolic Counterexample Generation for Discrete-Time Markov Chains. FACS 2012: 134-151 - [c233]Matthias Sauer, Alexander Czutro, Ilia Polian, Bernd Becker:
Small-delay-fault ATPG with waveform accuracy. ICCAD 2012: 30-36 - [c232]Celia Kaendler, Linus Feiten, Katrin Weber, Michael Wiedmann, Manuel Buehrer, Sebastian Sester, Bernd Becker:
SMILE - Smartphones in A University Learning Environment: A Classroom Response System. ICLS 2012 - [c231]Amit Kumar, Sudhakar M. Reddy, Bernd Becker, Irith Pomeranz:
Performance aware partitioning for 3D-SOCs. ISOCC 2012: 163-166 - [c230]Amit Kumar, Sudhakar M. Reddy, Irith Pomeranz, Bernd Becker:
TSV and DFT cost aware circuit partitioning for 3D-SOCs. ISQED 2012: 21-26 - [c229]Matthias Sauer, Stefan Kupferschmid, Alexander Czutro, Ilia Polian, Sudhakar M. Reddy, Bernd Becker:
Functional test of small-delay faults using SAT and Craig interpolation. ITC 2012: 1-8 - [c228]Sven Reimer, Florian Pigorsch, Christoph Scholl, Bernd Becker:
Enhanced Integration of QBF Solving Techniques. MBMV 2012: 133-143 - [c227]Ralf Wimmer, Bernd Becker, Nils Jansen, Erika Ábrahám, Joost-Pieter Katoen:
Minimal Critical Subsystems as Counterexamples for omega-Regular DTMC Properties. MBMV 2012: 169-180 - [c226]Paolo Marin, Christian Miller, Bernd Becker:
Incremental QBF Preprocessing for Partial Design Verification - (Poster Presentation). SAT 2012: 473-474 - [c225]Ralf Wimmer, Nils Jansen, Erika Ábrahám, Bernd Becker, Joost-Pieter Katoen:
Minimal Critical Subsystems for Discrete-Time Markov Models. TACAS 2012: 299-314 - [c224]Matthias Sauer, Stefan Kupferschmid, Alejandro Czutro, Sudhakar M. Reddy, Bernd Becker:
Analysis of Reachable Sensitisable Paths in Sequential Circuits with SAT and Craig Interpolation. VLSI Design 2012: 382-387 - [c223]Alexander Czutro, Matthias Sauer, Tobias Schubert, Ilia Polian, Bernd Becker:
SAT-ATPG using preferences for improved detection of complex defect mechanisms. VTS 2012: 170-175 - [i6]Nils Jansen, Erika Ábrahám, Maik Scheffler, Matthias Volk, Andreas Vorpahl, Ralf Wimmer, Joost-Pieter Katoen, Bernd Becker:
The COMICS Tool - Computing Minimal Counterexamples for Discrete-time Markov Chains. CoRR abs/1206.0603 (2012) - [i5]Ernst Moritz Hahn, Holger Hermanns, Ralf Wimmer, Bernd Becker:
Transient Reward Approximation for Grids, Crowds, and Viruses. CoRR abs/1212.1251 (2012) - 2011
- [j52]Fabian Hopsch, Bernd Becker, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, Hans-Joachim Wunderlich:
Variation-aware fault modeling. Sci. China Inf. Sci. 54(9): 1813-1826 (2011) - [j51]Stefan Kupferschmid, Matthew Lewis, Tobias Schubert, Bernd Becker:
Incremental preprocessing methods for use in BMC. Formal Methods Syst. Des. 39(2): 185-204 (2011) - [j50]Matthew Lewis, Tobias Schubert, Bernd Becker, Paolo Marin, Massimo Narizzano, Enrico Giunchiglia:
Parallel QBF Solving with Advanced Knowledge Sharing. Fundam. Informaticae 107(2-3): 139-166 (2011) - [j49]Erika Ábrahám, Tobias Schubert, Bernd Becker, Martin Fränzle, Christian Herde:
Parallel SAT Solving in Bounded Model Checking. J. Log. Comput. 21(1): 5-21 (2011) - [j48]Ilia Polian, John P. Hayes, Sudhakar M. Reddy, Bernd Becker:
Modeling and Mitigating Transient Errors in Logic Circuits. IEEE Trans. Dependable Secur. Comput. 8(4): 537-547 (2011) - [c222]Pepijn Crouzen, Ernst Moritz Hahn, Holger Hermanns, Abhishek Dhama, Oliver E. Theel, Ralf Wimmer, Bettina Braitling, Bernd Becker:
Bounded Fairness for Probabilistic Distributed Algorithms. ACSD 2011: 89-97 - [c221]J. M. Howard, Sudhakar M. Reddy, Irith Pomeranz, Bernd Becker:
Fault diagnosis aware ATE assisted test response compaction. ASP-DAC 2011: 812-817 - [c220]Matthias Sauer, Jie Jiang, Alejandro Czutro, Ilia Polian, Bernd Becker:
Efficient SAT-Based Search for Longest Sensitisable Paths. Asian Test Symposium 2011: 108-113 - [c219]Nils Jansen, Erika Ábrahám, Jens Katelaan, Ralf Wimmer, Joost-Pieter Katoen, Bernd Becker:
Hierarchical Counterexamples for Discrete-Time Markov Chains. ATVA 2011: 443-452 - [c218]Ernst Althaus, Bernd Becker, Daniel Dumitriu, Stefan Kupferschmid:
Integration of an LP Solver into Interval Constraint Propagation. COCOA 2011: 343-356 - [c217]Sven Reimer, Florian Pigorsch, Christoph Scholl, Bernd Becker:
Integration of orthogonal QBF solving techniques. DATE 2011: 149-154 - [c216]Amit Kumar, Sudhakar M. Reddy, Irith Pomeranz, Bernd Becker:
Hyper-graph based partitioning to reduce DFT cost for pre-bond 3D-IC testing. DATE 2011: 1424-1429 - [c215]Matthias Sauer, Alexander Czutro, Tobias Schubert, Stefan Hillebrecht, Ilia Polian, Bernd Becker:
SAT-based analysis of sensitisable paths. DDECS 2011: 93-98 - [c214]Stefan Kupferschmid, Bernd Becker, Tino Teige, Martin Fränzle:
Proof certificates and non-linear arithmetic constraints. DDECS 2011: 429-434 - [c213]Ilia Polian, Bernd Becker, Sybille Hellebrand, Hans-Joachim Wunderlich, Peter C. Maxwell:
Towards Variation-Aware Test Methods. ETS 2011: 219-225 - [c212]Stefan Kupferschmid, Bernd Becker:
Craig Interpolation in the Presence of Non-linear Constraints. FORMATS 2011: 240-255 - [c211]Bettina Braitling, Ralf Wimmer, Bernd Becker, Nils Jansen, Erika Ábrahám:
Counterexample Generation for Markov Chains Using SMT-Based Bounded Model Checking. FMOODS/FORTE 2011: 75-89 - [c210]Matthias Sauer, Alejandro Czutro, Ilia Polian, Bernd Becker:
Estimation of component criticality in early design steps. IOLTS 2011: 104-110 - [c209]Matthias Sauer, Victor Tomashevich, Jörg Müller, Matthew Lewis, Andreas Spilla, Ilia Polian, Bernd Becker, Wolfram Burgard:
An FPGA-based framework for run-time injection and analysis of soft errors in microprocessors. IOLTS 2011: 182-185 - [c208]Bettina Braitling, Ralf Wimmer, Bernd Becker, Nils Jansen, Erika Ábrahám:
SMT-based Counterexample Generation for Markov Chains. MBMV 2011: 19-28 - [c207]Christian Miller, Christoph Scholl, Bernd Becker:
Verifying Incomplete Networks of Timed Automata. MBMV 2011: 113-122 - [c206]Stefan Kupferschmid, Bernd Becker:
Craigsche Interpolation für Boolesche Kombinationen linearer und nichtlinearer Ungleichungen. MBMV 2011: 279-288 - [c205]Ralf Wimmer, Ernst Moritz Hahn, Holger Hermanns, Bernd Becker:
Reachability analysis for incomplete networks of Markov decision processes. MEMOCODE 2011: 151-160 - [c204]Christian Miller, Karina Gitina, Bernd Becker:
Bounded Model Checking of Incomplete Real-time Systems Using Quantified SMT Formulas. MTV 2011: 22-27 - 2010
- [j47]Alejandro Czutro, Ilia Polian, Matthew Lewis, Piet Engelke, Sudhakar M. Reddy, Bernd Becker:
Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability Analysis. Int. J. Parallel Program. 38(3-4): 185-202 (2010) - [j46]Ilia Polian, Bernd Becker:
Fault Models and Test Algorithms for Nanoscale Technologies (Fehlermodelle und Testalgorithmen für Nanoscale-Technologien). it Inf. Technol. 52(4): 189-194 (2010) - [c203]Fabian Hopsch, Bernd Becker, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, Hans-Joachim Wunderlich:
Variation-Aware Fault Modeling. Asian Test Symposium 2010: 87-93 - [c202]Bernd Becker, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, Hans-Joachim Wunderlich:
Massive statistical process variations: A grand challenge for testing nanoelectronic circuits. DSN Workshops 2010: 95-100 - [c201]Christian Miller, Stefan Kupferschmid, Bernd Becker:
Exploiting Craig Interpolants in Bounded Model Checking for Incomplete Designs. MBMV 2010: 77-86 - [c200]Natalia Kalinnik, Erika Ábrahám, Tobias Schubert, Ralf Wimmer, Bernd Becker:
Exploiting Different Strategies for the Parallelization of an SMT Solver. MBMV 2010: 97-106 - [c199]Tobias Nopper, Christian Miller, Matthew Lewis, Bernd Becker, Christoph Scholl:
SAT Modulo BDD -- A Combined Verification Approach for Incomplete Designs. MBMV 2010: 107-116 - [c198]Ralf Wimmer, Bernd Becker:
Correctness Issues of Symbolic Bisimulation Computation for Markov Chains. MMB/DFT 2010: 287-301 - [c197]Christian Miller, Karina Gitina, Christoph Scholl, Bernd Becker:
Bounded Model Checking of Incomplete Networks of Timed Automata. MTV 2010: 61-66 - [c196]Ralf Wimmer, Bettina Braitling, Bernd Becker, Ernst Moritz Hahn, Pepijn Crouzen, Holger Hermanns, Abhishek Dhama, Oliver E. Theel:
Symblicit Calculation of Long-Run Averages for Concurrent Probabilistic Systems. QEST 2010: 27-36 - [c195]Erika Ábrahám, Nils Jansen, Ralf Wimmer, Joost-Pieter Katoen, Bernd Becker:
DTMC Model Checking by SCC Reduction. QEST 2010: 37-46 - [c194]Christian Miller, Stefan Kupferschmid, Matthew Lewis, Bernd Becker:
Encoding Techniques, Craig Interpolants and Bounded Model Checking for Incomplete Designs. SAT 2010: 194-208 - [e2]Bernd Becker, Luca Cardelli, Holger Hermanns, Sofiène Tahar:
Verification over discrete-continuous boundaries, 04.07. - 09.07.2010. Dagstuhl Seminar Proceedings 10271, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, Germany 2010 [contents] - [i4]Bernd Becker, Luca Cardelli, Holger Hermanns, Sofiène Tahar:
10271 Abstracts Collection - Verification over discrete-continuous boundaries. Verification over discrete-continuous boundaries 2010
2000 – 2009
- 2009
- [j45]Tobias Schubert, Matthew Lewis, Bernd Becker:
PaMiraXT: Parallel SAT Solving with Threads and Message Passing. J. Satisf. Boolean Model. Comput. 6(4): 203-222 (2009) - [j44]Piet Engelke, Bernd Becker, Michel Renovell, Jürgen Schlöffel, Bettina Braitling, Ilia Polian:
SUPERB: Simulator utilizing parallel evaluation of resistive bridges. ACM Trans. Design Autom. Electr. Syst. 14(4): 56:1-56:21 (2009) - [j43]Eckard Böde, Marc Herbstritt, Holger Hermanns, Sven Johr, Thomas Peikenkamp, Reza Pulungan, Jan-Hendrik Rakow, Ralf Wimmer, Bernd Becker:
Compositional Dependability Evaluation for STATEMATE. IEEE Trans. Software Eng. 35(2): 274-292 (2009) - [c193]Paolo Marin, Matthew Lewis, Tobias Schubert, Massimo Narizzano, Bernd Becker, Enrico Giunchiglia:
Evaluation of Knowledge Sharing Strategies in a Parallel QBF Solver. RCRA@AI*IA 2009 - [c192]Alejandro Czutro, Ilia Polian, Piet Engelke, Sudhakar M. Reddy, Bernd Becker:
Dynamic Compaction in SAT-Based ATPG. Asian Test Symposium 2009: 187-190 - [c191]Kunal P. Ganeshpure, Ilia Polian, Sandip Kundu, Bernd Becker:
Reducing temperature variability by routing heat pipes. ACM Great Lakes Symposium on VLSI 2009: 63-68 - [c190]Paolo Marin, Massimo Narizzano, Enrico Giunchiglia, Matthew Lewis, Tobias Schubert, Bernd Becker:
Comparison of knowledge sharing strategies in a parallel QBF solver. HPCS 2009: 161-167 - [c189]Marc Hunger, Sybille Hellebrand, Alejandro Czutro, Ilia Polian, Bernd Becker:
ATPG-based grading of strong fault-secureness. IOLTS 2009: 269-274 - [c188]Matthew Lewis, Tobias Schubert, Bernd Becker:
QmiraXT - A Multithreaded QBF Solver. MBMV 2009: 7-16 - [c187]Stefan Kupferschmid, Tino Teige, Bernd Becker, Martin Fränzle:
Proofs of Unsatisfiability for mixed Boolean and Non-linear Arithmetic Constraint Formulae. MBMV 2009: 27-36 - [c186]Natalia Kalinnik, Tobias Schubert, Erika Ábrahám, Ralf Wimmer, Bernd Becker:
Picoso - A Parallel Interval Constraint Solver. PDPTA 2009: 473-479 - [c185]Matthew Lewis, Paolo Marin, Tobias Schubert, Massimo Narizzano, Bernd Becker, Enrico Giunchiglia:
PaQuBE: Distributed QBF Solving with Advanced Knowledge Sharing. SAT 2009: 509-523 - [c184]Abhishek Dhama, Oliver E. Theel, Pepijn Crouzen, Holger Hermanns, Ralf Wimmer, Bernd Becker:
Dependability Engineering of Silent Self-stabilizing Systems. SSS 2009: 238-253 - [c183]Alejandro Czutro, Ilia Polian, Matthew Lewis, Piet Engelke, Sudhakar M. Reddy, Bernd Becker:
TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis. VLSI Design 2009: 227-232 - [c182]Ralf Wimmer, Bettina Braitling, Bernd Becker:
Counterexample Generation for Discrete-Time Markov Chains Using Bounded Model Checking. VMCAI 2009: 366-380 - [c181]Nicolas Houarche, Mariane Comte, Michel Renovell, Alejandro Czutro, Piet Engelke, Ilia Polian, Bernd Becker:
An Electrical Model for the Fault Simulation of Small Delay Faults Caused by Crosstalk Aggravated Resistive Short Defects. VTS 2009: 21-26 - [e1]Bernd Becker, V. Bertacoo, Rolf Drechsler, Masahiro Fujita:
Algorithms and Applications for Next Generation SAT Solvers, 08.11. - 13.11.2009. Dagstuhl Seminar Proceedings 09461, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, Germany 2009 [contents] - [i3]Bernd Becker, Valeria Bertacco, Rolf Drechsler, Masahiro Fujita:
09461 Abstracts Collection - Algorithms and Applications for Next Generation SAT Solvers. Algorithms and Applications for Next Generation SAT Solvers 2009 - 2008
- [b5]Bernd Becker, Paul Molitor:
Technische Informatik - eine einführende Darstellung. Oldenbourg 2008, ISBN 978-3-486-58650-3, pp. I-XVI, 1-419 - [j42]Piet Engelke, Ilia Polian, Michel Renovell, Sandip Kundu, Bharath Seshadri, Bernd Becker:
On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(2): 327-338 (2008) - [c180]Piet Engelke, Ilia Polian, Jürgen Schlöffel, Bernd Becker:
Resistive Bridging Fault Simulation of Industrial Circuits. DATE 2008: 628-633 - [c179]Ralf Wimmer, Alexander Kortus, Marc Herbstritt, Bernd Becker:
Probabilistic Model Checking and Reliability of Results. DDECS 2008: 207-212 - [c178]Ilia Polian, Kohei Miyase, Yusuke Nakamura, Seiji Kajihara, Piet Engelke, Bernd Becker, Stefan Spinner, Xiaoqing Wen:
Diagnosis of Realistic Defects Based on the X-Fault Model. DDECS 2008: 263-266 - [c177]Ilia Polian, Sudhakar M. Reddy, Irith Pomeranz, Xun Tang, Bernd Becker:
On Reducing Circuit Malfunctions Caused by Soft Errors. DFT 2008: 245-253 - [c176]Damian Nowroth, Ilia Polian, Bernd Becker:
A study of cognitive resilience in a JPEG compressor. DSN 2008: 32-41 - [c175]Alejandro Czutro, Nicolas Houarche, Piet Engelke, Ilia Polian, Mariane Comte, Michel Renovell, Bernd Becker:
A Simulator of Small-Delay Faults Caused by Resistive-Open Defects. ETS 2008: 113-118 - [c174]Christian G. Zoellin, Hans-Joachim Wunderlich, Ilia Polian, Bernd Becker:
Selective Hardening in Early Design Steps. ETS 2008: 185-190 - [c173]Bernd Becker, Marc Herbstritt, Natalia Kalinnik, Matthew Lewis, Juri Lichtner, Tobias Nopper, Ralf Wimmer:
Propositional approximations for bounded model checking of partial circuit designs. ICCD 2008: 52-59 - [c172]Ilia Polian, Sudhakar M. Reddy, Bernd Becker:
Scalable Calculation of Logical Masking Effects for Selective Hardening Against Soft Errors. ISVLSI 2008: 257-262 - [c171]Stefan Hillebrecht, Ilia Polian, Piet Engelke, Bernd Becker, Martin Keim, Wu-Tung Cheng:
Extraction, Simulation and Test Generation for Interconnect Open Defects Based on Enhanced Aggressor-Victim Model. ITC 2008: 1-10 - [c170]Ralf Wimmer, Alexander Kortus, Marc Herbstritt, Bernd Becker:
The Demand for Reliability in Probabilistic Verification. MBMV 2008: 99-108 - [c169]Stefan Spinner, Ilia Polian, Piet Engelke, Bernd Becker, Martin Keim, Wu-Tung Cheng:
Automatic Test Pattern Generation for Interconnect Open Defects. VTS 2008: 181-186 - 2007
- [j41]Ilia Polian, Alejandro Czutro, Sandip Kundu, Bernd Becker:
Power Droop Testing. IEEE Des. Test Comput. 24(3): 276-284 (2007) - [j40]Bernd Becker, Andreas Podelski, Werner Damm, Martin Fränzle, Ernst-Rüdiger Olderog, Reinhard Wilhelm:
SFB/TR 14 AVACS - Automatic Verification and Analysis of Complex Systems (Der Sonderforschungsbereich/Transregio 14 AVACS - Automatische Verifikation und Analyse komplexer Systeme). it Inf. Technol. 49(2): 118-126 (2007) - [c168]Matthew Lewis, Tobias Schubert, Bernd Becker:
Multithreaded SAT Solving. ASP-DAC 2007: 926-931 - [c167]Stefan Spinner, Jie Jiang, Ilia Polian, Piet Engelke, Bernd Becker:
Simulating Open-Via Defects. ATS 2007: 265-270 - [c166]Piet Engelke, Bettina Braitling, Ilia Polian, Michel Renovell, Bernd Becker:
SUPERB: Simulator Utilizing Parallel Evaluation of Resistive Bridges. ATS 2007: 433-438 - [c165]Bernd Becker, Christian Dax, Jochen Eisinger, Felix Klaedtke:
LIRA: Handling Constraints of Linear Arithmetics over the Integers and the Reals. CAV 2007: 307-310 - [c164]Marc Herbstritt, Bernd Becker, Erika Ábrahám, Christian Herde:
On Variable Selection in SAT-LP-based Bounded Model Checking of Linear Hybrid Automata. DDECS 2007: 391-396 - [c163]Marc Herbstritt, Bernd Becker:
On Combining 01X-Logic and QBF. EUROCAST 2007: 531-538 - [c162]Ralf Wimmer, Marc Herbstritt, Bernd Becker:
Optimization techniques for BDD-based bisimulation computation. ACM Great Lakes Symposium on VLSI 2007: 405-410 - [c161]Tobias Nopper, Christoph Scholl, Bernd Becker:
Computation of minimal counterexamples by using black box techniques and symbolic methods. ICCAD 2007: 273-280 - [c160]Ilia Polian, Damian Nowroth, Bernd Becker:
Identification of Critical Errors in Imaging Applications. IOLTS 2007: 201-202 - [c159]Bernd Becker:
AVACS -- Automatic Verification and Analysis of Complex Systems. MBMV 2007: 79-80 - [c158]Ralf Wimmer, Marc Herbstritt, Bernd Becker:
Forwarding, Splitting, and Block Ordering to Optimize BDD-based Bisimulation Computation. MBMV 2007: 203-212 - [c157]Marc Herbstritt, Vanessa Struve, Bernd Becker:
Application of Lifting in Partial Design Analysis. MTV 2007: 33-38 - [c156]John P. Hayes, Ilia Polian, Bernd Becker:
An Analysis Framework for Transient-Error Tolerance. VTS 2007: 249-255 - [i2]Ilia Polian, Alejandro Czutro, Bernd Becker:
Evolutionary Optimization in Code-Based Test Compression. CoRR abs/0710.4670 (2007) - [i1]Stefan Spinner, Julian Bartholomeyczik, Bernd Becker, Michael Doelle, Oliver Paul, Ilia Polian, Roland Roth, Karl Seitz, Patrick Ruther:
Electromechanical Reliability Testing of Three-Axial Silicon Force Sensors. CoRR abs/0711.3289 (2007) - 2006
- [j39]Piet Engelke, Ilia Polian, Michel Renovell, Bernd Becker:
Automatic Test Pattern Generation for Resistive Bridging Faults. J. Electron. Test. 22(1): 61-69 (2006) - [j38]Bernd Becker, Ilia Polian, Sybille Hellebrand, Bernd Straube, Hans-Joachim Wunderlich:
DFG-Projekt RealTest - Test und Zuverlässigkeit nanoelektronischer Systeme (DFG-Project - Test and Reliability of Nano-Electronic Systems). it Inf. Technol. 48(5): 304- (2006) - [j37]Thomas Eschbach, Wolfgang Günther, Bernd Becker:
Orthogonal Hypergraph Drawing for Improved Visibility. J. Graph Algorithms Appl. 10(2): 141-157 (2006) - [j36]Piet Engelke, Ilia Polian, Michel Renovell, Bernd Becker:
Simulating Resistive-Bridging and Stuck-At Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(10): 2181-2192 (2006) - [j35]Yuyi Tang, Hans-Joachim Wunderlich, Piet Engelke, Ilia Polian, Bernd Becker, Jürgen Schlöffel, Friedrich Hapke, Michael Wittke:
X-masking during logic BIST and its impact on defect coverage. IEEE Trans. Very Large Scale Integr. Syst. 14(2): 193-202 (2006) - [c155]Piet Engelke, Ilia Polian, Hans Manhaeve, Michel Renovell, Bernd Becker:
Delta-IDDQ Testing of Resistive Short Defects. ATS 2006: 63-68 - [c154]Michel Renovell, Mariane Comte, Ilia Polian, Piet Engelke, Bernd Becker:
A Specific ATPG technique for Resistive Open with Sequence Recursive Dependency. ATS 2006: 273-278 - [c153]Ralf Wimmer, Marc Herbstritt, Holger Hermanns, Kelley Strampp, Bernd Becker:
Sigref- A Symbolic Bisimulation Tool Box. ATVA 2006: 477-492 - [c152]Ralf Wimmer, Marc Herbstritt, Bernd Becker:
Minimization of Large State Spaces using Symbolic Branching Bisimulation. DDECS 2006: 9-14 - [c151]Jochen Eisinger, Ilia Polian, Bernd Becker, Alexander Metzner, Stephan Thesing, Reinhard Wilhelm:
Automatic Identification of Timing Anomalies for Cycle-Accurate Worst-Case Execution Time Analysis. DDECS 2006: 15-20 - [c150]Ilia Polian, Bernd Becker, Masato Nakasato, Satoshi Ohtake, Hideo Fujiwara:
Low-Cost Hardening of Image Processing Applications Against Soft Errors. DFT 2006: 274-279 - [c149]Erika Ábrahám, Tobias Schubert, Bernd Becker, Martin Fränzle, Christian Herde:
Parallel SAT Solving in Bounded Model Checking. FMICS/PDMC 2006: 301-315 - [c148]Ilia Polian, Alejandro Czutro, Sandip Kundu, Bernd Becker:
Power Droop Testing. ICCD 2006: 243-250 - [c147]Erika Ábrahám, Marc Herbstritt, Bernd Becker, Martin Steffen:
Memory-aware Bounded Model Checking for Linear Hybrid Systems. MBMV 2006: 153-162 - [c146]Marc Herbstritt, Bernd Becker, Christoph Scholl:
Advanced SAT-Techniques for Bounded Model Checking of Blackbox Designs. MTV 2006: 37-44 - [c145]Eckard Böde, Marc Herbstritt, Holger Hermanns, Sven Johr, Thomas Peikenkamp, Reza Pulungan, Ralf Wimmer, Bernd Becker:
Compositional Performability Evaluation for STATEMATE. QEST 2006: 167-178 - [c144]Jan Reineke, Björn Wachter, Stephan Thesing, Reinhard Wilhelm, Ilia Polian, Jochen Eisinger, Bernd Becker:
A Definition and Classification of Timing Anomalies. WCET 2006 - [c143]Erika Ábrahám, Marc Herbstritt, Bernd Becker, Martin Steffen:
Bounded Model Checking with Parametric Data Structures. BMC@FLoC 2006: 3-16 - 2005
- [b4]Bernd Becker, Rolf Drechsler, Paul Molitor:
Technische Informatik - eine Einführung. Pearson Studium, Pearson Education 2005, ISBN 978-3-8273-7092-1, pp. 1-390 - [j34]Ilia Polian, Piet Engelke, Michel Renovell, Bernd Becker:
Modeling Feedback Bridging Faults with Non-Zero Resistance. J. Electron. Test. 21(1): 57-69 (2005) - [c142]Sandip Kundu, Piet Engelke, Ilia Polian, Bernd Becker:
On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing. Asian Test Symposium 2005: 266-271 - [c141]Ilia Polian, Thomas Fiehn, Bernd Becker, John P. Hayes:
A Family of Logical Fault Models for Reversible Circuits. Asian Test Symposium 2005: 422-427 - [c140]Ilia Polian, Alejandro Czutro, Bernd Becker:
Evolutionary Optimization in Code-Based Test Compression. DATE 2005: 1124-1129 - [c139]Martina Welte, Thomas Eschbach, Bernd Becker:
Automated Text Extraction And Indexing Of Video Presentation Recordings For Keyword Search Via A Web Interface. DeLFI Workshops 2005: 61-66 - [c138]Gang Chen, Sudhakar M. Reddy, Irith Pomeranz, Janusz Rajski, Piet Engelke, Bernd Becker:
A unified fault model and test generation procedure for interconnect opens and bridges. ETS 2005: 22-27 - [c137]Tobias Schubert, Bernd Becker:
Lemma Exchange in a Microcontroller Based Parallel SAT Solver. ISVLSI 2005: 142-147 - [c136]Ilia Polian, John P. Hayes, Sandip Kundu, Bernd Becker:
Transient fault characterization in dynamic noisy environments. ITC 2005: 10 - [c135]Marc Herbstritt, Bernd Becker:
On SAT-based Bounded Invariant Checking of Blackbox Designs. MTV 2005: 23-28 - [c134]Tobias Schubert, Matthew D. T. Lewis, Bernd Becker:
PaMira - A Parallel SAT Solver with Knowledge Sharing. MTV 2005: 29-36 - [c133]Tobias Schubert, Bernd Becker:
Knowledge Sharing in a Microcontroller based Parallel SAT Solver. PDPTA 2005: 1049-1055 - [c132]Jochen Eisinger, Peter Winterer, Bernd Becker:
Securing Wireless Networks in a University Environment. PerCom Workshops 2005: 312-316 - [c131]Matthew D. T. Lewis, Tobias Schubert, Bernd Becker:
Speedup Techniques Utilized in Modern SAT Solvers. SAT 2005: 437-443 - [c130]Thomas Eschbach, Wolfgang Günther, Bernd Becker:
Orthogonal Circuit Visualization Improved by Merging the Placement and Routing Phases. VLSI Design 2005: 433-438 - [c129]Erika Ábrahám, Bernd Becker, Felix Klaedtke, Martin Steffen:
Optimizing Bounded Model Checking for Linear Hybrid Systems. VMCAI 2005: 396-412 - [c128]Ilia Polian, Sandip Kundu, Jean-Marc Gallière, Piet Engelke, Michel Renovell, Bernd Becker:
Resistive Bridge Fault Model Evolution from Conventional to Ultra Deep Submicron Technologies. VTS 2005: 343-348 - [c127]Bernd Becker, Markus Behle, Friedrich Eisenbrand, Ralf Wimmer:
BDDs in a Branch and Cut Framework. WEA 2005: 452-463 - 2004
- [j33]Ilia Polian, Bernd Becker:
Scalable Delay Fault BIST for Use with Low-Cost ATE. J. Electron. Test. 20(2): 181-197 (2004) - [c126]Tobias Schubert, Bernd Becker:
Parallel SAT Solving with Microcontrollers. AACC 2004: 59-67 - [c125]Tobias Schubert, Bernd Becker:
A Distributed SAT Solver for Microcontroller. ARCS Workshops 2004: 338-347 - [c124]John P. Hayes, Ilia Polian, Bernd Becker:
Testing for Missing-Gate Faults in Reversible Circuits. Asian Test Symposium 2004: 100-105 - [c123]Piet Engelke, Ilia Polian, Michel Renovell, Bernd Becker:
Automatic test pattern generation for resistive bridging faults. ETS 2004: 160-165 - [c122]Thomas Eschbach, Wolfgang Günther, Bernd Becker:
Orthogonal hypergraph routing for improved visibility. ACM Great Lakes Symposium on VLSI 2004: 385-388 - [c121]Thomas Eschbach, Rolf Drechsler, Bernd Becker:
Placement and routing optimization for circuits derived from BDDs. ISCAS (5) 2004: 229-232 - [c120]Yuyi Tang, Hans-Joachim Wunderlich, Harald P. E. Vranken, Friedrich Hapke, Michael Wittke, Piet Engelke, Ilia Polian, Bernd Becker:
X-Masking During Logic BIST and Its Impact on Defect Coverage. ITC 2004: 442-451 - [c119]Bernd Becker, Markus Behle, Friedrich Eisenbrand, Martin Fränzle, Marc Herbstritt, Christian Herde, Jörg Hoffmann, Daniel Kröning, Bernhard Nebel, Ilia Polian, Ralf Wimmer:
Bounded Model Checking and Inductive Verification of Hybrid Discrete-continuous Systems. MBMV 2004: 65-75 - [c118]Matthew D. T. Lewis, Tobias Schubert, Bernd Becker:
Early Conflict Detection Based SAT Solving. MBMV 2004: 243-249 - [c117]Marc Herbstritt, Thomas Kmieciak, Bernd Becker:
On the Impact of Structural Circuit Partitioning on SAT-Based Combinational Circuit Verification. MTV 2004: 50-55 - [c116]Tobias Schubert, Bernd Becker:
PICHAFF2 - A Hierarchical Parallel SAT Solver. MTV 2004: 56-61 - [c115]Matthew D. T. Lewis, Tobias Schubert, Bernd Becker:
Early Conflict Detection Based BCP for SAT Solving. SAT 2004 - [c114]Piet Engelke, Ilia Polian, Michel Renovell, Bharath Seshadri, Bernd Becker:
The Pros and Cons of Very-Low-Voltage Testing: An Analysis based on Resistive Bridging Faults. VTS 2004: 171-178 - 2003
- [j32]Ilia Polian, Bernd Becker:
Multiple Scan Chain Design for Two-Pattern Testing. J. Electron. Test. 19(1): 37-48 (2003) - [j31]Jonathan Bradford, Hartmut Delong, Ilia Polian, Bernd Becker:
Simulating Realistic Bridging and Crosstalk Faults in an Industrial Setting. J. Electron. Test. 19(4): 387-395 (2003) - [j30]Martin Keim, Rolf Drechsler, Bernd Becker, Michael Martin, Paul Molitor:
Polynomial Formal Verification of Multipliers. Formal Methods Syst. Des. 22(1): 39-58 (2003) - [j29]Ilia Polian, Wolfgang Günther, Bernd Becker:
Pattern-based verification of connections to intellectual property cores. Integr. 35(1): 25-44 (2003) - [j28]Frank Schmiedle, Rolf Drechsler, Bernd Becker:
Exact Routing with Search Space Reduction. IEEE Trans. Computers 52(6): 815-825 (2003) - [c113]Ilia Polian, Bernd Becker, Sudhakar M. Reddy:
Evolutionary Optimization of Markov Sources for Pseudo Random Scan BIST. DATE 2003: 11184-11185 - [c112]Ilia Polian, Piet Engelke, Michel Renovell, Bernd Becker:
Modeling feedback bridging faults with non-zero resistance. ETW 2003: 91-96 - [c111]Piet Engelke, Ilia Polian, Michel Renovell, Bernd Becker:
Simulating Resistive Bridging and Stuck-At Faults. ITC 2003: 1051-1059 - [c110]Ilia Polian, Wolfgang Günther, Bernd Becker:
The Case for 2-POF. MBMV 2003: 164-173 - [c109]Marc Herbstritt, Bernd Becker:
Conflict-based Selection of Branching Rules in SAT-Algorithms. MBMV 2003: 189-198 - [c108]Marc Herbstritt, Bernd Becker:
Conflict-Based Selection of Branching Rules. SAT 2003: 441-451 - [c107]Thomas Eschbach, Wolfgang Günther, Bernd Becker:
Cross Reduction for Orthogonal Circuit Visualization. VLSI 2003: 107-113 - [c106]Ilia Polian, Bernd Becker:
Reducing ATE Cost in System-on-Chip Test. VLSI-SOC 2003: 337-342 - 2002
- [j27]Christoph Scholl, Bernd Becker, Thomas M. Weis:
On WLCDs and the Complexity of Word-Level Decision Diagrams-A Lower Bound for Division. Formal Methods Syst. Des. 20(3): 311-326 (2002) - [c105]Ilia Polian, Irith Pomeranz, Bernd Becker:
Exact Computation of Maximally Dominating Faults and Its Application to n-Detection Tests. Asian Test Symposium 2002: 2-14 - [c104]Jonathan Bradford, Hartmut Delong, Ilia Polian, Bernd Becker:
Simulating realistic bridging and crosstalk faults in an industrial setting. ETW 2002: 75-80 - [c103]Thomas Eschbach, Wolfgang Günther, Rolf Drechsler, Bernd Becker:
Crossing Reduction by Windows Optimization. GD 2002: 285-294 - [c102]Christoph Scholl, Bernd Becker:
Checking Equivalence for Circuits Containing Incompletely Specified Boxes. ICCD 2002: 56-63 - [c101]Ilia Polian, Bernd Becker:
Stop & Go BIST. IOLTW 2002: 147-151 - [c100]Ilia Polian, Martin Keim, Nicolai Mallig, Bernd Becker:
Sequential n -Detection Criteria: Keep It Simple. IOLTW 2002: 189 - [c99]Ilia Polian, Piet Engelke, Bernd Becker:
Efficient Bridging Fault Simulation of Sequential Circuits Based on Multi-Valued Logics. ISMVL 2002: 216-223 - [c98]Klaus-Jürgen Englert, Bernd Becker, Rolf Drechsler:
Symbolic Simulation of Algorithms Specified in HDL. MBMV 2002: 113-122 - [c97]Christoph Scholl, Bernd Becker:
Equivalence Checking in the Presence of Incompletely Specified Boxes. MBMV 2002: 239-248 - 2001
- [j26]Martin Keim, Nicole Drechsler, Rolf Drechsler, Bernd Becker:
Combining GAs and Symbolic Methods for High Quality Tests of Sequential Circuits. J. Electron. Test. 17(1): 37-51 (2001) - [c96]Christoph Scholl, Bernd Becker, Andreas Brogle:
The multiple variable order problem for binary decision diagrams: theory and practical application. ASP-DAC 2001: 85-90 - [c95]Wolfgang Günther, Andreas Hett, Bernd Becker:
Application of linearly transformed BDDs in sequential verification. ASP-DAC 2001: 91-96 - [c94]Ilia Polian, Wolfgang Günther, Bernd Becker:
Efficient Pattern-Based Verification of Connections to IP Cores . Asian Test Symposium 2001: 443-448 - [c93]Christoph Scholl, Bernd Becker:
Checking Equivalence for Partial Implementations. DAC 2001: 238-243 - [c92]Bernd Becker, Thomas Eschbach, Rolf Drechsler, Wolfgang Günther:
Greedy_IIP: Partitioning Large Graphs by Greedy Iterative Improvement. DSD 2001: 54-61 - [c91]Nicole Drechsler, Rolf Drechsler, Bernd Becker:
Multi-objective Optimisation Based on Relation Favour. EMO 2001: 154-166 - [c90]Frank Schmiedle, Daniel Große, Rolf Drechsler, Bernd Becker:
Too Much Knowledge Hurts: Acceleration of Genetic Programs for Learning Heuristics. Fuzzy Days 2001: 479-491 - [c89]Christoph Scholl, Marc Herbstritt, Bernd Becker:
Exploiting don't cares to minimize *BMDs. ISCAS (5) 2001: 191-194 - [c88]Ilia Polian, Bernd Becker:
Multiple Scan Chain Design for Two-Pattern Testing. LATW 2001: 156-161 - [c87]Andreas Hett, Bernd Becker:
Supervised Dynamic Recording in Model Checking. MBMV (1) 2001: 21-30 - [c86]Christoph Scholl, Bernd Becker:
Checking Equivalence for Partial Implementations. MBMV (1) 2001: 31-43 - [c85]Christoph Scholl, Marc Herbstritt, Bernd Becker:
Don't Care Minimization of BMDs: Complexity and Algorithms. MBMV (1) 2001: 45-57 - [c84]Ilia Polian, Wolfgang Günther, Bernd Becker:
Efficient Pattern-Based Verification of Connections to Intellectual Property Cores. MBMV (1) 2001: 111-120 - [c83]Ilia Polian, Bernd Becker:
Multiple Scan Chain Design for Two-Pattern Testing. VTS 2001: 88-93 - 2000
- [j25]Rolf Drechsler, Bernd Becker, Nicole Drechsler:
OKFDD minimization by genetic algorithms with application to circuit design. Integr. 28(2): 121-139 (2000) - [c82]Andreas Hett, Christoph Scholl, Bernd Becker:
Distance driven finite state machine traversal. DAC 2000: 39-42 - [c81]Christoph Scholl, Bernd Becker:
On the Generation of Multiplexer Circuits for Pass Transistor Logic. DATE 2000: 372-378 - [c80]Piet Engelke, Bernd Becker, Martin Keim:
A parameterizable fault simulator for bridging faults. ETW 2000: 63-68 - [c79]Wolfgang Günther, Nicole Drechsler, Rolf Drechsler, Bernd Becker:
Verification of Designs Containing Black Boxes. EUROMICRO 2000: 1100-1105 - [c78]Rolf Drechsler, Wolfgang Günther, Bernd Becker:
Testability of Circuits Derived from Lattice Diagrams. EUROMICRO 2000: 1188-1192 - [c77]Rolf Drechsler, Nicole Drechsler, Elke Mackensen, Tobias Schubert, Bernd Becker:
Design Reuse by Modularity: A Scalable Dynamical (Re)Configurable Multiprocessor System. EUROMICRO 2000: 1425- - [c76]Wolfgang Günther, Robby Schönfeld, Bernd Becker, Paul Molitor:
k-Layer Straightline Crossing Minimization by Speeding Up Sifting. GD 2000: 253-258 - [c75]Tobias Schubert, Elke Mackensen, Nicole Drechsler, Rolf Drechsler, Bernd Becker:
Specialized Hardware for Implementation of Evolutionary Algorithms. GECCO 2000: 369 - [c74]Per Lindgren, Rolf Drechsler, Bernd Becker:
Minimization of Ordered Pseudo Kronecker Decision Diagrams. ICCD 2000: 504-510 - [c73]Frank Schmiedle, Daniel Unruh, Bernd Becker:
Exact switchbox routing with search space reduction. ISPD 2000: 26-32 - [c72]Rolf Drechsler, Wolfgang Günther, Bernd Becker:
Testability of Circuits Derived from Lattice Diagrams. LATW 2000: 77-81 - [c71]Wolfgang Günther, Nicole Drechsler, Rolf Drechsler, Bernd Becker:
Verification of Designs Containing Black Boxes. MBMV 2000: 19-26 - [c70]Andreas Hett, Christoph Scholl, Bernd Becker:
State Traversal guided by Hamming Distance Profiles. MBMV 2000: 57-66
1990 – 1999
- 1999
- [j24]Rolf Drechsler, Harry Hengster, Horst Schäfer, Joachim Hartmann, Bernd Becker:
Testability of 2-Level AND/EXOR Circuits. J. Electron. Test. 14(3): 219-225 (1999) - [j23]Bernd Becker, Martin Keim, Rolf Krieger:
Hybrid Fault Simulation for Synchronous Sequential Circuits. J. Electron. Test. 15(3): 219-238 (1999) - [c69]Martin Keim, Nicole Drechsler, Bernd Becker:
Combining GAs and Symbolic Methods for High Quality Tests of Sequential Circuits. ASP-DAC 1999: 315-318 - [c68]Martin Keim, Ilia Polian, Harry Hengster, Bernd Becker:
A scalable BIST architecture for delay faults. ETW 1999: 98-103 - [c67]Harry Hengster, Bernd Becker:
Synthesis of Circuits Derived from Decision Diagrams - Combining Small Delay and Testability. FTCS 1999: 268-275 - [c66]Nicole Drechsler, Rolf Drechsler, Bernd Becker:
Multi-objected Optimization in Evolutionary Algorithms Using Satisfiability Classes. Fuzzy Days 1999: 108-117 - [c65]Per Lindgren, Rolf Drechsler, Bernd Becker:
Synthesis of Pseudo Kronecker Lattice Diagrams. ICCD 1999: 307-310 - [c64]Frank Schmiedle, Rolf Drechsler, Bernd Becker:
Exact channel routing using symbolic representation. ISCAS (6) 1999: 394-397 - [c63]Rolf Drechsler, Marc Herbstritt, Bernd Becker:
Grouping heuristics for word-level decision diagrams. ISCAS (1) 1999: 411-414 - [c62]Rolf Drechsler, Marc Herbstritt, Bernd Becker:
Grouping Heuristics for Word-Level Decision Diagrams. MBMV 1999: 41-50 - 1998
- [b3]Rolf Drechsler, Bernd Becker:
Graphenbasierte Funktionsdarstellung - Boolesche und Pseudo-Boolesche Funktionen. Leitfäden der Informatik, Teubner 1998, ISBN 978-3-519-02149-0, pp. 1-200 - [b2]Rolf Drechsler, Bernd Becker:
Binary Decision Diagrams - Theory and Implementation. Springer 1998, ISBN 978-0-7923-8193-8, pp. I-X, 1-200 - [j22]Bernd Becker:
Testing with decision diagrams. Integr. 26(1-2): 5-20 (1998) - [j21]Rolf Drechsler, Bernd Becker, Andrea Jahnke:
On Variable Ordering and Decomposition Type Choice in OKFDDs. IEEE Trans. Computers 47(12): 1398-1403 (1998) - [j20]Rolf Drechsler, Bernd Becker:
Ordered Kronecker functional decision diagrams-a data structure for representation and manipulation of Boolean functions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(10): 965-973 (1998) - [c61]Christoph Scholl, Bernd Becker, Thomas M. Weis:
Word-level decision diagrams, WLCDs and division. ICCAD 1998: 672-677 - [c60]Per Lindgren, Rolf Drechsler, Bernd Becker:
Look-up Table FPGA Synthesis from Minimized Multi-Valued Pseudo Kronecker Expressions. ISMVL 1998: 95-101 - [c59]Martin Keim, Nicole Drechsler, Rolf Drechsler, Bernd Becker:
Test Generation for (Sequential) Multi-Valued Logic Networks based on Genetic Algorithm. ISMVL 1998: 215-221 - 1997
- [j19]Rolf Drechsler, Bernd Becker, Stefan Ruppertz:
The K*BMD: A Verification Data Structure. IEEE Des. Test Comput. 14(2): 51-59 (1997) - [j18]Bernd Becker, Rolf Drechsler, Michael Theobald:
On the Expressive Power of OKFDDs. Formal Methods Syst. Des. 11(1): 5-21 (1997) - [j17]Rolf Drechsler, Bernd Becker:
Sympathy: fast exact minimization of fixed polarity Reed-Muller expressions for symmetric functions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(1): 1-5 (1997) - [c58]Bernd Becker, Rolf Drechsler, Reinhard Enders:
On the representational power of bit-level and word-level decision diagrams. ASP-DAC 1997: 461-467 - [c57]Nicole Göckel, Rolf Drechsler, Bernd Becker:
Learning heuristics for OKFDD minimization by evolutionary algorithms. ASP-DAC 1997: 469-472 - [c56]Andreas Hett, Rolf Drechsler, Bernd Becker:
Fast and efficient construction of BDDs by reordering based synthesis. ED&TC 1997: 168-175 - [c55]Rolf Drechsler, Harry Hengster, Horst Schäfer, Joachim Hartmann, Bernd Becker:
Testability of 2-level AND/EXOR circuits. ED&TC 1997: 548-553 - [c54]Christoph Scholl, Rolf Drechsler, Bernd Becker:
Functional simulation using binary decision diagrams. ICCAD 1997: 8-12 - [c53]Rolf Drechsler, Martin Keim, Bernd Becker:
Sympathy-MV: Fast Exact Minimization of Fixed Polarity Multi-Valued Linear Expressions. ISMVL 1997: 66-74 - [c52]Rolf Drechsler, Martin Keim, Bernd Becker:
Fault Simulation in Sequential Multi-Valued Logic Networks. ISMVL 1997: 145-152 - [c51]Rolf Drechsler, Bernd Becker, Stefan Ruppertz:
Manipulation Algorithms for K*BMDs. TACAS 1997: 4-18 - [c50]Bernd Becker, Rolf Drechsler:
Decision Diagrams in Synthesis - Algorithms, Applications and Extensions. VLSI Design 1997: 46-50 - [c49]Bernd Becker, Rolf Drechsler, Sudhakar M. Reddy:
(Quasi-) Linear Path Delay Fault Tests for Adders. VLSI Design 1997: 101-105 - [c48]Martin Keim, Michael Martin, Bernd Becker, Rolf Drechsler, Paul Molitor:
Polynomial Formal Verification of Multipliers. VTS 1997: 150-157 - [c47]Can Ökmen, Martin Keim, Rolf Krieger, Bernd Becker:
On Optimizing BIST-Architecture by Using OBDD-based Approaches and Genetic Algorithms. VTS 1997: 426-433 - 1996
- [j16]Rolf Drechsler, Michael Theobald, Bernd Becker:
Fast OFFD-Based Minimization of Fixed Polarity Reed-Muller Expressions. IEEE Trans. Computers 45(11): 1294-1299 (1996) - [c46]Harry Hengster, Rolf Drechsler, Bernd Becker, Stefan Eckrich, Tonja Pfeiffer:
AND/EXOR based Synthesis of Testable KFDD-Circuits with Small Depth. Asian Test Symposium 1996: 148- - [c45]Rolf Drechsler, Bernd Becker, Stefan Ruppertz:
K*BMDs: A New Data Structure for Verification. ED&TC 1996: 2-8 - [c44]Bernd Becker, Rolf Drechsler, Rolf Krieger, Sudhakar M. Reddy:
A Fast Optimal Robust Path Delay Fault Testable Adder. ED&TC 1996: 491-499 - [c43]Andreas Hett, Bernd Becker, Rolf Drechsler:
MORE: an alternative implementation of BDD packages by multi-operand synthesis. EURO-DAC 1996: 164-169 - [c42]Harry Hengster, Uwe Sparmann, Bernd Becker, Sudhakar M. Reddy:
Local Transformations and Robust Dependent Path Delay. ITC 1996: 347-356 - [c41]Rolf Drechsler, Nicole Göckel, Bernd Becker:
Learning Heuristics for OBDD Minimization by Evolutionary Algorithms. PPSN 1996: 730-739 - [c40]Martin Keim, Bernd Becker, Birgitta Stenner:
On the (non-)resetability of synchronous sequential circuits. VTS 1996: 240-245 - 1995
- [j15]Harry Hengster, Rolf Drechsler, Bernd Becker:
On local transformations and path delay fault testability. J. Electron. Test. 7(3): 173-191 (1995) - [j14]Bernd Becker, Rolf Drechsler, Ralph Werchner:
On the Relation between BDDs and FDDs. Inf. Comput. 123(2): 185-197 (1995) - [j13]Rolf Drechsler, Bernd Becker, Nicole Göckel, Andrea Jahnke:
A Genetic Algorithm for Decomposition Type Choice in OKFDDs. Int. J. Artif. Intell. Tools 4(4): 525- (1995) - [j12]Bernd Becker, Ralf Hahn, Joachim Hartmann, Uwe Sparmann:
On the testability of iterative logic arrays. Integr. 18(2-3): 201-218 (1995) - [j11]Bernd Becker, Rolf Drechsler, Paul Molitor:
On the generation of area-time optimal testable adders. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(9): 1049-1066 (1995) - [c39]Rolf Drechsler, Bernd Becker:
Learning heuristics by genetic algorithms. ASP-DAC 1995 - [c38]Rolf Krieger, Bernd Becker, Martin Keim:
Symbolic Fault Simulation for Sequential Circuits and the Multiple Observation Time Test Strategy. DAC 1995: 339-344 - [c37]Rolf Drechsler, Bernd Becker:
Sympathy: fast exact minimization of fixed polarity Reed-Muller expressions for symmetric functions. ED&TC 1995: 91-99 - [c36]Bernd Becker, Rolf Drechsler:
How many decomposition types do we need? [decision diagrams]. ED&TC 1995: 438-443 - [c35]Bernd Becker, Rolf Drechsler:
Synthesis for testability: circuits derived from ordered Kronecker functional decision diagrams. ED&TC 1995: 592 - [c34]Rolf Krieger, Bernd Becker, Can Ökmen:
OBDD-based Optimization of Input Probabilities for Weighted Random Pattern Generation. FTCS 1995: 120-129 - [c33]Bernd Becker, Rolf Drechsler, Michael Theobald:
OKFDDs versus OBDDs and OFDDs. ICALP 1995: 475-486 - [c32]Rolf Drechsler, Bernd Becker, Nicole Göckel:
A Genetic Algorithm for Minimization of Fixed Polarity Reed-Muller Expressions. ICANNGA 1995: 393-395 - [c31]Rolf Drechsler, Bernd Becker:
Dynamic minimization of OKFDDs. ICCD 1995: 602-607 - [c30]Rolf Drechsler, Rolf Krieger, Bernd Becker:
Random Pattern Fault Simulation in Multi-Valued Circuits. ISMVL 1995: 98-103 - [c29]Bernd Becker, Rolf Drechsler, Ralph Werchner:
On the Relation Betwen BDDs and FDDs. LATIN 1995: 72-83 - [c28]Harry Hengster, Rolf Drechsler, Bernd Becker:
On the application of local circuit transformations with special emphasis on path delay fault testability. VTS 1995: 387-392 - 1994
- [c27]Rolf Drechsler, Andisheh Sarabi, Michael Theobald, Bernd Becker, Marek A. Perkowski:
Efficient Representation and Manipulation of Switching Functions Based on Ordered Kronecker Functional Decision Diagrams. DAC 1994: 415-419 - [c26]Rolf Drechsler, Bernd Becker, Michael Theobald:
Fast OFDD based minimization of fixed polarity Reed-Muller expressions. EURO-DAC 1994: 2-7 - [c25]Ralf Hahn, Rolf Krieger, Bernd Becker:
A Hierarchical Approach to Fault Collapsing. EDAC-ETC-EUROASIC 1994: 171-176 - [c24]Bernd Becker, Rolf Drechsler:
Testability of Circuits Derived from Functional Decision Diagrams. EDAC-ETC-EUROASIC 1994: 667 - [c23]Bernd Becker, Rolf Drechsler:
OFDD Based Minimization of Fixed Polarity Reed-Muller Expressions Using Hybrid Genetic Algorithms. ICCD 1994: 106-110 - [c22]Bernd Becker, Rolf Drechsler:
Efficient Graph Based Representation of Multi-Valued Functions with an Application to Genetic Algorithms. ISMVL 1994: 65-72 - [c21]Rolf Krieger, Bernd Becker, Martin Keim:
A Hybrid Fault Simulator for Synchronous Sequential Circuits. ITC 1994: 614-623 - [c20]Harry Hengster, Rolf Drechsler, Bernd Becker:
Testability Properties of Local Circuit Transformations with Respect to the Robust Path-Delay-Fault Model. VLSI Design 1994: 123-126 - 1993
- [c19]Bernd Becker, Rolf Drechsler, Paul Molitor:
On the implementation of an efficient performance driven generator for conditional-sum-adders. EURO-DAC 1993: 402-407 - [c18]Rolf Krieger, Bernd Becker, R. Sinkovic:
A BDD - based Algorithm for Computation of Exact Fault Detection Probabilities. FTCS 1993: 186-195 - [c17]Bernd Becker, Rolf Krieger:
FAST-SC: Fast Fault Simulation in Synchronous Sequential Circuits. VLSI Design 1993: 128-131 - 1992
- [c16]Bernd Becker, Paul Molitor:
A performance driven generator for efficient testable conditional-sum-adders. EURO-DAC 1992: 370-375 - [c15]Bernd Becker, Rolf Drechsler:
A time optimal robust path-delay-fault self-testable adder. EURO-DAC 1992: 376-381 - [c14]Bernd Becker, Ralf Hahn, Rolf Krieger:
Fast fault simulation in combinational circuits: an efficient data structure, dynamic dominators and refined check-up. EURO-DAC 1992: 436-441 - [c13]Bernd Becker, Joachim Hartmann:
Some Remarks on the Test Complexity of Iterative Logic Arrays. MFCS 1992: 142-152 - [c12]Bernd Becker:
Synthesis for Testability: Binary Decision Diagrams. STACS 1992: 501-512 - [p1]Bernd Becker:
Synthesis for Testability: Binary Decision Diagrams. Informatik 1992: 21-39 - 1991
- [j10]Bernd Becker, Uwe Sparmann:
A uniform test approach for RCC-adders. Fundam. Informaticae 14(2): 185-219 (1991) - [j9]Bernd Becker, Uwe Sparmann:
Computations over Finite Monoids and their Test Complexity. Theor. Comput. Sci. 84(2): 225-250 (1991) - [c11]Bernd Becker, Ralf Hahn, Rolf Krieger, Uwe Sparmann:
Structure based methods for parallel pattern fault simulation in combinational circuits. EURO-DAC 1991: 497-502 - 1990
- [j8]Bernd Becker, Joachim Hartmann:
Optimal-Time Multipliers and C-Testability. J. Inf. Process. Cybern. 26(10): 547-561 (1990) - [c10]Bernd Becker, Thomas Burch, Günter Hotz, D. Kiel, Reiner Kolla, Paul Molitor, Hans-Georg Osthof, Gisela Pitsch, Uwe Sparmann:
A graphical system for hierarchical specifications and checkups of VLSI circuits. EURO-DAC 1990: 174-179 - [c9]Bernd Becker, Joachim Hartmann:
Optimal-Time Multipliers and C-Testability. SPAA 1990: 146-154
1980 – 1989
- 1989
- [c8]Bernd Becker, Uwe Sparmann:
Computations over finite monoids and their test complexity. FTCS 1989: 299-306 - 1988
- [j7]Bernd Becker, Hans Ulrich Simon:
How Robust Is The n-Cube? Inf. Comput. 77(2): 162-178 (1988) - [j6]Bernd Becker:
Efficient Testing of Optimal Time Adders. IEEE Trans. Computers 37(9): 1113-1121 (1988) - [c7]Bernd Becker, Uwe Sparmann:
Regular Structures and Testing: RCC-Adders. AWOC 1988: 288-300 - [c6]Bernd Becker, Reiner Kolla:
On the Construction of Optimal Time Adders (Extended Abstract). STACS 1988: 18-28 - 1987
- [j5]Bernd Becker:
An Easily Testable Optimal-Time VLSI-Multiplier. Acta Informatica 24(4): 363-380 (1987) - [j4]Bernd Becker, Hans-Georg Osthof:
Layouts with Wires of Balanced Length. Inf. Comput. 73(1): 45-59 (1987) - [j3]Bernd Becker, Günter Hotz:
On the Optimal Layout of Planar Graphs with Fixed Boundary. SIAM J. Comput. 16(5): 946-972 (1987) - [c5]Bernd Becker, Günter Hotz, Reiner Kolla, Paul Molitor, Hans-Georg Osthof:
Hierarchical Design Based on a Calculus of Nets. DAC 1987: 649-653 - 1986
- [j2]Günter Hotz, Bernd Becker, Reiner Kolla, Paul Molitor:
Ein logisch-topologischer Kalkül zur Konstruktion integrierter Schaltkreise, Teil I. Inform. Forsch. Entwickl. 1(1): 38-47 (1986) - [j1]Günter Hotz, Bernd Becker, Reiner Kolla, Paul Molitor:
Ein logisch-topologischer Kalkül zur Konstruktion integrierter Schaltkreise, Teil II. Inform. Forsch. Entwickl. 1(2): 72-82 (1986) - [c4]Bernd Becker, Hans Ulrich Simon:
How Robust Is the n-Cube? (Extended Abstract). FOCS 1986: 283-291 - [c3]Bernd Becker:
Efficient Testing of Optimal Time Adders (Extended Abstract). MFCS 1986: 218-229 - 1985
- [c2]Bernd Becker, Hans-Georg Osthof:
Layouts with Wires of Balanced Length. STACS 1985: 21-31 - 1983
- [c1]Bernd Becker:
On the crossing-free, rectangular embedding of weighted graphs in the plane. Theoretical Computer Science 1983: 61-72 - 1982
- [b1]Bernd Becker:
Über die kreuzungsfreie, rechtwinklige Einbettung von gewichteten Graphen in die Ebene. Saarland University, Saarbrücken, Germany, 1982, pp. 1-116
Coauthor Index
aka: Alejandro Czutro
aka: Nicole Göckel
aka: Matthew D. T. Lewis
aka: Philipp M. Scholl
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