Introduction 4x16 Decoder
Introduction 4x16 Decoder
Introduction 4x16 Decoder
In a 4x16 decoder using 3x8 decoders the inputs A, B, C are used to select which output on either decoder will be at logic 1 (HIGH) and input D is used with the enable input to select which encoder either the first or second will output the 1. However, there is a limit to the number of inputs that can be used for one particular decoder, because as n increases, the number of AND gates required to produce an output also becomes larger resulting in the fan-out of the gates used to drive them becoming large. This type of active-HIGH decoder can be implemented using just Inverters, ( NOT Gates ) and AND gates. It is convenient to use an AND gate as the basic decoding element for the output because it produces a HIGH or logic 1 output only when all of its inputs are logic 1. But some binary decoders are constructed using NAND gates instead of AND gates for their decoded output, since NAND gates are cheaper to produce than ANDs as they require fewer transistors to implement within their design. The use of NAND gates as the decoding element, results in an active-LOW output while the rest will be HIGH. As a NAND gate produces the AND operation with an inverted output, the NAND decoder looks like this with its inverted truth table
CONCLUSION; In this experiment we learn that by using IC-74LS138 we can perform the 3X8 Decoder and by using 2 3X8 Decoder and also the NOT Gate we can perform 4X16 Decoder. We can also check the truth table.