Chap4 1 Op Amps2
Chap4 1 Op Amps2
Chap4 1 Op Amps2
Review:
Ideal Op-amp in an open loop configuration
Ip
Vp
+
Vi
_
Vn
Ro
+
Ri
Vo
AVi
_
In
These rules are related to the requirement/assumption for large open-loop gain
A , and they form the basis for op-amp circuit analysis.
The voltage Vn tracks the voltage Vp and the control of Vn is accomplished via the
feedback network.
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Vin1
Vin2
Vin3
R1
I1
R2
I2
R3
I3
IF
RF
N1
Vout
(1.1)
By relating the currents I1, I2 and I3 to their corresponding voltage and resistance by
Ohms law and noting that the voltage at node N1 is zero (ideal op-amp rule) Equation
(1.1) becomes
Vin1 Vin 2 Vin 3
V
+
+
= out
R1 R 2 R3
RF
(1.2)
The term operational amplifier was first used by John Ragazzini et. al in a paper published in 1947. The
relevant historical quotation from the paper is:
As an amplifier so connected can perform the mathematical operations of arithmetic and calculus on the
voltages applied to its inputs, it is hereafter termed an operational amplifier.
John Ragazzini, Robert Randall and Frederick Russell, Analysis of Problems in Dynamics by Electronics
Circuits, Proceedings of IRE, Vol. 35, May 1947
Page 2
And so Vout is
RF
RF
RF
Vout =
Vin1 +
Vin 2 +
Vin 3
R2
R2
R1
(1.3)
The output voltage Vout is a sum of the input voltages with weighting factors given by the
values of the resistors. If the input resistors are equal R1=R2=R3=R, Equation (1.3)
becomes
Vout =
RF
(Vin1 + Vin 2 + Vin3 )
R
(1.4)
The output voltage is thus the sum of the input voltages with a multiplication constant
RF
given by
. The value of the multiplication constant may be varied over a wide range
R
and for the special case when RF = R the output voltage is the sum of the inputs
(1.5)
The input resistance seen by each source connected to the summing amplifier is the
corresponding series resistance connected to the source. Therefore, the sources do not
interact with each other.
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Difference Amplifier
This fundamental op amp circuit, shown on Figure 2, amplifies the difference between
the input signals. The subtracting feature is evident from the circuit configuration which
shows that one input signal is applied to the inverting terminal and the other to the noninverting terminal.
Vin1
Vin2
R1
IF
I1
R2
N1
R3
Vout
I2
R4
Before we proceed with the analysis of the difference amplifier lets think about the
overall behavior of the circuit. Our goal is to obtain the difference of the two input
signals (Vin 2 - Vin1 ) . Our system is linear and so we may apply superposition in order to
find the resulting output. We are almost there once we notice that the contribution of the
signal Vin2 to the output is
R4 R2
Vout 2 = Vin 2
1 +
R1
R3 + R 4
(1.6)
R1
(1.7)
R2
R4 R2
Vout = Vout 2 - Vout1 = Vin 2
1 +
- Vin1
R1
R1
R3 + R 4
(1.8)
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Note that in order to have a subtracting circuit which gives Vout=0 for equal inputs, the
weight of each signal must be the same. Therefore
R4 R2 R2
1 +
=
R1 R1
R3 + R 4
(1.9)
R4 R2
=
R3 R1
(1.10)
R2
(Vin 2 - Vin1 )
R1
(1.11)
which is a difference amplifier with a differential gain of R2/R1 and with zero gain for
the common mode signal. It is often practical to select resistors such as R4=R2 and
R3=R1.
The fundamental problem of this circuit is that the input resistance seen by the two
sources is not balanced. The input resistance between the input terminals A and B, the
V
differential input resistance, Rid (see Figure 3) is Rid in
I
A
+
V in
B
R1 V -
R3 V +
R2
Vout
R4
Since V+ = V- , Vin = R1 I + R3 I and thus Rid = 2 R1 . The desire to have large input
resistance for the differential amplifier is the main drawback for this circuit. This problem
is addressed by the instrumentation amplifier discussed next.
Instrumentation Amplifier
Figure 4 shows our modified differential amplifier called the instrumentation amplifier
(IA). Op amps U1 and U2 act as voltage followers for the signals Vin1 and Vin2 which see
the infinite input resistance of op amps U1 and U2. Assuming ideal op amps, the voltage
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at the inverting terminals of op amps U1 and U2 are equal to their corresponding input
voltages. The resulting current flowing through resistor R1 is
V V
(1.12)
I1 = in1 in 2
R1
Since no current flows into the terminals of the op amp, the current flowing through
resistor R2 is also given by Equation (1.12).
Vin1
V01
U1
V1
R4
R2
R3
R1
U3
R3
Vout
R2
R4
V2
U2
V02
Vin2
Since our system is linear the voltage at the output of op-amp U1 and op-amp U2 is
given by superposition as
R2
R2
V01 = 1 +
Vin2
Vin1
R1
R1
(1.13)
R2
R2
V02 = 1 +
Vin1
Vin2
R1
R1
(1.14)
Vout =
R4 2R2
1 +
( Vin2 Vin1 )
R3
R1
(1.15)
R4
2R2
, may be varied by changing only one resistor: R1.
1 +
R3
R1
Page 6
Iin represents the current generated by a certain transducer. If we assume that the op amp
is ideal, KCL at node N1 gives
V 0
I1 + out
= 0 Vout = RI1
R
(1.16)
The gain of this amplifier is given by R. This gain is also called the sensitivity of the
converter. Note that if high sensitivity is required for example 1V/V then the resistance
R should be 1 M. For higher sensitivities unrealistically large resistances are required.
A current to voltage converter with high sensitivity may be constructed by employing the
T feedback network topology shown on Figure 6.
In this case the relationship between Vout and I1 is
R2 R2
Vout = 1 +
+
I1
R1 R
(1.17)
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N1
R1
R2
Vout
I in
Page 8
(1.18)
Vcc
RL
V in
R
Page 9
Vout
Vin
Figure 8. Inverting amplifier with general impedance blocks in the feedback path.
For an ideal op-amp, the transfer function relating Vout to Vin is given by
Z ( )
Vout
= 2
Vin
Z1 ( )
(1.19)
Now, the gain of the amplifier is a function of signal frequency () and so the analysis is
to be performed in the frequency domain. This frequency dependent feedback results in
some very powerful and useful building blocks.
Page 10
V out
IR
R
I R = IC
(1.20)
Vin
dV
= C out
R
dt
Rearranging Equation (1.20) and integrating from 0 to t, we obtain
dVout =
Vin ( )
d
RC
Vout (t ) =
1
Vin ( ) d + Vout (0)
RC 0
(1.21)
The output voltage is thus the integral of the input. The voltage Vout (0) is the constant of
integration and corresponds to the capacitor voltage at time t = 0.
The frequency domain analysis is obtained by expressing the impedance of the feedback
components in the complex plane. The transfer function may thus be written as
1
Vout
Z
j
jC
= C =
=
RC
Vin
ZR
R
(1.22)
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The above expression indicates that there is a 90o phase difference between the input and
the output signals. This 90o phase shift occurs at all frequencies. The gain of the amplifier
V
1
given by the modulus out =
is also a function of frequency. For dc signals with
RC
Vin
=0 the gain is infinite and it falls at a rate of 20dB per decade of frequency change. The
infinite gain for dc signals represents a practical problem for the circuit configuration of
Figure 27. Since the equivalent circuit of a capacitor for =0 is an open circuit, the
feedback path is open. This lack of feedback results in a drift (cumulative summing) of
the output voltage due to the presence of small dc offset voltages at the input. This
problem may be overcome by connecting a resistor, RF, in parallel with the feedback
capacitor C as shown on Figure 10.
C
IC
RF
R
V in
V out
IR
R
Figure 10. Active Low Pass filter
The feedback path consists of the capacitor C in parallel with the resistor RF. The
equivalent impedance of the feedback path is
RF
R
RF
jC
=
ZF = F C =
1
RF + C R +
1 + j RF C
F
jC
(1.23)
Z ( )
Vout
becomes
= F
Vin
Z1 ( )
Z ( )
Vout
R
R
1
1
= F
= F
= F
Vin
Z1 ( )
R1 1 + j RF C
R1 1 + j
(1.24)
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Where
1
RF C
(1.25)
Vout
versus frequency. At frequencies much less
Vin
R
than H ( << H) the voltage gain becomes equal to F , while at frequencies higher
R
than H ( >> H) the gain decreases at a rate of 20dB per decade.
Figure 11 shows the logarithmic plot of
Figure 11. Bode plot of active low pass filter with a gain of 5.
So we have seen that the integration is achieved by charging the feedback capacitor.
For an integrator to be useful it must be allowed to be reset to zero. Since the output is
stored in the charge of the feedback capacitor, all we need to do is to short out the
capacitor in order to reset the integrator.
Integrators are very sensitive to DC drift, small offsets lead to a steady accumulation of
charge in the capacitor until the op amp output saturates. We can avoid this by providing
another feedback path for DC. The circuit incorporates a shorting path across the
capacitor as shown on Figure 12.
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C
IC
RF
R
V in
V out
IR
R
Page 14
C
V out
V in
R
dVin
, is equal to the
dt
Vout
, and thus
R
Vout = RC
dVin
dt
(1.26)
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RF
IF
R1
V in
V out
IR
R
We can understand how this circuit works without any detailed calculations. All we need
to do is look at the feedback loops. There are two paths in the feedback loop: a frequency
independent path with resistance RF, and a frequency dependent path with impedance
given by
1
Z = j L
C
(1.27)
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RF
IF
R1
V in
V out
IR
R
Figure 15
Similarly at high frequencies ( ) the inductor acts as an open circuit and the
equivalent circuit is the same as the one shown on Figure 15.
Therefore the voltage transfer characteristics at DC and at high frequency are the same
with a gain given by
G=
Vout
R
= F
Vin
R1
(1.28)
The other frequency of interest if the resonance frequency, which occurs when Z as
given by Equation (1.27) is equal to zero. The resonance frequency is
1
LC
and the circuit reduces to the one shown on Figure 16.
o =
(1.29)
IF
R1
V in
V out
IR
R
Figure 16
Page 17
So this is a filter that passes and amplifies every frequency except the resonance
frequency.
For the full analysis of this active filter we may write down the complete expression for
the impedance of the feedback loop which is
1
j L
R
j ( 2 LC 1) RF
C F
=
Z F = Z // RF =
1 RF C + j ( 2 LC 1)
RF + j L
C
(1.30)
j ( 2 LC 1) RF
Vout
ZF
=
=
Vin
R1 R1 RF C + j ( 2 LC 1)
(1.31)
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(1.32)
If we use this signal as the input to an inverting amplifier we may linearize the signal by
using a diode in the feedback path of the amplifier.
Recall the i-v relationship for a diode
I = Io eqV / kT 1
IoeqV / kT
(1.33)
I
R1
IR
Vi
Vn
Vo
Vp
R
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Vi Vn
= Ioe q (Vn Vo ) / kT
R1
(1.34)
Vi
= Ioe q ( Vo ) / kT
R1
(1.35)
Vo =
kT
Vi
ln
q
Io R1
Vo =
kT
kT
ln(Vi) +
ln( IoR1)
q
q
N
(1.36)
Vo = a ln(Vi) + b
Vi
Vn
Vo
Vp
R
(1.37)
Page 20
Vout
D
Vin
+ Vd R11
Vout
Vd
Vin
(b)
(a)
Figure 19. Diode rectifier circuit (a) and voltage transfer curve (b)
The offset voltage Vd is about 0.7 Volts and this offset value is unacceptable in many
practical applications. The operational amplifier and the diode in the circuit of Figure 20
form an ideal diode, a superdiode, and thus they eliminate the offset voltage Vd from the
voltage transfer curve forming an ideal half wave rectifier.
Superdiode
Vout
V-
I1
V1
V+
Vin
Id + Vd -
I2
Vout
Vin
Figure 20. Precision half wave rectifier circuit and its voltage transfer curve.
Lets analyze the circuit by considering the two cases of interest: Vin>0 and Vin<0.
For Vin<0 the current I2 and id will be less than zero (point in a opposite direction to the
one indicated). However, negative current can not go through the diode and thus the
diode is reverse biased and the feedback loop is broken. Therefore the current I2 is zero
and so the output voltage is also zero, Vout=0. Since the feedback loop is open the
voltage V1 at the output of the op-amp will saturate at the negative supply voltage.
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For Vin>0, Vout=Vin and the current I2=Id and the diode is forward biased. The
feedback loop is closed through the diode. Note that there is still a voltage drop Vd across
the diode and so the op-amp output voltage V1 is adjusted so that V1=Vd+Vin.
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Problems
P1. Resistors R1 and R2 of the circuit on Figure P1 represent two strain gages placed
across each other on a beam in order to measure the tensile and compressive stains. R1
and R2 vary symmetrically by a factor as R1=R(1-) and R2=R(1+).
Vb
R1
+
Vs
R2
Figure P1.
Design an amplifier so that the output varies from -10V to +10V as the parameter varies
from -0.01 to +0.01. The bias voltage Vb=+10V and R=10k.
P2. The resistors of the amplifier circuit of Figure P2 have a tolerance of %.
1. Assume that Vin is known precisely and calculate the deviation in the output
voltage Vout.
2. For R1=15k5% and R2=200k5% and Vin=100mV1% calculate the output
voltage.
R2
R1
V out
V in
Figure P2.
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P3. Calculate the output voltage Vout for the following circuits.
V in
V out
R
3R
2R
R2
V in
R2
V out
2R
3R
P4 For the circuit on Figure P4 determine the value of resistor Rx so that the output
voltage is zero.
Rx
R2
V out
V in
R3
R4
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V out
V in
R4
R3
Load
Figure P5
P6. For the circuit on Figure P6 calculate the currents i1, i2, i3, i4 and the voltages v1 and
Vout. Refer your answers to the indicated current directions.
R2
R1
R4
i2
R3
i1
V in
v1
i3
i4
V out
Figure P6
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P7
For the voltage to current converter, briefly (in 1-2 sentences) describe what happens
when each of the following faults happen (alone, independently of other faults).
a. the Zener diode is shorted
b. R5 has a bad soldering joint and is opened
c. The load becomes shorted
d. The connection between the op-amp output and the base of the transistors
becomes opened
a. What is the effect of a 1uA input bias current on the output voltage of the opamp?
b. What is the effect of a 5mV input offset voltage on the output of the opamp?
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