~ E & ECE Department, liT, Kharagpur

. . Mid-semester Examination
EC31 006 Microcontroller and Embedded Systems # of students 113
Full marks 40 Time 2 hours
S.No. Figures in the right hand margin indicate marks

Ql:(a) What is the function of the watchdog tinier in 8051? (2x4) -

Q2. (a)
Explain how you calculate the checksum of a set of numbers? Hence, write a
program using 8051 ALP to calculate the checksum of 100 bytes of data stored in
RAM locations starting from 40H. Store the result in register R5 of bank 2.
(b)
Write an 8051 C program to display your first and last names through P2 on a
continuous basis. Use the ROM code space.
Q3. {a)
One ofthe major applications of a microcontroller is to generate specific time
delays. List at least two techniques for generating time delays using 8051. Given \
that the Operating frequency lS zmHz, write a delay routine for generating a time 0
delay of approximately 5ms. Compute the exact delay generated by your routine. 0

(b) Given the following delay routine, find ou~J~of)~Jo generate <dimedeiay '
0
_ ~ """of.1630.'75Sps:-Assurne a:systen1 clockof 11.0592MHz. l
__._ .... -~-- DELAY: MOV R3,# N 0
a
HERE: NOP 0
NOP 0~'1..1\.,~b)i'l ()
NOP (>rGtp,ff G I
NOP \
DJNZ R3, HERE
l
RET
o
Q4. (a) ~
Given that you are using the following circuitry to generate the chip select signal
and AO -A 11 of 8051 are connected to the corresponding memory address lines,
determine the memory address space.

(PTO)
 (Q4 Contd.)

Q4. (b)' 74LS138 is one of the most widely used address decoders having 3 et:1able lines,
G I, G2A and G2B, and three select lines A, B and e, depending on which onk
. of eight output lines YO to Y7 becomes low, thereby selecting the memory -chip to
which it is connected. j
You are given that a 4Kx8 memory chip is interfaced with 805I through a
74LS138 decoder forwhich GT IS connected to VCC-:tl2B is coimected to GND,
G2A is connected to A I5, and C, B, and A-are respectively connected to A 14, .. \(l
~/~
A13 and A12. Address lines AO-All of the .805I are connected to the '}. ,'0
/-')-
. corresponding memory address l,ines, OE of the memory chip i~ connected to
~
MEMR and VPP is connected to vee. l
(Draw the interfacing circuitry and find thj address range for the outputs Y2, Y4
and Y7. l . .
QS. (a) The 8255 P~I has got 3 different operati~b modes: 0, 1 and 2 and three ports A, B (2x4)
ande. I
Given that the control word to be written to 8255 is 9lH, state which mode each
of the ports is programmed in and whether it is programmed as an input or as an
output port.
(b) The control signals associated with port A of 8255 programmed as an input port
operating in mode I are STB A, IBFA and INTR A. State the functionality of
these control signals.
(c) Given the following interfacing circuitry, give possible addresses of port A, port
B, port e, and the control word register given that all the unused bits are zeros.
iffi

-- P3.7

,. P3.6
Wit
J I I
P2.7
~

AIS~
- 'A!4- "" -/.
A13 ~CS
' - _v:R_ RD I
A12 ,
PAp

P2.0
G PB I=>
AlE 8255
I=>
~
NJ7 PC
AI
P0.7 Al
74LS373 AO
AIJ

PO.O oc 07 DO RES
ADO
~
~
\
07 I
- 00

(d) What is the Bit Set/Reset mode of operation of 8255 and how can you use this?

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