ARM7 LPC 2148:

INTRODUCTION:

The ARM architecture describes a family of RISC-based computer processors designed and
licensed by British company ARM Holdings. It was first developed in the 1980s and globally
as of 2013 is the most widely used 32-bit instruction set architecture in terms of quantity
produced. In 2011 alone, producers of chips based on ARM architectures reported shipments
of 7.9 billion ARM-based processors, representing 95% of smart phones, 90% of hard disk
drives, 40% of digital televisions and set-top boxes, 15% of microcontrollers and 20%
of mobile computers.

Using a RISC based approach to computer design, ARM processors require significantly
fewer transistors than processors that would typically be found in a traditional computer. The
benefits of this approach are lower costs, less heat, and less power usage, traits that are
desirable for use in light, portable, battery-powered devices such as smart phones and tablet
computers. The reduced complexity and simpler design allows companies to build a low-
energy system on a chip for an embedded system incorporating memory, interfaces, radios,
etc. The earliest example was the Apple Newton tablet but this same approach is still used in
the Apple A4 and A5 chips in the iPad.

ARM periodically releases updates to its core – currently ARMv7 and ARMv8 – which chip
manufacturers can then license and use for their own devices. Variants are available for each
of these to include or exclude optional capabilities. Current versions use 32-bit instructions
with 32-bit addressed 1 byte wide memory which is effectively reduced to just over 24 bit
addressing due to 4 byte alignment, with some addressing reserved in byte wise allocation for
Memory Mapped I/O, but accommodates 16-bit instructions for economy and can also
handle Java byte codes which use 32-bit addresses. More recently, ARM architecture has
included 64-bit versions – in 2012, Microsoft produced its new Surface tablet with ARM
technology and AMDannounced that it would start producing server chips based on the 64-bit
ARM core in
Architecture

From 1995, the ARM Architecture Reference Manual has been the primary source of
documentation on the ARM processor architecture and instruction set, distinguishing
interfaces that all ARM processors are required to support (such as instruction semantics)
from implementation details that may vary. The architecture has evolved over time, and
starting with the Cortex series of cores, three "profiles" are defined:

 "Application" profile: Cortex-A series

 "Real-time" profile: Cortex-R series

 "Microcontroller" profile: Cortex-M series.

Profiles are allowed to subset the architecture. For example, the ARMv6-M profile (used by
the Cortex M0 / M0+ / M1) is a subset of the ARMv7-M profile which supports fewer
instructions.

The ARM architecture has evolved to a point where it supports implementations across a
wide spectrum of performance points. Over two billion parts have shipped, establishing it as
the dominant architecture across many market segments. The architectural simplicity of ARM
processors has traditionally led to very small implementations, and small implementations
allow devices with very low power consumption. Implementation size, performance, and very
low power consumption remain key attributes in the development of the ARM architecture.

The ARM is a Reduced Instruction Set Computer (RISC), as it incorporates these typical
RISC architecture

features:

• a large uniform register file

• a load/store architecture, where data-processing operations only operate on register

contents, not directly on memory contents

• simple addressing modes, with all load/store addresses being determined from register
contents and instruction fields only

• uniform and fixed-length instruction fields, to simplify instruction decode.

In addition, the ARM architecture provides:

• control over both the Arithmetic Logic Unit (ALU) and shifter in most data-processing
instructions

to maximize the use of an ALU and a shifter

• auto-increment and auto-decrement addressing modes to optimize program loops

• Load and Store Multiple instructions to maximize data throughput

• conditional execution of almost all instructions to maximize execution throughput.

These enhancements to a basic RISC architecture allow ARM processors to achieve a good
balance of high

performance, small code size, low power consumption, and small silicon area.
INTRODUCTION TO 2148 ARTIST BOARD

ARM7 LPC2148 is a 16/32 bit ARM7TDMI-S Core Microcontroller from Philips (NXP).
LPC2148 includes built in peripherals such as USB, ADC, DAC, Timer/Counter, PWM,
Capture, RTC, I2C, SPI,

UART etc.

The LPC2148 ARTIST Board has an important peripheral interface assembled for
evaluation and

testing.

The functional details of the board are as follows:

 16/32 Bit ARM7TDMI-S MCU No.LPC2148 from Philips (NXP)

 Has RS232 Communication Circuit for 2 Channels (UART0 and UART1).

 USB device Option.

 Onboard 20 pin JTAG connector for debugging/programming applications.

 Onboard Reset and ISP Switches (Can be programmed via MANUAL & AUTO mode) .

 Has EEPROM interface using I2C.

 32.768 KHz Clock for RTC. Option for a CMOS Battery.

 On Board Buzzer and Relay.

 Onboard 7 Segment displays via I2C.

 Analog input via AD0.1

 I/O pin out for different interfaces.

 Onboard 16*2 LCD.

 On Board Graphical LCD

 On Board 4x4 matrix keypad

 On Board Temperature Sensor connected to AD0.2.

 On Board Power Supply Circuit for +5V and +3.3V (USB or external power Source input
options)

 On Board 12 MHz Oscillator.

 LED for Power Supply, USB. Power Supply – DC input 7.5 - 9V/ 500mA - 1A.

FUNCTIONAL BLOCK DIAGRAM OF LPC2148 ARTIST BOARD

ARM cores
List of ARM microprocessor cores

Architecture Family

ARMv1 ARM1

ARMv2 ARM2, ARM3

ARMv3 ARM6, ARM7

ARMv4 Strong ARM, ARM7TDMI, ARM9TDMI

ARMv5 ARM7EJ, ARM9E, ARM10E, XScale

ARMv6 ARM11

ARMv6-M ARM Cortex-M0, ARM Cortex-M0+, ARM Cortex-M1

ARM Cortex-A5, ARM Cortex-A7, ARM Cortex-A8, ARM Cortex-A9, ARM

ARMv7 Cortex-A15,
ARM Cortex-R4, ARM Cortex-R5, ARM Cortex-R7

ARMv7-M ARM Cortex-M3, ARM Cortex-M4

ARMv8-A ARM Cortex-A53, ARM Cortex-A57

Architecture:

From 1995, the ARM Architecture Reference Manual has been the primary source of
documentation on the ARM processor architecture and instruction set, distinguishing
interfaces that all ARM processors are required to support (such as instruction semantics)
from implementation details that may vary. The architecture has evolved over time, and
starting with the Cortex series of cores, three "profiles" are defined:

 "Application" profile: Cortex-A series

 "Real-time" profile: Cortex-R series

 "Microcontroller" profile: Cortex-M series.

Profiles are allowed to subset the architecture. For example, the ARMv6-M profile (used by
the Cortex M0 / M0+ / M1) is a subset of the ARMv7-M profile which supports fewer
instructions.

The ARM architecture has evolved to a point where it supports implementations across a
wide spectrum of performance points. Over two billion parts have shipped, establishing it as
the dominant architecture across many market segments. The architectural simplicity of ARM
processors has traditionally led to very small implementations, and small implementations
allow devices with very low power consumption. Implementation size, performance, and very
low power consumption remain key attributes in the development of the ARM architecture.

The ARM is a Reduced Instruction Set Computer (RISC), as it incorporates these typical
RISC architecture features:

o a large uniform register file

o a load/store architecture, where data-processing operations only operate on
register contents, not directly on memory contents
o simple addressing modes, with all load/store addresses being determined from
register contents and instruction fields only
o uniform and fixed-length instruction fields, to simplify instruction decode.
o In addition, the ARM architecture provides:
o control over both the Arithmetic Logic Unit (ALU) and shifter in most data-
processing instructions
o to maximize the use of an ALU and a shifter
o auto-increment and auto-decrement addressing modes to optimize program loops
o Load and Store Multiple instructions to maximize data throughput
o conditional execution of almost all instructions to maximize execution throughput.
 o These enhancements to a basic RISC architecture allow ARM processors to
achieve a good balance of high
o performance, small code size, low power consumption, and small silicon area.

CPU modes

The ARM architecture specifies the following CPU modes. At any moment in time, the CPU
can be in only one mode, but it can switch modes due to external events (interrupts) or
programmatically.

User mode
The only non-privileged mode.
System mode
The only privileged mode that is not entered by an exception. It can only be entered
by executing an instruction that explicitly writes to the mode bits of the CPSR.
Supervisor (svc) mode
A privileged mode entered whenever the CPU is reset or when a SWI instruction is
executed.
Abort mode
A privileged mode that is entered whenever a prefetch abort or data abort exception
occurs.
Undefined mode
A privileged mode that is entered whenever an undefined instruction exception
occurs.
Interrupt mode
A privileged mode that is entered whenever the processor accepts an IRQ interrupt.
Fast Interrupt mode
A privileged mode that is entered whenever the processor accepts an FIQ interrupt.
Hyp mode
A hypervisor mode introduced in armv-7a for cortex-A15 processor for providing
hardware virtualization support.
Graphical LCD:

Description

The TM12864H6CCOWA, Graphics LCM unit consists of 128 (segment) x 64 (common)

dots dot-matrix

LCD panel, NT75451 is a single-chip dot matrix LCD driver that can be connected directly to
a

microprocessor bus.

� Wide Operating temperature.

� Requirements on environmental protection: RoHS.

Circuit

Block Diagram
GSM MODEM
What is a GSM Modem?
A GSM modem is a specialized type of modem which accepts a SIM card, and operates over a
subscription to a mobile operator, just like a mobile phone. From the mobile operator perspective, a
GSM modem looks just like a mobile phone.

When a GSM modem is connected to a computer, this allows the computer to use the GSM modem to
communicate over the mobile network. While these GSM modems are most frequently used to
provide mobile internet connectivity, many of them can also be used for sending and receiving SMS
and MMS message

A GSM modem can be a dedicated modem device with a serial, USB or Bluetooth connection, or it
can be a mobile phone that provides GSM modem capabilities

GSM (Global System for Mobile) / GPRS (General Packet Radio Service) TTL -Modem

is SIM900 Quad-band GSM / GPRS device, works on frequencies 850 MHZ, 900 MHZ, 1800 MHZ
and 1900 MHZ. It is very compact in size and easy to use as plug in GSM Modem. The Modem is
designed with 3V3 and 5V DC TTL interfacing circuitry, which allows User to directly interface with
5V Microcontrollers (PIC, AVR, Arduino, 8051, etc.) as well as 3V3 Microcontrollers (ARM, ARM
Cortex XX, etc.). The baud rate can be configurable from 9600-115200 bps through AT (Attention)
commands. This GSM/GPRS TTL Modem has internal TCP/IP stack to enable User to connect with
internet through GPRS feature. It is suitable for SMS as well as DATA transfer application in mobile
phone to mobile phone interface. The modem can be interfaced with a Microcontroller using USART
(Universal

Synchronous Asynchronous Receiver and Transmitter) feature (serial communication).

Features:

· Quad Band GSM/GPRS : 850 / 900 / 1800 / 1900 MHz

· Built in RS232 to TTL or vice versa Logic Converter (MAX232)

· Configurable Baud Rate

· SMA (SubMiniature version A) connector with GSM L Type Antenna

· Built in SIM (Subscriber Identity Module) Card holder

· Built in Network Status LED

· Inbuilt Powerful TCP / IP (Transfer Control Protocol / Internet Protocol) stack for

internet data transfer through GPRS (General Packet Radio Service)

· Audio Interface Connectors (Audio in and Audio out)

· Most Status and Controlling pins are available

· Normal Operation Temperature : -20 °C to +55 °C

· Input Voltage : 5V to 12V DC