DIGITAL ELECTRONICS

CONTENTS

1. NUMBER SYSTEM & CODES

2. BINARY AIRTHMETIC

3. LOGIC GATES

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 NUMBER SYSTEM & CODES
Number System and Codes:

A number system with base ‘r’, contents ‘r’ different digits and they are from 0 to r
– 1.
Decimal to other codes conversions: To convert decimal number into other system
with base ‘r’, divide integer part by r and multiply fractional part with r.

Other codes to Decimal Conversions: ( x2 x1 x0 . y1 y2 )r  (A)10

2  1 
r r
Ax2r  x1 r  x 0  y 1 y2
Hexadecimal to Binary: Convert each Hexadecimal digit into 4 bit binary.
 (0101 1010 1111)2
(5 AF )16
5 A F

Binary to Hexadecimal: Grouping of 4 bits into one hex digit.

(110101.11) 2  0011 0101 . 1100 (35.C)

Octal to Binary and Binary to Octal: Same procedure as discussed above but here
group of 3 bits is made.

Codes:
Binary coded decimal (BCD):
 In BCD code each decimal digit is represented with 4 bit binary format.

10  
Eg : (943) 1001 0100 0011
 949  BCD
  It is also known as 8421 code
 Invalid BCD codes
 Total Number possible  2  1 6
4

Valid BCD codes  10 Invalid

 BCD codes 16  10 6
These are 1010, 1011, 1100, 1101, 1110, and 1111

Excess-3 code: (BCD + 0011)

  It can be derived from BCD by adding ‘3’ to each coded number.
 It is unweighted and self-complementing code.

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Gray Code:
It is also called minimum change code or unit distance code or reflected code.

Binary code to Gray code:

+ + + +
MSB 1 0 0 1 0 Binary

MSB 1 1 0 1 1 Gray

Gray code to Binary code:

Alpha Numeric codes: EBCDIC (Extended BCD Interchange code)

It is 8 bit code. It can represent 128 possible characters.
 Parity Method is most widely used schemes for error detection.
 Hamming code is most useful error correcting code.
 BCD code is used in calculators, counters.

Complements: If base is r then we can have two complements.

(i) (r – 1)’s complement.
(ii) r’s complement.

To determine (r–1)’s complement: First write maximum possible number in the

given system and subtract the given number.
To determine r’s complement: (r–1)’s complement + 1
First write (r–1)’s complement and then add 1 to LSB

Example: Find 7’s and 8’s complement of 2456

7777 5321
7's complement 2456 8's complement 1
5321 5322
Find 2’s complement of 101.110
1’s complement 010.001
For 2’s complement add 1 to the LSB
010.001
1
2's complement
010.010

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Data Representation:

Unsigned Magritude: Range with n bit  0 to 2n  1  5 101

 5  Not possible
Signed Magritude: Range with n bit  (2 n  1  1) to  (2 n  1 1)
 6 0110  6  1 110 1 0000 110
sign bit sign bit
with 4 bits with 8 bits
n 1
1’s complement: Range with n bit  (2  1) to  (2 n  1 1)
 6  0110  6  1 001
sign bit 1's complement of 6
n1
2’ complement: With n bits Range  2 to (2 n  1 1)
 6 0110  6  1 010
sign bit 2 's complement of 6

In any representation
+ve numbers are represented similar to +ve number in sign magnitude.

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 BINARY AIRTHMETIC
When both the numbers have same sign then we add only magnitude and use the
sign of MSB.

1’ Complement Addition: When the numbers have different signs, keep one
number as it is and take 1’s complement of the negative number and add them.
If carry occurs:
(a) add carry to LSB
(b) sign of the result is sign of the complemented number.
If carry does not occur:
(a) take 1’s complement of the result
(b) sign of the result is sign of the complemented number.

2’ Complement Addition: When the numbers have different signs, keep the
positive number as it is and take 2’s complement of the negative number and add
them.
If carry occurs:
(a) carry is discarded
If carry does not occur:
(a) take 2’s complement of the result
(b) sign of the result is sign of the complemented number

BCD Addition: Add the BCD numbers as regular true binary numbers.
If the sum is 9(1001) or less, it is a valid BCD answer.
If sum is greater than 9 or if there is carryout of MSB, it is an invalid BCD number.
If it is invalid, add 6 (0110) to the result to make it valid. Any carry out of the MSB
is added to the next more-significant BCD number. Repeat steps for each group of
BCD bits
76 0111 0110
94  1001 0100
Invalid BCD number
170 1 0000 1010

1 0000 1010

Add 6 (110) in the result,  0110 0110 valid BCD number

1 0111 0000
1 7 0

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Overflow concept: Overflow may occur when two same sign numbers are added.

Overflow condition : If x and y are the MSB’s of two numbers and z is resultant
MSB after adding two numbers then overflow conditions is
x yzxyz1

BOOLEAN ALGEBRA
Basic Operations:
AND OR NOT
A. A=A A+A=A
A.0=0 A+0=A A=A
A.1=A A+1=1
A.A=0 A+A=1
Boolean algebra Laws:
Commutative Law: A + B = B + A and A.B = B.A
Associative Law: A + (B + C) = (A + B) + C = A + B + C
A.(B.C) = (A.B).C = A.B.C

Distributive Law: A.(B + C) = A.B + A.C

Theorems: Distribution theorem: (A + B.C) = (A + B).(A + C)
A.(B + C) = A.B + A.C
Example: A + AB = (A + A)(A + B) = (A + B)
A+AB  (A+A)(A+B) A+B
Transposition Theorem: (A + B) . (A + C) = A + B.C

De Morgan’s Law:
A1 .A2 .A3 ......An =A1 +A2 +....+An
A1 +A2 +A3 .....+An =A1.A2 .....An
Involution Theorem: A = A
Absorption Theorem: A + AB = A
Dual Expression: It will convert positive logic into negative and negative logic into
positive logic.
Procedure:
1. Change each OR sign by AND and vice-versa.
2. Convert all 1s to 0s and all 0s to 1s.
3. Keep variables as it is.
 If one time dual is as same as function then it is known as self dual expression.
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Boolean Function Representation:
Canonical Form: All terms contain each literal.
F(A, B, C) = ABC  ABC  ABC
Standard form: All the terms do not have each literal.
 F(A, B, C)  A  BC  ABC
Sum of Product (SOP) :
 In SOP form each product term is known as minterm.
 SOP forms are used to write logical expression so that the output becomes logic
 ‘1’.
 Notation for SOP expression is f (A, B, C) =  m(3, 5, 6, 7)

Y  ABC  ABC  ABC ABC

Product of Sum (POS):
Example: (A  C) . (B  E)

 Each individual term in standard POS is called maxterm.

 POS forms are used to write logical expression so that the output becomes
logic‘0’.

Example: f (A, B, C) = M(0, 1, 2, 4)

Y = (A  B  C) (A  B  C) (A  B  C) (A  B C
Implicant: Each individual minterm or group of minterms in canonical SOP is
called implicant.
Prime Implicant: It is a minterm, which are obtained by combining maximum
possible adjacent cells in k-map.
Essential Prime Implicant: It is Prime Implicant in which one or more minterms
are unique.
Example:
1.

Possible K-map solutions: AB  AB  BC, AB  AB  AC

PI: AB, AC, AB, BC
EPI: AB,AB
 Gates, Decoders, Multiplexers
Gates
Logic gates (or simply gates) are the fundamental building blocks of digital
circuitry. As their name implies, they function by "opening" or "closing" to
admit or reject the flow of digital information. Gates implement
electronically simple logical operations on boolean (Bool’s algebra)
variables, i.e. variables that can have only one of two states (0/1, low/high,
false/true). From an electrical point of view and for the TTL (transistor-
transistor-logic) family of digital electronics, any voltage in the range 0-0,7 V
and in the range 2,5-5 V, represent logic states 0 and 1, respectively. In the
following figure the accepted electronic symbols for different gates are
shown, along with their corresponding "truth tables" and their symbolic
logical expressions. All variables (X, A, B, …) are booleans.

The most typical logical operations are implemented by AND and OR gates.
The logical expression for the AND operation is “if A is true AND B is true
then X is true”, and for the OR operation is “if A is true OR B is true then X
is true”. The inverted logic AND and OR gates are commonly known as
NAND (Not AND) and NOR (Not OR) gates. A XOR (Exclusive-OR) gate
implements the logical expression “if A is different than B then X is true”,
hence sometimes this gate is called “inequality comparator”.
The buffer and the inverter are not gates but their use is closely associated
with them. A buffer doesn’t change the logic state of its input. It is only
occasionally used for increasing the fan-out, i.e. the capability of the output
of one gate to drive a number of other gates. The inverter is much more
important and it is used for inverting a logic state, i.e. for performing the
logical operation of negation (NOT). The logical expressions for a buffer and
an inverter are “X is A” and “X is NOT A”, respectively. AND, OR, NAND
and NOR gates can have more than 2 inputs. In this case their truth tables are
extended to all inputs combinations and their corresponding expressions as
well. For example, the logical expression for a 4-input AND is “if A is true
AND B is true AND C is true AND D is true then X is true”. The
corresponding expression for a 3-input NOR gate is “if A is true OR B is true
OR C is true then X is false”
Decoders
Decoders are circuits with two or more inputs and one or more outputs,
resulting by combining various types of gates. Their basic function is to
accept a binary word (code) as an input and create a different binary word as
an output. A typical decoder is the so-called full adder (3 inputs-2 outputs)
implementing the addition of two one-digit numbers (Ai, Bi) taking into
consideration the status of any previous carry (Ci-1), resulting into the sum
(Si), and generating a new carry (Ci). The addition of two 1-digits numbers
and the corresponding truth table of full adder are shown below:

N full adders can be cascaded to form a unit for the addition of two N-digits
binary numbers. Decoders with any type of truth table can be constructed by
using simple or complicated combinations of gates. Implementation of Bool’s
algebra rules generally simplifies the overall design. Simple and useful
decoders are the so-called “2-to-4” and “3-to-8” decoders.
Multiplexers
Generally, multiplexers are circuits behaving like a controlled rotary switch,
i.e. any one of a number of inputs may be selected as output. In digital
electronics, a multiplexer is a combination of logic gates resulting into
circuits with two or more inputs (data inputs) and one output. The selection
of the channel to be read into the output is controlled by supplying a specific
digital word to a different set of inputs (select inputs). A typical 4 input
channels (D3-D0) digital multiplexer, and its corresponding truth table is
shown below:

The active input channel is selected by supplying the appropriate code to

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