Wireless Sensor Network, 2009, 2, 61-121

doi:10.4236/wsn.2009.12012 Published Online July 2009 (http://www.SciRP.org/journal/wsn/).

Micro Controller Based Ac Power Controller

S. A. HARI PRASAD1, B. S. KARIYAPPA1, R. NAGARAJ2, S. K.THAKUR3

1
Department of Electronics & Communication Engineering, R.V. College of Engineering, Bangalore, India
2
Director, Center for Cognitive Technologies,R.V.C.E. Campus, Bangalore, India
3
Deputy Director, Naval Research Board, Defence Research Development Organization, New-Delhi, India
Email: [email protected]
Received April 25, 2009; revised May 8, 2009; accepted May 9, 2009

Abstract

This paper discusses the design and implementation of single phase PWM inverter using 8051 microcontrol-
ler. The main features of 8051 based PWM inverter are simpler design, low cost, maximum range of voltage
control and compact in size. The designed PWM inverter is tested on various AC loads like AC motor and
intensity control of incandescent lamp in a closed loop environment.

Keywords: Gate Signals Generation, Micro Controller, Pulse Width Modulation, PWM Generation

1. Introduction advanced features like inbuilt PWM generator, event

managers, time capture unit, dead time delay generators,
The pulse width inverters can be broadly classified as watch dog timers along with high clock frequency, the
limitation of speed, associated with microcontroller
 Analog bridge PWM inverter [1]
based PWM inverters [5] can be neglected to some ex-
 Digital bridge PWM inverters [2] tent.
The advantage of Analog based PWM inverter con- This paper presents a simple and cost effective tech-
troller is that, the level of inverter output voltage can be nique of implementing single-phase AC [alternating cur-
adjusted in a continuous range and the throughput delay rent] voltage controller, used to control AC loads ,which
is negligible. The disadvantages of Analog based PWM doesn’t demand very high precisions, using 8051 micro-
inverters are: controller.
Analog component output characteristics changes with The paper is organized as follows.
the temperature and time. They are prone to external
 Review of PWM inverters.
disturbances. Analog controller circuitry is complex and
bulky. They are non-programmable, hence not flexible.  Block diagram of controller.
On the other hand Microcontroller based PWM in-  Controller implementation (software and hardware).
verter controller (Digital bridge PWM inverter) makes  Results and Conclusion.
the controller free from disturbances and drift, but the
performance is not very much high due to its speed limi-
tation. However to minimize throughput delay, some 2. PWM Bridge Inverter Review
microcontroller based PWM inverters, retrieves switch-
ing patterns directly from memory so that calculation can Inverters can be classified as single-phase and three
be minimized, but this technique demands more mem- phase inverters [6] and they are further classified as
ory. This drawback can be eliminated if switching pat- Voltage fed inverter [VSI.], current fed inverter [CFI],
terns are generated by executing simple control algo- and variable DC [direct current] linked inverter. In Volt-
rithms [3]. Even after using simple control algorithms, age fed inverter, input voltage remains constant, in cur-
sometimes throughput delay may be substantial. rent fed inverter [CFI], input current remains constant
With the availability of advanced microcontrollers and and in variable DC [direct current] linked inverter, input
DSP [Digital signal processor] controllers [4], with many voltage is controllable.

Copyright © 2009 SciRes. Wireless Sensor Network, 2009, 2, 61-121

 S. A. H. PRASAD ET AL. 77

Figure 1 shows single phase bridge inverter with

MOSFET switches [6]. In spite of MOSFET switches
having high ON state resistance and conduction losses
[7], in this paper MOSFET switches are used because of
the following reasons. MOSFET being a voltage con-
trolled device, it can be driven directly from CMOS or
TTL logic and the same gate signal can be applied to
diagonally opposite switches. Also the gate drive current
required is very low [7].
The working principle of Single-phase bridge inverter
can be explained as follows.
Positive Voltage ‘Vs’ appears across the load, when
MOSFET Q1 and Q2 conduct simultaneously. Nega-
tive voltage ‘Vs’ appears across the load, when Q3 and
Q4 conduct simultaneously.
To overcome the effect of back emf in case of induc-
tive load diodes, D1-D4 are used. Diode D1 and D2 are
called feedback diodes, because when they conduct the
energy is feedback to the DC source. The RMS output
Figure 1. Single phase inverter. voltage is given by
Vo  Vs p / 
where P is pulse width. The O/P voltage and gate sig-
nals are as shown in Figure 2.

3. Controller Block Diagram

The block diagram of microcontroller based bridge

PWM inverter is as shown in Figure 3. The required four
digit speed in RPM [Rotation per Minute] is entered
through the keyboard and corresponding to the key
pressed, digital equivalent of that RPM is stored in
memory.
Current running speed of the AC motor is sensed
through speed sensor, and the analog output given by the
sensor is converted to digital data using Analog to Digi-
Figure 2. O/P voltage/gate signals. tal converter [ADC].

8
KEYBOARD 8051 MICRO-
CONTROLLER GATE DRIVER

8
PWM BRIDGE
A C LOAD FILTER INVERTER

D C INPUT
ADC SENSOR

Figure 3. Block diagram of controller.

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78 S. A. H. PRASAD ET AL.

Figure 6. Flowchart of keyboard logic.

Figure 4. Flowchart of basic operation.

Figure 7. Flowchart of A/D converter.

The digital data is accepted through 8051 microcon-

troller ports and is compared with required speed’s
equivalent digital data. In accordance with the error sig-
nal, the width (duty cycle) of PWM signal is varied,
which in turn controls the AC voltage.
From the generated PWM signal, required two gate
signals are generated using external interrupt to drive the
bridge inverter circuit.
Gate signals are boosted up to a sufficient voltage
level by using gate driver circuit, so that it can drive the
MOSFET switches of bridge inverter to the ON
state. User can alter the speed at any instant of time in
accordance to his requirements. Many additional fea-
tures can be further added like sensing the temperature of
Figure 5. Flow chart of keyboard logic. room and automatically controlling either the speed of

Copyright © 2009 SciRes. Wireless Sensor Network, 2009, 2, 61-121

 S. A. H. PRASAD ET AL. 79

the fan or the level of air conditioning required. Figure 4 register (R0-R7) as shown in Figure 8.
explains the logic flow of the basic operation. A count (ON period time) is loaded onto one of the
GPR (General purpose register), which can be called as
4. Controller Design Duty cycle register and accumulator (‘A’) is loaded with
zero. Register ‘A’ is incremented in steps of one and
Controller is designed by using simpler low cost compo- continuously compared with duty cycle register.
nents like 8051 microcontroller, 8 or 12 bit Analog to
Digital Converter (ADC), 4×4 keypad, 4 chopper MOS-
FET switches (IRFZ48) and speed/Intensity sensor.
The controller design can be explained under 4 sec-
tions as:
 Keypad interface with 8051 μc.
 ADC interface with μc.
 Generating PWM signals and gate signals using
8051 microcontroller.
 Gate driver circuit implementation.

4.1. Keypad Interface

A 4×4 keypad is interface with 8051 microcontroller as
shown in Figure 5, through which four keys are accepted. Figure 8. PWM generation.
After accepting the four keys they are combined to rep-
resent four digit required RPM, which actually represents
the external memory address, in which digital equivalent
of speed is stored.
For example if the keys entered are 1 (01), 2 (02), 3
(03), 4 (04), then they are combined as 1234 (RPM),
which represents External memory address, in which 8
bit digital equivalent of that speed is stored. Higher byte
of the memory address is stored in DPH [data pointer
high byte]. Lower byte of the memory address is stored
in DPL [data pointer low byte]. This method saves time
since it doesn’t require any program execution to convert
the entered speed in RPM into its digital equivalent. The
other method is to enter equivalent digital data of RPM
directly, provided a conversion chart is available [exter-
nal look-up table]. This technique will save some mem-
ory access time, since communication with memory is
avoided.

4.2. ADC Interfacing

Figure 9. Gate signal generation using interrupt.
Whenever speed varies from zero to maximum, the speed
sensor O/P varies from zero to five volts respectively. An
8-bit ADC with resolution 1/28 is used to convert the
analog voltage to digital data. Minimum of 19.5 mv
change in voltage (corresponding change in RPM) is
required to change the digital state of ADC. This limits
the accuracy of the application. The logic of interfacing
ADC is as explained in the flowchart given in the Figure 7.

4.3. PWM Generation

8051 microcontroller do not have on-chip PWM genera-
tor. It is implemented using ‘A’ register and any other Figure 10. Gate signal booster circuit.

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80 S. A. H. PRASAD ET AL.

140 120
theoritical
120 WOF L=100 µH,R=50 Ω 100

100 WF L=100 µH,R=50 80

Ω,C=1400 µF

Vrms
80 60
Vrms

60 40
Theoritical
40 20 Practical

20
0
0 10% 20% 30% 40% 50%
0
50.05 150.15 250.25 350.35 Frequency Hz Duty Cycle

140 120
theoritical
120 WOF L=100m H,R=50Ω 100

100 WF L=100m H,R=50 80

Ω,C=1400µF
Vrms

80
Vrms

60
60
40
Theoritical
40
20 Practical
20
0
0 0 10% 20% 30% 40% 50%
50.05 150.15 250.25 350.35 Frequency Hz Duty Cycle

120
140
Theoritcal
100
120
WOF L=10m H,R=50Ω
100 80
WF L=10m H,R=50
Vrms

Vrms

80 Ω,C=1400µF
60
60
40 Theoritical
40
Practical
20
20

0 0
50.05 150.15 250.25 350.35 Frequency Hz 0 10% 20% 30% 40% 50%
Duty Cycle
Figure 11. Response for various loads with corresponding duty cycles.

If the ‘A’ contents are less than duty cycle register, and comparing the count present in the counter with ‘A’
high level is maintained at port line P1.1. When ‘A’ is register (duty cycle register). This demands external
higher than duty cycle register content a low level is clock source, since 8051 do not have any clock out pin.
maintained on port line. The alternate technique is to use Since the maximum time period is limited to 256 mi-
Timer as Counter by applying clock pulses externally croseconds, the minimum frequency of PWM signal will

Copyright © 2009 SciRes. Wireless Sensor Network, 2009, 2, 61-121

 S. A. H. PRASAD ET AL. 81

be 4 KHz, but this can be changed using software delays. MOSFET bridge inverter.
The AC signal frequency generated by PWM bridge in- Harmonics are removed by using simple capacitor fil-
verter depends on PWM signal frequency. The error sig- ter and the AC voltage is stepped up to 220 V using
nal is generated by comparing the required speed with step-up transformer. The performance of application is
accepted digital equivalent speed divided by two. In tested on various A.C loads and the plots of the same are
proportionate with the error signal, PWM duty cycle is as shown in Figure 10. The design exhibits good results
varied. When the required speed value is less than the for the load values of 50 ohm and 100 mH/ 10mH. A
accepted one, duty cycle register value and accepted simple PWM technique with 100% duty cycle variation,
value is decremented by one continuously till accepted which reduces hardware and software complexity, is
value is equal to the required speed’s digital value. When used rather than using the most often used complex si-
the required speed value is more than the accepted one, nusoidal PWM technique (For Single-phase inverters).
duty cycle register values and accepted value is incre- Required dead time is generated through interrupt, which
mented by one continuously till accepted value is equal avoids the usage of dead time delay generators. With
to the required speed digital values. minor modifications the same work can be used to con-
trol light intensity, temperature etc., The accuracy can be
4.4. Gate Signal Generation further improved by using high resolution ADC’s and the
delay involved in the software can be overcome using
The generated controlled PWM signal itself will be one
higher versions of controllers.
set of gate signal (g1, g2) and other set of gate signals (g3,
g4) is generated using interrupt technique. The controlled
6. References
PWM signal generated is given to the external interrupts,
which is initialized as falling edge sensitive interrupt
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In the interrupt service routine, a delay is created equal [2] J. M. D. Murphy, L. S. Howard, and R. G. Hoft, “Micro-
to the time, 7FH minus duty cycle register content, after processor control of PWM inverter induction motor
which, the port line is made high and is retained high for drive,” in Record of the 1979 IEEE Power Electron Spe-
the time duration decided by the contents of duty cycle cialist Conference, pp. 344–348.
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The gate signal (vg1 vg2, vg3, vg4) are boosted to a PWM inverters,” IEEE Transactions on Industrial Elec-
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in Figure 10, so that they are capable of driving MOS- [4] G. S. Buja and P. De Nardi, “Application of a signal
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A transistor switch (with inverted gate signals as in- on Industrial Electronics, Vol. IE-32, No. 1, February
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supply, which is used for inverter is also used to drive [5] Y. K. Peng, et al., “A novel PWM technique in digital
the transistor by reducing the DC level using voltage control,” IEEE Transactions on Industrial Electronics,
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Both of these techniques use the same inverter DC
[6] M. H. Rashid, “Power Electronics Circuits, Devices and
source to boost up the gate signals, thus avoiding more Applications,” 3rd Edition, Prentice-Hall of India, Private
usage of DC sources. limited, New-Delhi, 2004.
[7] V. Jagannathan, “Introduction to power electronics,”
5. Results and Conclusions Prentice-Hall of India, Private limited, New-Delhi, 2006.
The designed application is tested by designing 60V

Copyright © 2009 SciRes. Wireless Sensor Network, 2009, 2, 61-121