Lab Nand Task
Lab Nand Task
SAP 70067991
SECTION U
Exercise
NAND gate behave opposite to AND gate. Its gives all input 1 if there is no double input
at logic is 1. NAND gives output 0 if all input at logic is 1. The output of AND gate with
complement is the output of NAND gate.
3. What will be the output of NAND gate if it’s all input are at logic-1?
4. Draw the pin diagram of the 74LS00 IC and mention the inputs and outputs clearly.
5. Write the Boolean expression for 2-input NAND-gate.
7. Develop the truth table for NAND gate having 3-inputs. Also write Boolean expression.
X Y Z X+Y+Z ̅̅̅̅̅̅̅̅̅̅̅̅̅
𝑋+𝑌+𝑍
0 0 0 0 1
1 0 0 1 0
0 1 0 1 0
1 1 0 1 0
0 0 1 1 0
1 0 1 1 0
0 1 1 1 0
1 1 1 1 0
8. Draw the timing wave diagram for NAND gate with 2-inputs.
PRE LAB - EXPERIMENT NO. 2: NOR GATE
Exercise
3. What will be the output of NOR gate if it’s all input are at logic-1?
4. Draw the pin diagram of the 74LS02 IC and mention the inputs and outputs clearly.
7. Develop the truth table for NOR gate having 3-inputs. Also write Boolean expression.
X Y Z X.Y.Z ̅̅̅̅̅̅̅̅
𝑋. 𝑌. 𝑍
0 0 0 0 1
1 0 0 0 1
0 1 0 0 1
1 1 0 0 1
0 0 1 0 1
1 0 1 0 1
0 1 1 0 1
1 1 1 1 0
8. Draw the timing wave diagram for NOR gate with 3-inputs.
9. Draw equivalent symbol for two input NOR gate using OR-invert symbol.
10. Draw equivalent symbol for two input NOR gate using Invert-AND symbol.