Boolean Algebra and logic Circuits :

I.logic Circuits

1.What you should learn in this chapter :

Understand and define the functions of : not , and ,or ,nand , nor xor ,xnor
including the binary output produced from all the possible binary input ,
construct the truth table for each of the logic gates above .
Construct a logic circuit from either :
-a problem statement
- a logic expression
-a truth table

Construct the truth table from :

-a logic circuit
-a problem statement
-a logic expression

Construct a logic expression from :

-a logic circuit
-a problem statement
-a truth table

2. Logic gates and logic circuits :

2.1 Introduction :
Electronic circuits in computers , many new memories and controlling devices
are made up of thousands of logic gates .logic gates take binary inputs and
produce a binary output .
XNOR
Several logic gates combined together form a logic circuit and these circuits and
these circuits are designed to carry out a specific function .The checking of the
output from a logic gate or logic circuit is done using a truth table .

2.2 Logic Gates

Seven different logic gates will be considered in this chapter
Boolean Algebra is the mathematical foundation of digital circuits ,Boolean Algebra
specifies the relationships between the boolean variables which is used to design
combinational logic circuits using logic gates .the truth table TT is used to show a
logic circuit output response to all the input combinations
A boolean Variable takes either 0 (FALSE ) or 1 (TRUE) , Symbols are used to
represent boolean variables A B C X Y Z …..
Truth Tables :
Truth tables are used to trace the output from a logic gate or a logic circuit .
The “not” logic gate is the only L.G with one input the others have 2 inputs most of
the time .
When constructing a T.T ,all the possible combinations of 1 and 0’s which can be
input are considered.
For the NOT gate there’s only 2 to the power of one (2) possible binary combinations
For all the other gates(with 2 inputs) there are 2 to the power of 2 possible
combination

INPUT TABLE: A B
for 2 inputs
0 0

0 1

1 0

1 1
For logic gates the number of inputs can be more than 2
For three input we have those possible combinations (2 to the power of 3=8)

A B C

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

And four four inputs we have 2 to the power of 4 combinations 16

A B C D

0 0 0 0

0 0 0 1

0 0 1 0

0 0 1 1

0 1 0 0
 0 1 0 1

0 1 1 0

0 1 1 1

1 0 0 0

1 0 0 1

1 0 1 0

1 0 1 1

1 1 0 0

1 1 0 1

1 1 1 0

1 1 1 1

Logic Gates Truth tables :

1) NOT Gate
F= ‘A

INPUT OUTPUT

I F

0 1

1 0

2) AND Gate
F=A.B

INPUT1 INPUT2 OUTPUT

A B F
 0 0 0

0 1 0

1 0 0

1 1 1

3) NAND Gate
F= ‘(A.B)
INPUT1 INPUT2 OUTPUT

A B F

0 0 1

0 1 1

1 0 1

1 1 0

4) OR Gate
F= A+B

INPUT1 INPUT2 OUTPUT

A B F

0 0 0

0 1 1

1 0 1

1 1 1
5) NOR Gate
F= ‘(A+B)

INPUT1 INPUT2 OUTPUT

A B F

0 0 1

0 1 0

1 0 0

1 1 0

6) XOR Gate
F=A ⊕B

INPUT1 INPUT2 OUTPUT

A B F

0 0 0

0 1 1

1 0 1

1 1 0

7) XNOR Gate

INPUT1 INPUT2 OUTPUT

A B F

0 0 1

0 1 0
 1 0 0

1 1 1

2.3 Logic Circuits :

When logic gates are combined together to carry out a particular function ,such as
controlling robots, they form a logic circuit .The output from the logic circuit is
checked using a truth table.
There are an example which show :
How to produce a truth table
How to design a logic circuit from a given logic statement/boolean algebra
How to design a logic circuit to carry out an actual safety function (setting up an
Alarm )

Example 1 :
Produce a truth table from the logic circuit below:

There are three inputs to this logic circuit therefore there are 8 possible binary values
which can be considered as inputs , to show step-wise how the TT is produced the
logic circuit is split up into three parts and intermediate values as shown as P Q and R
Circuit 1 Circuit 2 Circuit 3
A B C as inputs PQ as outputs PQ as in / R as O RC as in / X as O

The TT of the logic circuit looks like this :

A input B input C input P int Q int R int X output

values values values

0 0 0 0 1 1 1

0 0 1 0 0 0 1

0 1 0 0 0 0 0

0 1 1 0 0 0 1

1 0 0 0 1 1 1

1 0 1 0 0 0 1

1 1 0 1 0 1 1

1 1 1 1 0 1 0

Example 2 :
A safety system uses three inputs to a logic circuit . An alarm X sound if input A is
activated and input B is deactivated or if input B is activated and input C is
deactivated

Produce the logic circuit and the TT to show the conditions which cause the output X
to be 1 .
The first thing to do is to write the logic statement representing the scenario in this
example ,to do this it is necessary to recall that ON =1 and OFF =0

X=1 if {A=1 AND B=0} OR {B=1 AND C=0}

-A is ON AND B is OFF
-B is ON AND C is OFF
The two parts are connected by an OR gate
This statement can be written as follows :X= (A.’B)+(B.’C )

Truth tables :

A B C A.’B B.’C X

0 0 0 0 0 0

0 0 1 0 0 0

0 1 0 0 1 1

0 1 1 0 0 0

1 0 0 1 0 1

1 0 1 1 0 1

1 1 0 0 1 1

1 1 1 0 0 0
II. Boolean Algebra
1) The Properties of Boolean Algebra:
The Boolean Algebra uses sets of rules for analyzing digital gates and circuits
which are known as Laws or properties of Boolean Algebra. These laws or
properties help to simplify complex Boolean expressions by reducing the number
of logic gates required for a given operation.

A. Annulment law

a variable ANDed with 0 gives 0, while a variable ORed with 1 gives

1, i.e :

A.0 = 0
A+1=1

B. Identity law

In this law variable remains unchanged it is ORed with ‘0’ or ANDed with ‘1’, i.e:
A.1 = A

A+0=A

C.Idempotent law

A variable remains unchanged when it is ORed or ANDed with itself, i.e.,

A+A=A

A.A = A
D.Complement law

In this Law if a complement is added to a variable it gives one, if a variable is

multiplied with its complement it results in ‘0’, i.e.,

A + A’ = 1

A.A’ = 0

E.Double Negation Law

A variable with two negations, its symbol gets canceled out and original variable is
obtained, i.e.,

((A)’)’=A

F.Commutative law

A variable order does not matter in this law, i.e.,

A+B=B+A

A.B = B.A

G.Associative law

The order of operation does not matter if the priority of variables are the same like ‘*’
and ‘/’, i.e:

A+(B+C) = (A+B)+C

A.(B.C) = (A.B).C
H.Distributive law

This law governs the opening up of brackets, i.e:

A.(B+C) = (A.B)+(A.C)

(A+B)(A+C) = A + BC

I.Absorption law

The absorption law consists of two dual statements:

X.(X+Y)=X

X+XY=X

G.De Morgan law

In De morgan Law , the operation of an AND or OR logic circuit is unchanged if all

inputs are inverted, the operator is changed from AND to OR, and the output is
inverted, i.e.,

(A.B)’ = A’ + B’

(A+B)’ = A’.B’

Q.Consensus theorem

AB + A’C + BC = AB + A’C
2)Canonical form of an expression :

An expanded form of Boolean expression, where each term contains all Boolean
variables in their true or complemented form, is also known as the canonical form
of the expression. As an illustration, f(A.B,C) =A’.B’.C’+A’.B’.C+A.B.C is a
Boolean function of three variables expressed in canonical form. This function
after simplification reduces to A’.B’+ A.B.C and loses its canonical form.

A)Product-of-Sums and Sum-of -Products Expressions:

A product-of-sums expression contains the product of different terms, with each

term being either a single literal or a sum of more than one literal. It can be
obtained from the truth table by considering those input combinations that produce
a logic '0' at the output. Each such input combination gives a term, and the product
of all such terms gives the expression.

Different terms are obtained by taking the sum of the corresponding literals. Here
'0' and '1' respectively mean the un-complemented and complemented variables,
unlike sum-of products expressions where '0' and '1' respectively mean
complemented and uncomplemented variables.Since each term in the case of the
product-of-sums expression is going to be the sum of literals,this implies that it is
going to be implemented using an OR operation. Now, an OR gate produces a logic
'0' only when all its inputs are in the logic '0' state, which means that the first term
corresponding to the second row of the truth table will be A+B+C. The
product-of-sums Boolean expression for this truth table is given by transforming
the given product-of-sums expression into an equivalent sum-of-products
expression is a straightforward process. Multiplying out the given equivalent
sum-of-products expression is a straightforward process. Multiplying out the given
expression and carrying out the obvious simplification provides the equivalent
sum-of-products expression:

F(x,y)=(x'+y).(x+y')
Sum of Products expression :
A given sum-of-products expression can be transformed into an equivalent
product-of sums expression by (a) taking the dual of the given expression, (b)
multiplying out different terms to get the sum-of products form, (c) removing
redundancy and (d) taking a dual to get the equivalent product-of-sums expression.
As an illustration, let us find the equivalent product of sums expression of the
sum-of products expression

A given sum-of-products expression can be transformed into an equivalent

product-of sums expression by (a) taking the dual of the given expression, (b)
multiplying out different terms to get the sum-of products form, (c) removing
redundancy and (d) taking a dual to get the equivalent product-of-sums expression.
As an illustration, let us find the equivalent product of sums expression of the
sum-of products expression: A.B+A'.B'

The dual of the given expression=(A.B)+(A'.B') :

(A.B)+(A'.B')=A.A’+A.B’+B.A’+B.B’=0+A.B’+B.A’+0 = A.B’+B.A’

therefore : (A.B)+(A'.B') Sum -of -Products= A.B’+B.A’ Products -of -Sums

B)Extracting Canonical Forms :
Let us investigate this relationship by means of a specific case where we start with
the function table shown below. The input variables are A, B, C and the output
function is f(A, B, C).

A B C F
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1

● From the table output f can be represented as f=f1+f2+f3+f4

where, f1= A’B’C ,f2= A’BC’ f3= AB’C’ f4= ABC
Hence the complete expression will be : f= A’B’C +A’BC’+ AB’C’ +ABC

● Or it could be represented as follows: f=f1.f2 .f3 .f4

where, f1= A+B+C ,f2= A+B’+ C’ f3= A’+B+C’ f4= A’+B’+C
Hence the complete expression will be : f= (A+B+C) (A+B’+ C’) (A’+B+C’)
(A’+B’+C)
The Exclusive-OR and Equivalence Operation
The logical description of the gate can be extracted from the function table. The
two cases that results in a 1 at the output are AB=01 and AB=10, so the function is
given by A XOR B = A’.B + A.B’

3)Karnaugh Map :
Karnaugh maps reduce logic functions more quickly and easily compared to
Boolean algebra. By reduce we mean simplify, reducing the number of gates and
inputs. We like to simplify logic to a lowest cost form to save costs by elimination
of components. We define lowest cost as being the lowest number of gates with the
lowest number of inputs per gate. A Karnaugh map is a graphical representation of
the logic system. It can be drawn directly from either minterm (sum-of-products)
or maxterm (product-of-sums) Boolean expressions. Drawing a Karnaugh map
from the truth table involves an additional step of writing the minterm or maxterm
expression depending upon whether it is desired to have a minimized sum-of
products or a minimized product-of-sums expression.
Construction of a Karnaugh Map:
An n-variable Karnaugh map has 2n squares, and each possible input is allotted a
square. In the case of a minterm Karnaugh map, ‘1’ is placed in all those squares
for which the output is ‘1’ and ‘0’ is placed in all those squares for which the
output is ‘0’. 0s are omitted for simplicity. An ‘X‘ is placed in squares
corresponding to ‘don‘t care conditions. In the case of a maxterm Karnaugh map, a
‘0’ is placed in all those squares for which the output is ‘0’, and a ‘1’ is placed for
input entries corresponding to a ‘1’ output. 1s are omitted for simplicity, and an ‘X‘
is placed in squares corresponding to ‘don’t care’ conditions. The choice of terms
identifying different rows and columns of a Karnaugh map is not unique for a
given number of variables. The only condition to be satisfied is that the designation
of adjacent rows and adjacent columns should be the same except for one of the
literals being complemented. Also, the extreme rows and extreme columns are
considered adjacent. Some of the possible designation styles for two, three and
four variable minterm Karnaugh maps are shown in the figure below. The style of
row identification need not be the same as that of column identification as long as
it meets the basic requirement with respect to adjacent terms. It is, however,
accepted practice to adopt a uniform style of row and column identification. Also,
the style shown in the figure below is more commonly used. A similar discussion
applies for maxterms Karnaugh maps. Having drawn the Karnaugh map, the next
step is to form groups of 1s as per the following guidelines:

➢ Each square containing a ‘1’ must be considered at least once, although it

can be considered as often as desired.
➢ The number of squares in a group must always be a power of 2, i.e. groups
can have 1, 2, 4, 8, 16, squares
➢ Each group should be as large as possible, which means that a square should
not be accounted for by itself if it can be accounted for by a group of two
squares; a group of two squares should not be made if the involved squares
can be included in a group of four squares and so on
➢ ‘Don’t care entries can be used in accounting for all of 1-squares to make
optimum groups. They are marked ‘X’ in the corresponding squares. It is,
however, not necessary to account for all ‘don’t care’ entries. Only such
entries that can be used to advantage should be used.
➢ The objective should be to account for all the marked squares in the
minimum number of groups.