Transistor Biasing ND FET Basics

Different Methods for Transistor Biasing
1. base bias or fixed current bias : It is not a very satisfactory method because bias voltages and currents do not
remain constant during transistor operation (fig-1)
2. base bias with emitter feedback : This circuit achieves good stability of dc operating point against changes in β
with the help of emitter resistor which causes degeneration to take place (fig-2)
3. base bias with collector feedback: It is also known as collector-to-base bias or collector feedback bias. It
provides better bias stability.
4. base bias with collector and
emitter feedbacks: It is a
combination of (2) and (3) above.
5. emitter bias with two supplies:
This circuit uses both a positive and a
negative supply voltage. Here, base is
at approximately 0 volt i.e. VB ≅ 0.
Figure-1: base bias Figure 2: base bias Figure 1: Voltage
6. voltage divider bias: It is most with emitter feedback divider bias
widely used in linear discrete circuits
because it provides good bias stability. It is also called universal
bias circuit or base bias with one supply (fig-3)
DC Equivalent Circuit of a transistor: for an ideal transistor =1

and IC=IE. The base-emitter junction is forward biased and acts as
a diode. Due to transistor action collector-base junction acts like
a current source as shown in fig-4. DC equivalent circuit of a
transistor in CE configuration is shown in fig-4
Figure -4: DC equivalent circuit of a transistor in

AC Equivalent Circuit of a transistor: (above) CB and (below) CE configuration
AC equivalent circuit connected in CB is shown below. AC resistance offered is given by

AC equivalent circuit connected in CE is shown below. AC
resistance offered is given by
The h-parameters of an Ideal CB Transistor: The forward parameters can be found out from the following figure
And forward current gain is
The reverse parameters can be found from the following figure
Reverse voltage gain is given by
The output admittance is
The reverse parameters are

Frequency response of BJT: The variation of gain with frequency of an BJT amplifier is called frequency
response. The frequency response of an amplifier is shown in figure.
The 70.7 percent of maximum gain is called 3-

db point.
At 70.7 percent gain the intercept points A is

called the lower cut-off frequency (f1) and B is
called upper cut-off frequency (f2).
The difference f = f2-f1 is called the bandwidth

of the amplifier.
What is a FET ?
The acronym ‘FET’ stands for field effect transistor. It is a three-terminal unipolar solid-state device in
which current is controlled by an electric field
Classifications of FET
(a) junction field effect transistor (JFET)
(b) metal-oxide semiconductor FET (MOSFET)
It is also called insulated-gate FET (IGFET). It may be further subdivided into :
(i) depletion-enhancement MOSFET i.e. DEMOSFET
(ii) enhancement-only MOSFET i.e. E-only MOSFET
Both of these can be either P-channel or N-channel

devices.
JFET Construction: The construction of JFET and

its symbol are shown here
There are four main parts of JFET
• Drain (D)
• Source (S)
• Gate (G)
• Channel
Operation of JFET
JFET biasing rules:
1. Gates are always reversed-biased. Hence, gate current IG is practically zero.
2. The source terminal is always connected to that end of the drain supply which provides the necessary charge
carriers.
In an N-channel JFET, source terminal S is connected to the
negative end of the drain voltage supply
In a P-channel JFET, S is connected to the positive end of the

drain voltage supply for getting holes which flow through the
channel.
JFET has two characteristics
Figure -10: JFET characteristics when VGS = 0
JFET Drain Characteristic With VGS = 0 (shown in fig-10)
1. Ohmic Region OA: This part of the characteristic is linear indicating that for low values of VDS, current
varies directly
with voltage following Ohm's Law. It means that JFET behaves like an ordinary resistor till point A (called
knee) is reached.
2. Curve AB: 2. Curve AB In this region, ID increases at reverse square-law rate upto point B which is called
pinch-off point.
3. Pinch-off Region BC: Here, JFET operates as a constant-current device because ID is relatively
independent of VDS. The value of VDS at which the current becomes constant is called pinch-off voltage VP.
4. Breakdown Region: If VDS is increased beyond its value corresponding to point C (called avalanche
breakdown voltage), JFET enters the breakdown region where ID increases to an excessive value. This
happens because the reverse-biased gate-channel P-N junction undergoes avalanche breakdown when small
changes in VDS produce very large changes in ID.
Transfer Characteristic of JFET: It is a plot of ID versus VGS for a

constant value of VDS and is shown in fig-11
Small Signal JFET Parameters
(i) AC Drain Resistance, rd : It is the ac resistance between drain and

source terminals when JFET is operating in the pinch-off region. It is
given by
(ii) Transconductance, gm : It is simply the slope of transfer characteristic.
Figure 2 Transfer characteristics of

JFET
(iii) Amplification Factor 
Also given in terms of rd and 
(iv) DC Drain Resistance, RDS : It is also called the static or ohmic resistance of the channel. It is given by

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Different Methods for Transistor Biasing

DC Equivalent Circuit of a transistor: for an ideal transistor =1

Figure -4: DC equivalent circuit of a transistor in

AC equivalent circuit connected in CB is shown below. AC resistance offered is given by

And forward current gain is

The reverse parameters can be found from the following figure

Reverse voltage gain is given by

The output admittance is

The reverse parameters are

The 70.7 percent of maximum gain is called 3-

At 70.7 percent gain the intercept points A is

The difference f = f2-f1 is called the bandwidth

(a) junction field effect transistor (JFET)

(b) metal-oxide semiconductor FET (MOSFET)

It is also called insulated-gate FET (IGFET). It may be further subdivided into :

(i) depletion-enhancement MOSFET i.e. DEMOSFET

(ii) enhancement-only MOSFET i.e. E-only MOSFET

Both of these can be either P-channel or N-channel

JFET Construction: The construction of JFET and

There are four main parts of JFET

JFET biasing rules:

1. Gates are always reversed-biased. Hence, gate current IG is practically zero.

In a P-channel JFET, S is connected to the positive end of the

JFET has two characteristics

Figure -10: JFET characteristics when VGS = 0

JFET Drain Characteristic With VGS = 0 (shown in fig-10)

Transfer Characteristic of JFET: It is a plot of ID versus VGS for a

Small Signal JFET Parameters

(i) AC Drain Resistance, rd : It is the ac resistance between drain and

(ii) Transconductance, gm : It is simply the slope of transfer characteristic.

Figure 2 Transfer characteristics of

Also given in terms of rd and 

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