H

High CMR Isolation Amplifiers

Technical Data

HCPL-7800
HCPL-7800A
HCPL-7800B

Features • Switch-Mode Power Supply applications, we recommend the

• 15 kV/ µs Common-Mode Signal Isolation HCPL-7800 which exhibits a
Rejection at VCM = 1000 V* • General Purpose Analog part-to-part gain tolerance of
Signal Isolation ± 5%. For precision applications,
• Compact, Auto-Insertable
HP offers the HCPL-7800A and
Standard 8-pin DIP Package • Transducer Isolation
HCPL-7800B, each with part-to-
• 4.6 µV/ °C Offset Drift vs. part gain tolerances of ± 1%.
Temperature Description
• 0.9 mV Input Offset Voltage The HCPL-7800 high CMR The HCPL-7800 utilizes sigma-
• 85 kHz Bandwidth isolation amplifier provides a delta (Σ∆) analog-to-digital
• 0.1% Nonlinearity unique combination of features converter technology, chopper
• Worldwide Safety Approval: ideally suited for motor control stabilized amplifiers, and a fully
UL 1577 (3750 V rms/1 min), circuit designers. The product differential circuit topology
VDE 0884 and CSA provides the precision and fabricated using HP’s 1 µm
stability needed to accurately CMOS IC process. The part also
• Advanced Sigma-Delta ( Σ∆)
monitor motor current in high- couples our high-efficiency, high-
A/D Converter Technology
noise motor control environ- speed AlGaAs LED to a high-
• Fully Differential Circuit ments, providing for smoother speed, noise-shielded detector
Topology control (less “torque ripple”) in
• 1 µm CMOS IC Technology various types of motor control
applications. Functional Diagram
Applications
• Motor Phase Current This product paves the way for a V DD1
1 I DD1 I DD2 8
V DD2
Sensing smaller, lighter, easier to produce,
high noise rejection, low cost
• General Purpose Current I IN IO 7
solution to motor current V IN+
2
+ + V OUT+
Sensing
sensing. The product can also be
• High-Voltage Power Source used for general analog signal 3 6
V IN-
Voltage Monitoring isolation applications requiring
- - V OUT-

high accuracy, stability and

*The terms common-mode rejection linearity under similarly severe 4 5
GND1 GND2
(CMR) and isolation-mode rejection (IMR)
are used interchangeably throughout this
noise conditions. For general
CMR SHIELD
data sheet.

CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to
prevent damage and/or degradation which may be induced by ESD.

1-216 5965-3592E
 OPTOCOUPLERS
using our patented “light-pipe” rejection, as well as excellent pin DIP package that meets
optocoupler packaging offset and gain accuracy and worldwide regulatory safety
technology. stability over time and tempera- standards (gull-wing surface
ture. This performance is mount option #300 also
Together, these features deliver delivered in a compact, auto- available).
unequaled isolation-mode noise insertable, industry standard 8-

Ordering Information:
HCPL-7800x

No Specifier = ± 5% Gain Tol.; Mean Gain Value = 8.00

A = ± 1% Gain Tol.; Mean Gain Value = 7.93
B = ± 1% Gain Tol.; Mean Gain Value = 8.07

Option yyy

300 = Gull Wing Surface Mount Lead Option

500 = Tape/Reel Package Option (1 k min.)

Option datasheets available. Contact your Hewlett-Packard sales representative or authorized distributor for
information.

Package Outline Drawings

Standard DIP Package

9.40 (0.370)
9.90 (0.390)

8 7 6 5
TYPE NUMBER* 0.20 (0.008)
6.10 (0.240) 0.33 (0.013)
HP 7800 DATE CODE
6.60 (0.260)
YYWW 7.36 (0.290)
7.88 (0.310) 5° TYP.

PIN ONE 1 2 3 4

1.78 (0.070) MAX.

1.19 (0.047) MAX.

4.70 (0.185) MAX. PIN DIAGRAM

1 VDD1 VDD2 8
PIN ONE
0.51 (0.020) MIN.
2 VIN+ VOUT+ 7
2.92 (0.115) MIN.

3 VIN– VOUT– 6
0.76 (0.030) 0.65 (0.025) MAX.
1.24 (0.049) 4 GND1 GND2 5
2.28 (0.090)
2.80 (0.110)

DIMENSIONS IN MILLIMETERS AND (INCHES). * TYPE NUMBER FOR: HCPL-7800 = 7800

HCPL-7800A = 7800A
HCPL-7800B = 7800B

1-217
Gull Wing Surface Mount Option 300*

PIN LOCATION (FOR REFERENCE ONLY)

9.65 ± 0.25 1.02 (0.040)
(0.380 ± 0.010) 1.19 (0.047)

8 7 6 5
4.83 TYP.
(0.190)
HP 7800 6.350 ± 0.25
YYWW (0.250 ± 0.010) 9.65 ± 0.25
(0.380 ± 0.010)

1 2 3 4
MOLDED
0.380 (0.015)
1.19 (0.047) 0.635 (0.025)
1.78 (0.070)

1.780 9.65 ± 0.25

(0.070) (0.380 ± 0.010)
1.19 MAX.
(0.047) 7.62 ± 0.25
MAX. (0.300 ± 0.010)
0.20 (0.008)
4.19 MAX. 0.33 (0.013)
(0.165)

1.080 ± 0.320 0.635 ± 0.25

(0.043 ± 0.013) (0.025 ± 0.010)
0.51 ± 0.130
2.540 (0.020 ± 0.005) 12° NOM.
(0.100)
BSC

DIMENSIONS IN MILLIMETERS (INCHES).

TOLERANCES (UNLESS OTHERWISE SPECIFIED): xx.xx = 0.01 LEAD COPLANARITY
xx.xxx = 0.005 MAXIMUM: 0.102 (0.004)

* REFER TO OPTION 300 DATA SHEET FOR MORE INFORMATION.

Maximum Solder Reflow Thermal Profile

260
240
∆T = 145°C, 1°C/SEC
220
∆T = 115°C, 0.3°C/SEC
200
TEMPERATURE – °C

180
160
140
120
100
80
∆T = 100°C, 1.5°C/SEC
60
40
20
0
0 1 2 3 4 5 6 7 8 9 10 11 12
TIME – MINUTES

(NOTE: USE OF NON-CHLORINE ACTIVATED FLUXES IS RECOMMENDED.)

1-218
Regulatory Information

OPTOCOUPLERS
The HCPL-7800 has been
approved by the following
organizations:

UL CSA VDE
Recognized under UL 1577, Approved under CSA Component Approved according to VDE
Component Recognition Acceptance Notice #5, File CA 0884/06.92.
Program, File E55361. 88324.

Insulation and Safety Related Specifications

Parameter Symbol Value Units Conditions
Min. External Air Gap L(IO1) 7.4 mm Measured from input terminals to output terminals,
(External Clearance) shortest distance through air
Min. External Tracking L(IO2) 8.0 mm Measured from input terminals to output terminals,
Path (External Creepage) shortest distance path along body
Min. Internal Plastic Gap 0.5 mm Through insulation distance, conductor to conductor,
(Internal Clearance) usually the direct distance between the photoemitter
and photodetector inside the optocoupler cavity
Tracking Resistance CTI 175 V DIN IEC 112/VDE 0303 Part 1
(Comparative Tracking
Index)
Isolation Group III a Material Group (DIN VDE 0110, 1/89, Table 1)
Option 300 – surface mount classification is Class A in accordance with CECC 00802.

VDE 0884 (06.92) Insulation Characteristics

Description Symbol Characteristic Unit
Installation classification per DIN VDE 0110, Table 1
for rated mains voltage ≤ 300 V rms I-IV
for rated mains voltage ≤ 600 V rms I-III
Climatic Classification 40/100/21
Pollution Degree (DIN VDE 0110, Table 1)* 2
Maximum Working Insulation Voltage VIORM 848 V peak
Input to Output Test Voltage, Method b** VPR 1591 V peak
VPR = 1.875 x VIORM, Production test with tp = 1 sec,
Partial discharge < 5 pC
Input to Output Test Voltage, Method a** VPR 1273 V peak
VPR = 1.5 x VIORM, Type and sample test with tp = 60 sec,
Partial discharge < 5 pC
Highest Allowable Overvoltage**
(Transient Overvoltage tTR = 10 sec) VTR 6000 V peak
Safety-limiting values (Maximum values allowed in the event
of a failure, also see Figure 27)
Case Temperature TS 175 °C
Input Power PS,Input 80 mW
Output Power PS,Output 250 mW
Insulation Resistance at TS, VIO = 500 V RS ≥ 1x1012 Ω
*This part may also be used in Pollution Degree 3 environments where the rated mains voltage is ≤ 300 V rms (per DIN VDE 0110).
**Refer to the front of the optocoupler section of the current catalog for a more detailed description of VDE 0884 and other product
safety requirements.
Note: Optocouplers providing safe electrical separation per VDE 0884 do so only within the safety-limiting values to which they are
qualified. Protective cut-out switches must be used to ensure that the safety limits are not exceeded.

1-219
Absolute Maximum Ratings
Parameter Symbol Min. Max. Unit Note
Storage Temperature TS -55 125 °C
Ambient Operating Temperature TA - 40 100 °C
Supply Voltages VDD1, VDD2 0.0 5.5 V
Steady-State Input Voltage VIN+, VIN- -2.0 VDD1 +0.5 V
Two Second Transient Input Voltage -6.0
Output Voltages VOUT+, VOUT- -0.5 VDD2 +0.5 V
Lead Solder Temperature TLS 260 °C 1
(1.6 mm below seating plane, 10 sec.)
Reflow Temperature Profile See Package Outline Drawings Section

Recommended Operating Conditions

Parameter Symbol Min. Max. Unit Note
Ambient Operating Temperature TA -40 85 °C 2
Supply Voltages VDD1, VDD2 4.5 5.5 V 3
Input Voltage VIN+, VIN- -200 200 mV 4
Output Current |IO| 1 mA 5

1-220
 OPTOCOUPLERS
DC Electrical Specifications
All specifications and figures are at the nominal operating condition of VIN+ = 0 V, VIN- = 0 V, TA = 25°C, VDD1 =
5.0 V, and VDD2 = 5.0 V, unless otherwise noted.
Parameter Symbol Min. Typ. Max. Unit Test Conditions Fig. Note
Input Offset Voltage VOS -1.8 -0.9 0.0 mV 1
Input Offset Drift vs. dVOS/dT -2.1 µV/°C 1, 2 6
Temperature
Abs. Value of Input |dVOS/dT| 4.6 µV/°C 1 7
Offset Drift vs. Temperature
Input Offset Drift vs. VDD1 dVOS/dVDD1 30 µV/V 1, 3 8
Input Offset Drift vs. VDD2 dVOS/dVDD2 -40 µV/V 1, 4 9
Gain (± 5% Tol.) G 7.61 8.00 8.40 -200 mV < VIN+ < 200 mV 1, 5 10
Gain - A Version (± 1% Tol.) GA 7.85 7.93 8.01
Gain - B Version (± 1% Tol.) GB 7.99 8.07 8.15
Gain Drift vs. Temperature dG/dT 0.001 %/°C 5, 6 11
Abs. Value of Gain Drift vs. |dG/dT| 0.001 %/°C 5 12
Temperature
Gain Drift vs. VDD1 dG/dVDD1 0.21 %/V 5, 7 13
Gain Drift vs. VDD2 dG/dVDD2 -0.06 %/V 5, 8 14
200 mV Nonlinearity NL200 0.2 0.35 % 5, 9 15
200 mV Nonlinearity Drift dNL200/dT -0.001 % pts/°C 5, 10 16
vs. Temperature
200 mV Nonlinearity Drift dNL200/dVDD1 -0.005 % pts/V 5, 11 17
vs. VDD1
200 mV Nonlinearity Drift dNL200/dVDD2 -0.007 % pts/V 5, 12 18
vs. VDD2
100 mV Nonlinearity NL100 0.1 0.25 % -100 mV< VIN+ < 100 mV 5, 13 19
Maximum Input Voltage |VIN+|max 300 mV 14
Before Output Clipping
Average Input Bias Current IIN -670 nA 15, 16 20
Input Bias Current dIIN/dT 3 nA/°C
Temperature Coefficient
Average Input Resistance RIN 530 kΩ 15 20
Input Resistance dRIN/dT 0.38 %/°C
Temperature Coefficient
Input DC Common-Mode CMRRIN 72 dB 21
Rejection Ratio
Output Resistance RO 11 Ω 5
Output Resistance dRO/dT 0.6 %/°C
Temperature Coefficient
Output Low Voltage VOL 1.18 V |VIN+| = 500 mV 14 22
Output High Voltage VOH 3.61 V IOUT+ = 0 A, IOUT– = 0 A
Output Common-Mode VOCM 2.20 2.39 2.60 V -40°C < TA < 85°C 14
Voltage 4.5 V < VDD1 < 5.5 V
Input Supply Current IDD1 10.7 15.5 mA 17 23
Output Supply Current IDD2 11.6 14.5 mA VIN+ = 200 mV, 18 24
-40°C < TA < 85°C
4.5 V < VDD2 < 5.5 V
Output Short-Circuit |IOSC| 9.3 mA VOUT = 0 V or VDD2 25
Current

1-221
AC Electrical Specifications
All specifications and figures are at the nominal operating condition of VIN+ = 0 V, VIN- = 0 V, TA = 25°C,
VDD1 = 5.0 V, and VDD2 = 5.0 V, unless otherwise noted.
Parameter Symbol Min. Typ. Max. Unit Test Conditions Fig. Note
Rising Edge Isolation IMRR 10 25 kV/µs VIM = 1 kV 19, 20 26
Mode Rejection
Falling Edge Isolation IMRF 10 15 kV/µs
Mode Rejection
Isolation Mode Rejection IMRR >140 dB 19 27
Ratio at 60 Hz
Propagation Delay to 10% tPD10 2.0 3.3 µs -40°C < TA < 85°C 21, 22
Propagation Delay to 50% tPD50 3.4 5.6 µs
Propagation Delay to 90% tPD90 6.3 9.9 µs
Rise/Fall Time (10%-90%) tR/F 4.3 6.6 µs
Bandwidth (-3 dB) f-3dB 50 85 kHz 23, 24
Bandwidth (-45°) f-45° 35 kHz
RMS Input-Referred VN 300 µV rms Bandwidth = 100 kHz 25, 26 28
Noise
Power Supply Rejection PSR 5 mVp-p 29

Package Characteristics
All specifications and figures are at the nominal operating condition of VIN+ = 0 V, VIN- = 0 V, TA = 25°C, VDD1
= 5.0 V, and VDD2 = 5.0 V, unless otherwise noted.
Parameter Symbol Min. Typ. Max. Unit Test Conditions Fig. Note
Input-Output Momentary VISO 3750 V rms t = 1 min., RH ≤ 50% 30, 31
Withstand Voltage*
Input-Output Resistance RI-O 1012 1013 Ω TA = 25°C VI-O = 500 Vdc 30
1011 TA = 100°C
Input-Output Capacitance CI-O 0.7 pF f = 1 MHz 30
Input IC Junction-to- θjci 96 °C/W 32
Case Thermal Resistance
Output IC Junction-to-Case θjco 114 °C/W
Thermal Resistance

*The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output
continuous voltage rating. For the continuous voltage rating refer to the VDE 0884 Insulation Characteristics Table (if applicable), your
equipment level safety specification, or HP Application Note 1074, “Optocoupler Input-Output Endurance Voltage.”

1-222
 OPTOCOUPLERS
Notes: as the change in magnitude per °C 16. Data sheet value is the average change
General Note: Typical values represent the change in temperature. in nonlinearity versus temperature at
mean value of all characterization units at 8. Data sheet value is the average change TA = 25°C, with all other parameters
the nominal operating conditions. Typical in offset voltage versus input supply held constant. This value is expressed
drift specifications are determined by voltage at VDD1 = 5 V, with all other as the number of percentage points
calculating the rate of change of the speci- parameters held constant. This value that the nonlinearity will change per
fied parameter versus the drift parameter is expressed as the change in offset °C change in temperature. For
(at nominal operating conditions) for each voltage per volt change of the input example, if the temperature is
characterization unit, and then averaging supply voltage. increased from 25°C to 35°C, the
the individual unit rates. The correspond- 9. Data sheet value is the average change nonlinearity typically will decrease by
ing drift figures are normalized to the in offset voltage versus output supply 0.01 percentage points (10°C times
nominal operating conditions and show voltage at VDD2 = 5 V, with all other -0.001 % pts/°C) from 0.2% to 0.19%.
how much drift occurs as the particular parameters held constant. This value 17. Data sheet value is the average change
drift parameter is varied from its nominal is expressed as the change in offset in nonlinearity versus input supply
value, with all other parameters held at voltage per volt change of the output voltage at VDD1 = 5 V, with all other
their nominal operating values. Figures supply voltage. parameters held constant. This value
show the mean drift of all characterization 10. Gain is defined as the slope of the is expressed as the number of
units as a group, as well as the ± 2-sigma best-fit line of differential output percentage points that the nonlinearity
statistical limits. Note that the typical drift voltage (VOUT+ - VOUT-) versus will change per volt change of the
specifications in the tables below may differential input voltage (VIN+ -VIN-) input supply voltage.
differ from the slopes of the mean curves over the specified input range. 18. Data sheet value is the average change
shown in the corresponding figures. 11. Data sheet value is the average change in nonlinearity versus output supply
1. HP recommends the use of non- in gain versus temperature at voltage at VDD2 = 5 V, with all other
TA = 25°C, with all other parameters parameters held constant. This value
chlorine activated fluxes.
2. The HCPL-7800 will operate properly held constant. This value is expressed is expressed as the number of
at ambient temperatures up to 100°C as the percentage change in gain per percentage points that the nonlinearity
°C change in temperature. will change per volt change of the
but may not meet published specifi-
cations under these conditions. 12. Data sheet value is the average output supply voltage.
3. DC performance can be best magnitude of the change in gain 19. NL100 is the nonlinearity specified over
versus temperature at TA = 25°C, with an input voltage range of ± 100 mV.
maintained by keeping VDD1 and VDD2
as close as possible to 5 V. See all other parameters held constant. 20. Because of the switched-capacitor
application section for circuit This value is expressed as the nature of the input sigma-delta
percentage change in magnitude per converter, time-averaged values are
recommendations.
4. HP recommends operation with VIN- °C change in temperature. shown.
= 0 V (tied to GND1). Limiting VIN+ 13. Data sheet value is the average change 21. This parameter is defined as the ratio
in gain versus input supply voltage at of the differential signal gain (signal
to 100 mV will improve DC
nonlinearity and nonlinearity drift. If VDD1 = 5 V, with all other parameters applied differentially between pins 2
VIN- is brought above 800 mV with held constant. This value is expressed and 3) to the common-mode gain
as the percentage change in gain per (input pins tied together and the signal
respect to GND1, an internal test
mode may be activated. This test mode volt change of the input supply applied to both inputs at the same
is not intended for customer use. voltage. time), expressed in dB.
14. Data sheet value is the average change 22. When the differential input signal
5. Although, statistically, the average
difference in the output resistance of in gain versus output supply voltage at exceeds approximately 300 mV, the
pins 6 and 7 is near zero, the standard VDD2 = 5 V, with all other parameters outputs will limit at the typical values
held constant. This value is expressed shown.
deviation of the difference is 1.3 Ω
due to normal process variations. as the percentage change in gain per 23. The maximum specified input supply
Consequently, keeping the output volt change of the output supply current occurs when the differential
voltage. input voltage (VIN+ - VIN-) = 0 V. The
current below 1 mA will ensure the
best offset performance. 15. Nonlinearity is defined as the maxi- input supply current decreases
6. Data sheet value is the average change mum deviation of the output voltage approximately 1.3 mA per 1 V
from the best-fit gain line (see Note decrease in VDD1.
in offset voltage versus temperature at
TA = 25°C, with all other parameters 10), expressed as a percentage of the 24. The maximum specified output supply
held constant. This value is expressed full-scale differential output voltage current occurs when the differential
range. For example, an input range of input voltage (VIN+ - VIN-) = 200 mV,
as the change in offset voltage per °C
change in temperature. ± 200 mV generates a full-scale differ- the maximum recommended operating
7. Data sheet value is the average ential output range of 3.2 V (± 1.6 V); input voltage. However, the output
a maximum output deviation of 6.4 supply current will continue to rise for
magnitude of the change in offset
voltage versus temperature at mV would therefore correspond to a differential input voltages up to
TA = 25°C, with all other parameters nonlinearity of 0.2%. approximately 300 mV, beyond which
the output supply current remains
held constant. This value is expressed
constant.

1-223
25. Short circuit current is the amount of the isolation mode gain (input pins 29. Data sheet value is the differential
output current generated when either tied to pin 4 and the signal applied amplitude of the transient at the
output is shorted to VDD2 or ground. between the input and the output of output of the HCPL-7800 when a
26. IMR (also known as CMR or Common the isolation amplifier) at 60 Hz, 1 Vpk-pk, 1 MHz square wave with 5 ns
Mode Rejection) specifies the mini- expressed in dB. rise and fall times is applied to both
mum rate of rise of an isolation mode 28. Output noise comes from two primary VDD1 and VDD2.
noise signal at which small output sources: chopper noise and sigma- 30. This is a two-terminal measurement:
perturbations begin to appear. These delta quantization noise. Chopper pins 1-4 are shorted together and pins
output perturbations can occur with noise results from chopper stabiliza- 5-8 are shorted together.
both the rising and falling edges of the tion of the output op-amps. It occurs 31. In accordance with UL1577, for
isolation-mode wave form and may be at a specific frequency (typically 200 devices with minimum VISO specified at
of either polarity. When the perturba- kHz at room temperature), and is not 3750 Vrms, each optocoupler is proof-
tions first appear, they occur only attenuated by the internal output filter. tested by applying an insulation test
occasionally and with relatively small A filter circuit can be easily added to voltage greater-than-or-equal-to 4500
peak amplitudes (typically 20-30 mV the external post-amplifier to reduce Vrms for one second (leak current
at the output of the recommended the total rms output noise. The detection limit, II-O < 5 µA). This test
application circuit). As the magnitude internal output filter does eliminate is performed before the method b,
of the isolation mode transients most, but not all, of the sigma-delta 100% production test for partial
increase, the regularity and amplitude quantization noise. The magnitude of discharge shown in the VDE 0884
of the perturbations also increase. See the output quantization noise is very Insulation Characteristics Table.
applications section for more small at lower frequencies (below 10 32. Case temperature was measured with a
information. kHz) and increases with increasing thermocouple located in the center of
27. IMRR is defined as the ratio of frequency. See applications section for the underside of the package.
differential signal gain (signal applied more information.
differentially between pins 2 and 3) to

dVOS – INPUT-REFERRED OFFSET DRIFT – µV

1500
MEAN
+5 V +5 V +15 V ± 2 SIGMA
1000
0.1 µF
0.1 µF HCPL-7800 0.1 µF
1 8 500
10 K
2 7 +
V OUT 0
3 6 - AD624CD
10 K GAIN = 1000
4 5
-500

0.1 µF
0.33 µF 0.33 µF
-1000
-40 -20 0 20 40 60 80 100
TA – TEMPERATURE – °C
-15 V

Figure 1. Input Offset Voltage Test Circuit. Figure 2. Input-Referred Offset Drift
vs. Temperature.

1-224
 OPTOCOUPLERS
dVOS – INPUT-REFERRED OFFSET DRIFT – µV

dVOS – INPUT-REFERRED OFFSET DRIFT – µV

600 400
MEAN MEAN
± 2 SIGMA ± 2 SIGMA
400 300

200 200

0 100

-200 0

-400 -100

-600 -200
4.4 4.6 4.8 5.0 5.2 5.4 5.6 4.4 4.6 4.8 5.0 5.2 5.4 5.6
VDD1 – INPUT SUPPLY VOLTAGE – V VDD2 – OUTPUT SUPPLY VOLTAGE – V

Figure 3. Input-Referred Offset Drift Figure 4. Input-Referred Offset Drift

vs. VDD1 (VDD2 = 5 V). vs. VDD2 (VDD1 = 5 V).

1.5
MEAN
+5 V +5 V +15 V ± 2 SIGMA
1.0
0.1 µF

dG – GAIN DRIFT– %
0.1 µF HCPL-7800 0.1 µF
1 8 0.5
10 K
V IN 2 7 +
V OUT
3 6 0
- AD624CD
10 K GAIN = 1
0.01 µF 4 5
-0.5
0.1 µF
0.33 µF 0.33 µF

-1.0
-40 -20 0 20 40 60 80 100
-15 V T A – TEMPERATURE – °C

Figure 5. Gain and Nonlinearity Test Circuit. Figure 6. Gain Drift vs. Temperature.

0.5 0.5 0.3

MEAN
MEAN 0.2 ± 2 SIGMA
0.4
0
ERROR – % OF FULL-SCALE

± 2 SIGMA
dG – GAIN DRIFT– %
dG – GAIN DRIFT– %

0.3 0.1
-0.5

0.2 0

-1.0
0.1 -0.1

-1.5 -0.2
0
MEAN
± 2 SIGMA
-2.0 -0.1 -0.3
4.4 4.6 4.8 5.0 5.2 5.4 5.6 4.4 4.6 4.8 5.0 5.2 5.4 5.6 -0.2 -0.1 0 0.1 0.2

V DD1 – INPUT SUPPLY VOLTAGE – V V DD2 – OUTPUT SUPPLY VOLTAGE – V V IN – INPUT VOLTAGE – V

Figure 7. Gain Drift vs. Figure 8. Gain Drift vs. Figure 9. 200 mV Nonlinearity Error
VDD1 (VDD2 = 5 V). VDD2 (VDD1 = 5 V). Plot.

1-225
 dNL 200 – 200 mV NON-LINEARITY DRIFT – % PTS
dNL 200 – 200 mV NON-LINEARITY DRIFT – % PTS

dNL 200 – 200 mV NON-LINEARITY DRIFT – % PTS

0.15 0.06 0.06
MEAN MEAN MEAN
± 2 SIGMA ± 2 SIGMA ± 2 SIGMA
0.04
0.10 0.04

0.02
0.05 0.02

0 0
-0.02

-0.05 -0.02
-0.04

-0.10 -0.06 -0.04

-40 -20 0 20 40 60 80 100 4.4 4.6 4.8 5.0 5.2 5.4 5.6 4.4 4.6 4.8 5.0 5.2 5.4 5.6

TA – TEMPERATURE – °C V DD1 – INPUT SUPPLY VOLTAGE – V V DD2 – OUTPUT SUPPLY VOLTAGE – V

Figure 10. 200 mV Nonlinearity Drift Figure 11. 200 mV Nonlinearity Drift Figure 12. 200 mV Nonlinearity Drift
vs. Temperature. vs. VDD1 (VDD2 = 5 V). vs. VDD2 (VDD1 = 5 V).

0.15 4.0 0

0.10 -200
3.5
ERROR – % OF FULL-SCALE

VO – OUTPUT VOLTAGE – V

IIN – INPUT CURRENT – nA

0.05
3.0 -400

0 POSITIVE
2.5 OUTPUT -600
(PIN 7)
-0.05

2.0 NEGATIVE -800

-0.10 OUTPUT
(PIN 6)
1.5 -1000
-0.15
MEAN
± 2 SIGMA
-0.20 1.0 -1200
-0.10 -0.05 0 0.05 0.10 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 -0.2 -0.1 0 0.1 0.2

V IN – INPUT VOLTAGE – V V IN – INPUT VOLTAGE – V V IN – INPUT VOLTAGE – V

Figure 13. 100 mV Nonlinearity Error Figure 14. Typical Output Voltages vs. Figure 15. Typical Input Current vs.
Plot. Input Voltage. Input Voltage.

2 10.5 12.0
I DD2 – OUTPUT SUPPLY CURRENT – mA

TA = 85°C
I DD1 – INPUT SUPPLY CURRENT – mA

TA = 25°C
0 TA = -40°C
I IN – INPUT CURRENT – mA

10.0 11.5
-2

-4 9.5 11.0

-6
9.0 10.5
-8 TA = -40°C
TA = 25°C
TA = 85°C
-10 8.5 10.0
-6 -4 -2 0 2 4 6 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4
V IN – INPUT VOLTAGE – V V – INPUT VOLTAGE – V V IN – INPUT VOLTAGE – V
IN

Figure 16. Typical Input Current vs. Figure 17. Typical Input Supply Figure 18. Typical Output Supply
Input Voltage. Current vs. Input Voltage. Current vs. Input Voltage.

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 OPTOCOUPLERS
330 pF

5.11 K

+5 V +15 V

0.1 µF
78L05 HCPL-7800 0.1 µF
1 8
IN OUT
1.00 K
2 7 -
VOUT
0.1 µF 0.1 µF 3 6 OP-42
9V +
1.00 K
4 5

0.1 µF
5.11 K
330 pF

PULSE GEN. -15 V

+ -
V IM

Figure 19. Isolation Mode Rejection Test Circuit.

10
DELAY TO 90%
RISE/FALL TIME
DELAY TO 50%
8 DELAY TO 10%
1000 V
t – TIME – µs

V IM 0V
4

2
50 mV PERTURBATION
(DEFINITION OF FAILURE)

0
-40 -20 0 20 40 60 80 100
VO 0V
TA – TEMPERATURE – °C

Figure 20. Typical IMR Failure Waveform. Figure 21. Typical Propagation Delays
and Rise/Fall Time vs. Temperature.

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 V IN 50%
t PD90
t PD50
t PD10

90%

V OUT 50%

10%

t R/F
10.0 K

+5 V +5 V +15 V

0.1 µF
0.1 µF HCPL-7800 0.1 µF
1 8
2.00 K
V IN 2 7 -
V OUT
3 6 + OP-42
0.01 µF 2.00 K
4 5

0.1 µF
10.0 K

-15 V

Figure 22. Propagation Delay and Rise/Fall Time Test Circuit.

0 0 110 48 3.0
f -45° – 45 DEGREE PHASE BANDWIDTH – kHz

-5 NO BANDWIDTH LIMITING
3 dB BANDWIDTH
BANDWIDTH LIMITED TO 100 kHz
V N – RMS INPUT-REFERRED NOISE – mV

-10 45 DEGREE PHASE 2.5 BANDWIDTH LIMITED TO 10 kHz

f -3 dB – 3 dB BANDWIDTH – kHz

100 BANDWIDTH 44
RELATIVE AMPLITUDE – dB

-1 -15
Ø – PHASE – DEGREES

2.0
90 40
-2 -30 1.5

80 36
1.0
-3 -45
70 32
AMPLITUDE 0.5
PHASE

-4 -60 60 28 0
100 500 1000 5000 10000 50000 100000 -40 -20 0 20 40 60 80 100 0 50 100 150 200 250

f – FREQUENCY – Hz T A – TEMPERATURE – °C V IN – INPUT VOLTAGE – mV

Figure 23. Typical Amplitude and Figure 24. Typical 3 dB and 45° Figure 25. Typical RMS Input-Referred
Phase Response vs. Frequency. Bandwidths vs. Temperature. Noise vs. Input Voltage.

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 OPTOCOUPLERS
FLOATING
POSITIVE
SUPPLY
HV+ C5
75 pF
GATE DRIVE
CIRCUIT

R3
10.0 KΩ

+5 V
+15 V
IN OUT C8
U1 0.1 µF
78L05
C2 C4
C1 1 8 0.1 µF
0.1 µF 0.1 µF R1
2.00 KΩ
2 7
U2 -
R5 C3 HCPL-7800 U3 V OUT
39 Ω 0.01 µF 3 6 MC34081
MOTOR +
+ - 5 R2
4 2.00 KΩ
R SENSE C7
0.1 µF
C6 R4
75 pF 10.0 KΩ
-15 V

HV-

Figure 26. Recommended Application Circuit.

400
OUTPUT POWER, PS
INPUT POWER, PS
300
PS – POWER – mW

200

100

0
0 20 40 60 80 100 120 140 160 180
175
TA – TEMPERATURE – °C

Figure 27. Dependence of Safety-

Limiting Parameters on Ambient
Temperature.

Applications Information signal is decoded and converted the converter data to be

Functional Description into accurate analog voltage transmitted, essentially converting
Figure 28 shows the primary levels, which are then filtered to the widths of the sigma-delta
functional blocks of the HCPL- produce the final output signal. output pulses into the positions
7800. In operation, the sigma- of the encoder output pulses. A
delta analog-to-digital converter To help maintain device accuracy significant benefit of this coding
converts the analog input signal over time and temperature, scheme is that any non-ideal
into a high-speed serial bit internal amplifiers are chopper- characteristics of the LED (such
stream, the time average of which stabilized. Additionally, the as non-linearity and drift over
is directly proportional to the encoder circuit eliminates the time and temperature) have little,
input signal. This high speed effects of pulse-width distortion of if any, effect on the performance
stream of digital data is encoded the optically transmitted data by of the HCPL-7800.
and optically transmitted to the generating one pulse for every
detector circuit. The detected edge (both rising and falling) of

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Circuit Information µF capacitors close to the exhibit better offset performance
The recommended application isolation amplifier. In either case, than op-amps with JFET or
circuit is shown in Figure 26. A it is recommended that twisted- MOSFET input stages.
floating power supply (which in pair wire be used to connect the
many applications could be the isolation amplifier to the current- In addition, the op-amp should
same supply that is used to drive sensing resistor to minimize also have enough bandwidth and
the high-side power transistor) is electro-magnetic interference of slew rate so that it does not
regulated to 5 V using a simple the sense signal. adversely affect the response
three-terminal voltage regulator. speed of the overall circuit. The
The input of the HCPL-7800 is To obtain optimal CMR perfor- post-amplifier circuit includes a
connected directly to the current mance, the layout of the printed pair of capacitors (C5 and C6)
sensing resistor. The differential circuit board (PCB) should that form a single-pole low-pass
output of the isolation amplifier is minimize any stray coupling by filter; these capacitors allow the
converted to a ground-referenced maintaining the maximum bandwidth of the post-amp to be
single-ended output voltage with a possible distance between the adjusted independently of the gain
simple differential amplifier input and output sides of the and are useful for reducing the
circuit. Although the application circuit and ensuring that any output noise from the isolation
circuit is relatively simple, a few ground plane on the PCB does not amplifier. Many different op-amps
general recommendations should pass directly below the HCPL- could be used in the circuit,
be followed to ensure optimal 7800. An example single-sided including: MC34082A (Motorola),
performance. PCB layout for the recommended TL032A, TLO52A, and TLC277
application circuit is shown in (Texas Instruments), LF412A
As shown in Figure 26, 0.1 µF Figure 29. The trace pattern is (National Semiconductor).
bypass capacitors should be shown in “X-ray” view as it would
located as close as possible to the be seen from the top of the PCB; The gain-setting resistors in the
input and output power supply a mirror image of this layout can post-amp should have a tolerance
pins of the HCPL-7800. Notice be used to generate a PCB. of 1% or better to ensure
that pin 2 (VIN+) is bypassed with adequate CMRR and adequate
a 0.01 µF capacitor to reduce An inexpensive 78L05 three- gain tolerance for the overall
input offset voltage that can be terminal regulator is shown in the circuit. Resistor networks can be
caused by the combination of recommended application circuit. used that have much better ratio
long input leads and the switched- Because the performance of the tolerances than can be achieved
capacitor nature of the input isolation amplifier can be affected using discrete resistors. A resistor
circuit. by changes in the power supply network also reduces the total
voltages, using regulators with number of components for the
With pin 3 (VIN-) tied directly to tighter output voltage tolerances circuit as well as the required
pin 4 (GND1), the power-supply will result in better overall circuit board space.
return line also functions as the performance. Many different
sense line for the negative side of regulators that provide tighter The current-sensing resistor
the current-sensing resistor; this output voltage tolerances than the should have a relatively low value
allows a single twisted pair of 78L05 can be used, including: of resistance to minimize power
wire to connect the isolation TL780-05 (Texas Instruments), dissipation, a fairly low
amplifier to the sense resistor. In LM340LAZ-5.0 and LP2950CZ- inductance to accurately reflect
some applications, however, 5.0 (National Semiconductor). high-frequency signal compo-
better performance may be nents, and a reasonably tight
obtained by connecting pins 2 The op-amp used in the external tolerance to maintain overall
and 3 (VIN+ and VIN-) directly post-amplifier circuit should be of circuit accuracy. Although
across the sense resistor with sufficiently high precision so that decreasing the value of the sense
twisted pair wire and using a it does not contribute a significant resistor decreases power
separate wire for the power amount of offset or offset drift dissipation, it also decreases the
supply return line. Both input relative to the contribution from full-scale input voltage making
pins should be bypassed with 0.01 the isolation amplifier. Generally, iso-amp offset voltage effects
op-amps with bipolar input stages more significant. These two

1-230
 OPTOCOUPLERS
conflicting considerations, Figures 30 and 31 illustrate the the time scale is different from
therefore, must be weighed response of the overall isolation the previous figures). The first
against each other in selecting an amplifier circuit shown in Figure wave form is the output of the
appropriate sense resistor for a 26. Figure 30 shows the response application circuit with the filter
particular application. To of the circuit to a ± 200 mV 20 capacitors removed to show the
maintain circuit accuracy, it is kHz sine wave input and Figure actual response of the isolation
recommended that the sense 31 the response of the circuit to a amplifier. The second wave form
resistor and the isolation amplifier ± 200 mV 20 kHz square wave is the response of the same circuit
circuit be located as close as input. Both figures demonstrate with the capacitors installed. The
possible to one another. Although the fast, well-behaved response of recovery time and overshoot are
it is possible to buy current- the HCPL-7800. relatively independent of the
sensing resistors from established amplitude and polarity of the
vendors (e.g., the LVR-1, -3 and Figure 32 shows how quickly the overdrive signal, as well as its
-5 resistors from Dale), it is also isolation amplifier recovers from duration.
possible to make a sense resistor an overdrive condition generated
using a short piece of wire or by a 2 kHz square wave swinging For more information, refer to
even a trace on a PC board. between 0 and 500 mV (note that Application Note 1059.

VOLTAGE CLOCK VOLTAGE

REGULATOR GENERATOR REGULATOR
ISOLATION
BOUNDARY

ISO-AMP Σ∆ ENCODER LED DRIVE DETECTOR DECODER FILTER ISO-AMP

INPUT MODULATOR CIRCUIT CIRCUIT AND D/A OUTPUT

Figure 28. HCPL-7800 Block Diagram.

Figure 29. PC Board Trace Pattern and Loading Diagram Example.

1-231
 Figure 30. Application Circuit Sine Wave Response.

Figure 31. Application Circuit Square Wave Response.

Figure 32. Application Circuit Overload Recovery Waveform.

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