This article has been accepted for publication in a future issue of this journal, but has not been

fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TVT.2019.2905583, IEEE
Transactions on Vehicular Technology

A Single-Switch Transformerless DC-DC

Converter with Universal Input Voltage for
Fuel Cell Vehicles: Analysis and Design
Nour Elsayad, Student Member, IEEE, Hadi Moradisizkoohi, Student Member, IEEE
and Osama Mohammed, Fellow, IEEE

Abstract—A new single-switch high step-up dc-dc

converter is proposed in this paper for fuel cell vehicles.
The proposed topology utilizes a L2C3D2 network to obtain
high voltage gain and reduce the voltage stress on the
power switch. Additionally, the proposed converter has a
universal input voltage in order to suit the soft output
characteristics of the fuel cell. Comprehensive analyses of
the steady-state operation in continuous conduction mode
(CCM) and discontinuous conduction mode (DCM), and
design considerations of the proposed converter are given.
Finally, a 400 V/1.6 kW scaled-down prototype is developed
to validate the effectiveness and feasibility of the proposed
converter. Fig. 1. Typical fuel cell-powered EV.

many applications due to its simple operation and low

Index Terms—DC-DC converter, universal input voltage,
boost, fuel cell, electric vehicle, transformerless. component count. Theoretically, its voltage gain extends from
unity (at duty cycle=0) to infinity (at duty cycle=1). However,
I. INTRODUCTION due to the conduction losses its output voltage and efficiency
drop significantly at extreme duty cycle values. Additionally,
W ITH the increasing efforts to decrease the dependency on
the depleting fossil fuels and the growing acceptance of
clean energy sources adoption, a lot of research has been
the voltage stress on its power switch equals the output voltage,
while the current stress equals the input current, which yields a
non-efficient power conversion process at high step-up gains
focused on the electrification of transportation means [1]-[3].
[11].
Fuel cell-powered electric vehicles (EVs) are an important
Many high step-up dc-dc converter topologies have been
player in the clean energy vehicles segment and they have the
discussed in literature [12], and can generally be classified into
following advantages: clean electrical energy generation
topologies with magnetic coupling and topologies without
with zero emissions, high energy conversion efficiency, and a
magnetic coupling. The topologies with magnetic coupling
higher range compared to battery-powered EVs [4]-[7]. On the
utilize either a high frequency transformer or a coupled inductor
other hand, the fuel cell has a relatively low output voltage and
to achieve high conversion ratios and reduce the voltage stress
high current, and it has soft output characteristics as its output
on the power switches via the turns ratio of the magnetic
voltage drops as the output current increases [7], [8]. Therefore,
coupling component [13], [14]. Nevertheless, in single-stage
the fuel cell cannot be directly interfaced to the dc-link bus
single-switch topologies with magnetic coupling components,
(400V) of the inverter inside the EV [4], [7]. The fuel cell
the energy stored in the leakage inductance of the magnetic
requires a high step-up dc-dc converter to interface it to dc-link
coupling component may cause high voltage spikes across the
of the inverter, as shown in Fig. 1. This dc-dc converter should
power switch, high switching losses, and increase the EMI [15]-
have a universal input voltage feature with wide voltage gain
[17]. To alleviate this problem, regenerative snubber circuits or
range to suit the soft output characteristics of the fuel cell.
active clamp circuits should be utilized to recycle the stored
Additionally, this dc-dc converter has to have low input
leakage inductance energy, which will increase the circuit
current ripple to prolong the life time of the fuel cell [9], and a
complexity and cost [16]-[17]. On the other side, the topologies
common ground between its input and output ports to avoid
without magnetic coupling commonly have lower volume,
additional EMI and maintenance safety problems [10].
lower cost, and less circuit complexity. The three-level boost
The conventional boost converter is commonly adopted in

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TVT.2019.2905583, IEEE
Transactions on Vehicular Technology

Fig. 2. The schematic of the proposed converter.

converter has gained a lot of interests recently due to its low

voltage stress on the semiconductor devices (=half the output
voltage). However, its gain is limited as the conventional boost
and the potential difference between the grounds of its input and
output ports is a high frequency pulse-width-modulation
(PWM) voltage which may increase the EMI and require (a) (b)
additional maintenance [18]. Boost converters with z-source or Fig. 3. Key waveforms of the proposed converter. (a) CCM operation.
(b) DCM operation.
quasi-z-source networks have emerged as high step-up
solutions where an impedance network replaces the boost L2C3D2 network and has the following advantages: high step-up
inductor in order to enhance the voltage gain of the converter gain, low voltage stress on the semiconductor devices, common
[19]-[23]. The main drawback of these converters is the limited ground, and low input current ripple.
allowed duty cycle range (e.g. the maximum duty cycle dmax = TABLE I
0.5, as in [19], [20], dmax = 0.33, as in [21], [22], and dmax = 0.41, SWITCHING STATES OF THE SEMICONDUCTOR DEVICES
as in [23]). In [24], a hybrid switched-inductor converter is
discussed, and it is composed of active and passive switched Switching state Q D1 D2 D3
inductor networks. This converter can achieve high conversion I (CCM & DCM) ON OFF OFF OFF
ratios, however, it utilizes two power switches and there is a II (CCM & DCM) OFF ON ON ON
high frequency PWM potential difference between the grounds III (DCM) OFF OFF OFF OFF
of its input and output ports. In [25], a voltage-lift based boost
converter is presented. This converter has a high voltage gain, This paper is organized as follows: In Section II, the structure
common ground, and low voltage stress on the power switch. and operating principle of the proposed dc-dc converter are
Nevertheless, the input current ripple of this converter is high, presented. Steady-state analysis in CCM and DCM are
hence, an additional input filter may be needed, which will discussed in Section III. In Section IV, the design
increase the weight and size of the converter. In [7], a boost considerations and components selection are presented. The
converter with a diode-capacitor multiplier cells is discussed. experimental results measured from the scaled-down prototype
are presented and analyzed in Section V. Finally, the conclusion
This converter has a low input current ripple, high conversion
is given in Section VI.
ratio, and low voltage stress on the power switch. The main
drawback for this converter is that the output voltage and the
II. STRUCTURE AND OPERATING PRINCIPLE OF THE
efficiency will drop as the number of multiplier cells increase
PROPOSED CONVERTER
due to the increased conduction losses of the diodes.
Alternatively, a quadratic boost converter is discussed in [26]. A. Configuration of the Proposed Converter
This converter has a very high voltage gain and a common The topology of the proposed converter is shown in Fig. 2. It
ground, however, the voltage stress on the power switch is high is composed of one power switch (Q), three diodes (D1, D2, and
and the input current ripple is high. In another way, the authors D3), three inductors (L1, L2, and L3), five capacitors (C1, C2, C3,
in [27] proposed a novel boost converter with high step-up C4, and Co), and R represents a resistive load. A conventional
voltage gain, low input current ripple, and low voltage stress on boost switching network is formed by (L1, Q, D1, and C3), and
the semiconductor devices. Nevertheless, this converter utilizes an L2C3D2 network formed by (L2, L3, C1, C2, C4, D2, and D3) is
two power switches and has a high frequency PWM potential integrated between the conventional boost switching network
difference between the grounds of its input and output ports. and the output capacitor Co. The L2C3D2 network enhances the
In this paper, a new single-switch transformerless boost dc-dc voltage gain of the proposed converter and reduces the voltage
converter is proposed. The proposed converter utilizes a stress on the power switch.

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TVT.2019.2905583, IEEE
Transactions on Vehicular Technology

(a) (b) (c)

Fig. 4. Equivalent circuits of the proposed converter. (a) Switching state I. (b) Switching state II. (c) Switching state III.

B. Switching States Analysis

Fig. 4(b) shows the current flow paths for this switching state.
According to the conduction states of the semiconductor By applying KVL and KCL laws on the equivalent circuit
devices, the operation of the proposed converter can be divided depicted in Fig. 4(b), we can extract the following relationships:
into three switching states, as shown in Table I. In this analysis,
𝑉𝐿1 = 𝑉𝑖𝑛 − 𝑉𝐶3
the following abbreviations are used: Vin, Vo, VC1, VC2, VC3, VC4,
VL1, VL2, VL3, IL1, IL2, IL3 and Io, to refer to the input voltage, the { 𝑉𝐿2 = −𝑉𝐶1 = −𝑉𝐶4 (3)
output voltage, the instantaneous voltages across L1, L2, and L3, 𝑉𝐿3 = −𝑉𝐶2
the dc currents flowing through L1, L2, and L3, and the output
current, respectively. Additionally, iC1_ch, iC1_dis, iC2_ch, iC2_dis, 𝑖𝐶1_𝑑𝑖𝑠 = 𝑖𝐶2_𝑑𝑖𝑠 + 𝐼𝐿3 + 𝑖𝐶4_𝑐ℎ − 𝐼𝐿2
iC3_ch, iC3_dis, iC4_ch, iC4_dis, iCo_ch, and iCo_dis, refer to the charging {𝑖𝐶3_𝑐ℎ = 𝐼𝐿1 − 𝑖𝐶1_𝑑𝑖𝑠 − 𝐼𝐿2 + 𝑖𝐶4_𝑐ℎ (4)
and discharging currents of the five capacitors. For convenience 𝑖𝐶𝑜_𝑐ℎ = 𝑖𝐶2_𝑑𝑖𝑠 + 𝐼𝐿3 − 𝐼𝑜
of analysis, the following assumptions are made:
- The power switch and diodes are ideal. 3) Switching State III:
- The equivalent series resistances of the inductors and This switching state is for DCM operation and it takes place
capacitors equal zero. when Vgs is low, Q is turned off, and all the diodes are reverse-
- The capacitors and inductors are large enough, so, the biased. Since all the semiconductor devices do not conduct in
small ripple principle can be applied. this switching state, a positive constant current IL1_min flows
1) Switching State I: through L1, and negative constant currents IL2_min, IL3_min flow
This switching state is for CCM and DCM operations and it through L2 and L3, as shown in Fig. 4(c). The summation of the
takes place when the gate voltage Vgs of the power switch is inductor currents is zero, and the voltages across the inductors
high, and Q is turned on. In this switching state, the three diodes in this switching state are null, as depicted in (5) and (6).
are reverse-biased, the three inductors are charging, C3 and C4 𝐼𝐿1_𝑚𝑖𝑛 + 𝐼𝐿2_𝑚𝑖𝑛 + 𝐼𝐿3_𝑚𝑖𝑛 = 0 (5)
are discharging, C1 and C2 are charging, and Co is discharging.
Fig. 4(a) shows the current flow paths for this switching state. 𝑉𝐿1 = 0
By applying Kirchhof’s Voltage Law (KVL), and Kirchhof’s {𝑉𝐿2 = 0 (6)
Current Law (KCL) on the equivalent circuit depicted in Fig. 𝑉𝐿3 = 0
4(a), we can extract the following relationships:
𝑉𝐿1 = 𝑉𝑖𝑛 III. STEADY STATE ANALYSIS OF THE PROPOSED
{ 𝐿2 = 𝑉𝐶3 − 𝑉𝐶1
𝑉 (1) CONVERTER
𝑉𝐿3 = 𝑉𝐶3 + 𝑉𝐶4 − 𝑉𝐶2 − 𝑉𝐶1
A. CCM Operation
𝑖𝐶1_𝑐ℎ = 𝐼𝐿2 + 𝐼𝐿3 The key waveforms for this operation is presented in Fig. 3(a).
𝑖𝐶2𝑐ℎ = 𝐼𝐿3 In this subsection, the voltage gain, the voltage stresses, the
𝑖𝐶3_𝑑𝑖𝑠 = 𝐼𝐿2 + 𝐼𝐿3 (2) current stresses, and the efficiency analysis of the proposed
𝑖𝐶4_𝑑𝑖𝑠 = 𝐼𝐿3 converter operating in CCM are extracted. The operation in
{ 𝑖𝐶𝑜_𝑑𝑖𝑠 = 𝐼𝑜 CCM is composed of switching state I (period = dT) and
switching state II (period = (1-d) T), where d and T are the duty
2) Switching State II:
cycle and the periodic switching time, respectively.
This switching state is for CCM and DCM operations and it
takes place when Vgs is low, and Q is turned off. . In this
1) Voltage Gain:
switching state, the three diodes are forward-biased, the three
By applying the voltage second principle on the inductors L1,
inductors are discharging, C3 and C4 are charging, C1 and C2 are
L2, and L3 and using equations (1) and (3), we can obtain (7)-
discharging, and Co is charging.
(9):

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𝑑 By means of (13)-(19), Fig. 4(a), and Fig. 4(b), the currents

𝑉𝐶1 = 𝑉𝐶2 = 𝑉𝐶4 = 𝑉 (7)
1 − 𝑑 𝑖𝑛 flowing through Q, D1, D2, and D3 can be described as
following:
1
𝑉𝐶3 = 𝑉 (8) 3
1 − 𝑑 𝑖𝑛 𝑖𝑄 = 𝐼𝐿1 + 𝐼𝐿2 + 𝐼𝐿3 = 𝐼 (20)
1−𝑑 𝑜
1
1 + 2𝑑 𝑖𝐷1 = 𝐼𝐿1 − 𝑖𝐶1_𝑑𝑖𝑠 = 𝐼 (21)
𝑉𝑜 = 𝑉 (9) 1−𝑑 𝑜
1 − 𝑑 𝑖𝑛 1
𝑖𝐷2 = 𝐼𝐿2 + 𝑖𝐶1_𝑑𝑖𝑠 − 𝐼𝐶2_𝑑𝑖𝑠 = 𝐼 (22)
Thus, the voltage gain MCCM can be calculated by (10): 1−𝑑 𝑜
𝑉𝑜 1 + 2𝑑 1
𝑀𝐶𝐶𝑀 = = (10) 𝑖𝐷3 = 𝑖𝐶2_𝑑𝑖𝑠 + 𝐼𝑜 = 𝐼 (23)
𝑉𝑖𝑛 1−𝑑 1−𝑑 𝑜
2) Analysis of Voltage Stress Using (10), equations (20)-(23) can be depicted as functions
The stress across the five capacitors is delivered by (7)-(9). of MCCM, as following:
As shown in Fig. 3(a), the voltage across the semiconductor 𝑖𝑄 = (𝑀𝐶𝐶𝑀 + 2) 𝐼𝑜 (24)
devices swings between 0V and VC3, hence the voltage stress
across the power switch VQ and the voltage stress across the 𝑀𝐶𝐶𝑀 + 2
𝑖𝐷1 = 𝑖𝐷2 = 𝑖𝐷3 = ( ) 𝐼𝑜 (25)
diodes VD can be obtained by (11): 3
1 The root-mean-square (rms) values of the currents flowing
𝑉𝑄 = VD = VC3 = 𝑉𝑖𝑛 (11)
1−𝑑 through the power switch, diodes, and capacitors are important
Additionally, using (10), and (11) the voltage stress across the in the efficiency analysis, and they can be extracted as
power switch and diodes can be represented as a function of following:
MCCM, as in (12):
𝑖𝑄_𝑟𝑚𝑠 = √(𝑀𝐶𝐶𝑀 + 2)(𝑀𝐶𝐶𝑀 − 1) 𝐼𝑜 (26)
2+𝑀𝐶𝐶𝑀
𝑉𝑄 = 𝑉𝐷 = 𝑉
3𝑀𝐶𝐶𝑀 𝑜
(12)
𝑀𝐶𝐶𝑀 + 2
3) Analysis of Current Stress 𝑖𝐷1_𝑟𝑚𝑠 = 𝑖𝐷2_𝑟𝑚𝑠 = 𝑖𝐷3_𝑟𝑚𝑠 = √ 𝐼𝑜 (27)
3
Assuming the input power equals the output power of the
converter (i.e. Vin  IL1 = Vo  Io), hence, the currents IL2, IL3, and 𝑀𝐶𝐶𝑀 − 1
IL1 can be calculated as in (13) and (14): 𝑖𝐶1_𝑟𝑚𝑠 = 𝑖𝐶3_𝑟𝑚𝑠 = 2√ 𝐼𝑜 (28)
3
IL2 = IL3 = 𝐼𝑜 (13)
𝑀𝐶𝐶𝑀 − 1
1+2𝑑 𝑖𝐶2_𝑟𝑚𝑠 = 𝑖𝐶4_𝑟𝑚𝑠 = 𝑖𝐶𝑜_𝑟𝑚𝑠 = √ 𝐼𝑜 (29)
IL1 = 𝐼𝑜 = 𝑀𝐶𝐶𝑀 𝐼𝑜 (14) 3
1−𝑑
By applying the charge-second balance principle on the five 4) Effect of Parasitic Elements on the Voltage Gain
capacitors to calculate the charging and discharging currents of In order to evaluate the effect of the parasitic elements of the
them, we can get (15)-(19): passive and active components of the proposed converter on its
𝑖𝐶1_𝑐ℎ = 2𝐼𝑜 voltage gain, some of these parasitic parameters were modeled
𝑑 𝑀𝐶𝐶𝑀 − 1 in the proposed converter circuit, shown in Fig. 5. In the non-
{ (15)
𝑖𝐶1_𝑑𝑖𝑠 = 2𝐼𝑜 = 2𝐼𝑜 ( ) ideal model of the converter, the following parameters are
(1 − 𝑑) 3
included: the resistances of the windings of inductors (rL1 = rL2
𝑖𝐶2_𝑐ℎ = 𝐼𝑜 = rL), the equivalent-series-resistances of capacitors (rC1 = rC2 =
{ 𝑑 𝑀𝐶𝐶𝑀 − 1 (16) rC3 = rC4 = rCo= rC), the on-resistance of the power switch (rS),
𝑖𝐶2_𝑑𝑖𝑠 = 𝐼𝑜 = 𝐼𝑜 ( ) the forward voltages of the diodes (VF1 = VF2 = VF3 = VF), and
(1 − 𝑑) 3
their respective on-resistances (rD1 = rD2 = rD3 = rD4 = rD). After
𝑑 𝑀𝐶𝐶𝑀 − 1 accounting for these parasitic parameters, the voltage gain of
𝑖𝐶3_𝑐ℎ = 2𝐼𝑜 = 2𝐼𝑜 ( )
{ (1 − 𝑑) 3 (17) the proposed converter in its non-ideal model (𝑀𝐶𝐶𝑀 ̀ ) is
𝑖𝐶3_𝑑𝑖𝑠 = 2𝐼𝑜 depicted by equation (30). Fig. 6 shows the graphical
comparison between the voltage gain curves using the ideal and
𝑑 𝑀𝐶𝐶𝑀 − 1
𝑖𝐶4_𝑐ℎ = 𝐼𝑜 = 𝐼𝑜 ( ) non-ideal models of the proposed converter, where the parasitic
{ (1 − 𝑑) 3 (18)
and operating parameters are considered as following: Vin =
𝑖𝐶4_𝑑𝑖𝑠 = 𝐼𝑜
50V, R = 100Ω, rL = 30mΩ, rC = 15mΩ, rS = 20mΩ, VF = 1V,
𝑑 𝑀𝐶𝐶𝑀 − 1 and rD = 70mΩ. It shows that the voltage gain of the non-ideal
𝑖𝐶𝑜_𝑐ℎ = 𝐼𝑜 = 𝐼𝑜 ( ) model of the converter is close to that of the ideal model when
{ (1 − 𝑑) 3 (19)
d is between 0 and 0.8 (where 𝑀𝐶𝐶𝑀 ̀ ≈ 13) which indicates the
𝑖𝐶𝑜_𝑑𝑖𝑠 = 𝐼𝑜
high step-up capability of the proposed converter.

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𝑅(1 − 𝑑)(𝑉𝑖𝑛 − 3𝑉𝐹 + 3𝑑 𝑉𝐹 + 2𝑑 𝑉𝑖𝑛 )

̀ =
𝑀𝐶𝐶𝑀 (30)
𝑉𝑖𝑛 [𝑅 + 3𝑟𝐷 + 3𝑟𝐿 + 𝑑(6𝑟𝐶 − 2𝑅 − 3𝑟𝐷 + 3𝑟𝑆 + 𝑑(𝑅 − 6𝑟𝐶 + 6𝑟𝐿 − 12𝑟𝑆 ))]

𝑑𝑇 𝑑𝑥 𝑇
1 𝑉𝑜 − 𝑉𝑖𝑛
(∫ 𝑉𝑖𝑛 𝑑𝑡 − ∫ 𝑑𝑡 ) = 0 (34)
𝑇 3
0 0
To solve (34) in order to extract the voltage gain in DCM, 𝑑𝑥
should be determined.
As shown in Fig. 7, and using equations (20)-(23), iQ equals
the summation of the three inductors’ currents, and the current
flowing in any of the three diodes equals one third iQ. Thus, the
peak diode current 𝑖𝐷(𝑃𝑒𝑎𝑘) can be calculated as following:
1
𝑖𝐷(𝑃𝑒𝑎𝑘) = (∆𝑖𝐿1 + ∆𝑖𝐿2 + ∆𝑖𝐿3 ) (35)
3
The three inductors’ currents in DCM can be calculated as:
𝑑𝑉𝑖𝑛
∆𝑖𝐿1 =
𝑓𝑠 𝐿1
𝑑𝑉𝑖𝑛
∆𝑖𝐿2 = (36)
Fig. 5. Equivalent circuit of the proposed converter with the parasitic 𝑓𝑠 𝐿2
elements. 𝑑𝑉𝑖𝑛
∆𝑖𝐿3 =
{ 𝑓𝑠 𝐿3
By substituting (36) into (35), we get (37):
𝑑𝑉𝑖𝑛
𝑖𝐷(𝑃𝑒𝑎𝑘) = (37)
3𝑓𝑠 𝐿𝑒𝑞
Where,
1 1 1 −1
𝐿𝑒𝑞 = ( + + ) (38)
𝐿1 𝐿2 𝐿3
The average current flowing through any of the three diodes
equals Io, hence, we get the following:
1 𝑉𝑜
𝑑𝑥 𝑖𝐷(𝑃𝑒𝑎𝑘) = (39)
2 𝑅
By substituting (37) into (39), we can get 𝑑𝑥 as following:
6𝑉𝑜
𝑑𝑥 = Ʈ (40)
Fig. 6. Voltage gain curves of the proposed converter. 𝑑𝑉𝑖𝑛
Where Ʈ is the normalized inductor time constant, defined as:
B. DCM Operation
𝐿𝑒𝑞 𝑓𝑠
The key waveforms for this operation is shown in Fig. 3(b). Ʈ= (41)
𝑅
In this subsection, the voltage gain in DCM, boundary operating
condition between CCM and DCM, and current stresses in By substituting (40) into (34), we get the following:
DCM are given. 𝑉𝑜
The operation in DCM is composed of Switching State I 𝑉𝑖𝑛 + (𝑉𝑖𝑛 − 𝑉𝑜 ) Ʈ=0 (42)
𝑑𝑉𝑖𝑛
(period = dT), Switching State II (period = dxT), and Switching
By solving this quadratic equation (42), the voltage gain in
State III (period = 1 − (𝑑 + 𝑑𝑥 )𝑇).
DCM 𝑀𝐷𝐶𝑀 can be extracted as in (43):
1) Voltage Gain
From (7)-(9), the capacitors’ voltages can be rewritten as: 1 2𝑑 2
𝑀𝐷𝐶𝑀 = (1 + √1 + ) (43)
𝑉𝑜 = 𝑉𝐶3 + 2𝑉𝐶2 (31) 2 Ʈ
𝑉𝑜 + 2𝑉𝑖𝑛
𝑉𝐶3 = 𝑉𝑖𝑛 + 𝑉𝐶2 = (32)
3 2) Boundary Operating Conduction
𝑉𝑜 − 𝑉𝑖𝑛 In boundary conduction mode (BCM) operation, MCCM equals
𝑉𝐶1 = 𝑉𝐶2 = 𝑉𝐶4 = (33) MDCM, and accordingly, from (10) and (43), the boundary
3
By means of (1), (3), (6), (31)-(33), and applying the voltage normalized inductor time constant Ʈ𝑏 can be obtained, as in
second principle on L1, we get the following: (44).

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Fig. 7. Power switch and diodes currents in DCM.

𝑑(1 − 𝑑)
Ʈ𝑏 = (44) Fig. 8. Boundary condition of the proposed converter.
12𝑑 + 6
The relationship between Ʈ𝑏 and d is presented in Fig. 8. If
Ʈ > Ʈ𝑏 , then the proposed converter is working in CCM.
3) Voltage Stress Analysis
As shown in Fig. 3(b), the voltage stress across Q during
Switching State I 𝑉𝑄 (𝐼) is null, while during Switching State II
𝑉𝑄 (𝐼𝐼) and Switching State III 𝑉𝑄 (𝐼𝐼𝐼) are expressed in (45):
𝑀𝐷𝐶𝑀 + 2
𝑉𝑄 (𝐼𝐼) = 𝑉𝐶3 = 𝑉𝑖𝑛
{ 3 (45)
𝑉𝑄 (𝐼𝐼𝐼) = 𝑉𝑖𝑛
The voltage stress across any of the three diodes during
Switching State II 𝑉𝐷 (𝐼𝐼) is null, while during Switching State I
𝑉𝐷 (𝐼) and Switching State III 𝑉𝐷 (𝐼𝐼𝐼) are shown in (46):
𝑀𝐷𝐶𝑀 + 2
𝑉𝐷 (𝐼) = 𝑉𝐶3 = 𝑉𝑖𝑛 (a)
{ 3 (46)
𝑀𝐷𝐶𝑀 − 1
𝑉𝐷 (𝐼𝐼𝐼) = 𝑉𝐶2 = 𝑉𝑖𝑛
3
4) Current Stress Analysis
Fig. 7 depict the currents flowing through the semiconductor
devices of the proposed converter in DCM. The peak currents
flowing through Q, and the diodes, iQ(Peak), and iD(Peak),
respectively, are expressed as shown in (47):
𝑑𝑉𝑖𝑛
𝑖𝑄(𝑃𝑒𝑎𝑘) = ∆𝑖𝐿1 + ∆𝑖𝐿2 + ∆𝑖𝐿3 =
𝑓𝑠 𝐿𝑒𝑞
(47)
1 𝑑𝑉𝑖𝑛
𝑖𝐷(𝑃𝑒𝑎𝑘) = (∆𝑖𝐿1 + ∆𝑖𝐿2 + ∆𝑖𝐿3 ) =
{ 3 3𝑓𝑠 𝐿𝑒𝑞
The rms currents of the power switch and diodes are expressed
in (48):
𝑑𝑉𝑖𝑛 𝑑 (b)
𝑖𝑄(𝑟𝑚𝑠) = √
𝑓𝑠 𝐿𝑒𝑞 3 Fig. 9. Comparison of voltage gain 𝑀𝐶𝐶𝑀 versus duty cycle d. (a) Between
(48) the proposed converter, conventional boost converter, converters in [25],
[26], and [28]. (b) Between the proposed converter, converters in [31], [32],
𝑑𝑉𝑖𝑛 𝑑𝑥
𝑖𝐷(𝑟𝑚𝑠) = √ [33], and [35].
{ 3𝑓𝑠 𝐿𝑒𝑞 3
switches and diodes, respectively, among the compared
C. Comparisons with Other Step-Up Converters
converters.
In this section, the proposed converter is compared with other In order to properly compare the added weight and size of
non-isolated step-up converters. The static voltage gain, the the capacitors and inductors used in each topology of the
normalized voltage stress across the semiconductor devices,
compared converters, the energy stored in inductors (EL) and
components counts, and the voltage gain range of these
the energy stored in capacitors (EC) are calculated for each
converters are summarized in Table II. Fig. 9 shows MCCM
versus d for the compared converters, while Fig. 10 and Fig. 11 converter in Table II at the same output power, switching
show the maximum normalized voltage stress across the power frequency, output voltage, voltage gain, and specific percentage

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TABLE II
COMPARISON BETWEEN THE PROPOSED AND OTHER STEP-UP DC-DC CONVERTERS

Voltage gain
Semiconductor Inductors & Input Common
Topology Voltage gain (M) VQ / Vo VD / Vo range
devices Capacitors current ground
d : 0 →0.9
1 1 Switches 1 Inductor
CBC 1 1 Continuous No 1→10
1−𝑑 1 Diodes 1 Capacitors
1 1 1
1 +√ − ,
1 1 1 2 4 𝑀 𝐶𝐶𝑀 2 Switches 2 Inductors
In [28] +√ − ,1 Continuous No -- →11
𝑑(1 − 𝑑) 2 4 𝑀 𝐶𝐶𝑀 3 1 1 3 Diodes 2 Capacitors
+√ −
2 4 𝑀 𝐶𝐶𝑀

1+𝑑 1+𝑀𝐶𝐶𝑀 1+𝑀𝐶𝐶𝑀 1 Switch 2 Inductors

In [25] Pulsating Yes 1→19
1−𝑑 2𝑀𝐶𝐶𝑀 2𝑀𝐶𝐶𝑀 3 Diodes 3 Capacitors
𝑀𝐶𝐶𝑀 −1
1 1, √1 − ,
𝑀𝐶𝐶𝑀 1 Switch 2 Inductors
In [26] 1 Pulsating Yes 1→100
(1 − 𝑑)2 𝑀𝐶𝐶𝑀 −1 3 Diodes 2 Capacitors
1-√1 −
𝑀𝐶𝐶𝑀
2 1 1 2 Switches 2 Inductors
In [31] ,1 Pulsating No 2→20
1−𝑑 2 2 2 Diodes 2 Capacitors
2 1 1 1 Switch 1 Inductor
In [32] Continuous Yes 2→20
1−𝑑 2 2 3 Diodes 3 Capacitors
3−𝑑 𝑀𝐶𝐶𝑀 − 1 𝑀𝐶𝐶𝑀 − 1 1 Switch 1 Inductor
In [33] Pulsating No 3→21
1−𝑑 2𝑀𝐶𝐶𝑀 2𝑀𝐶𝐶𝑀 4 Diodes 4 Capacitors
1 + 3𝑑 3 + 𝑀𝐶𝐶𝑀 3 + 𝑀𝐶𝐶𝑀 2 Switches 3 Inductors
In [35] Pulsating No 1→37
1−𝑑 4𝑀𝐶𝐶𝑀 2𝑀𝐶𝐶𝑀 2 Diodes 3 Capacitors

1 + 2𝑑 2 + 𝑀𝐶𝐶𝑀 2 + 𝑀𝐶𝐶𝑀 1 Switch 3 Inductors

Proposed Continuous Yes 1→28
1−𝑑 3𝑀𝐶𝐶𝑀 3𝑀𝐶𝐶𝑀 3 Diodes 5 Capacitors

of ripple current in inductors and ripple voltage in capacitors.

The stored energy in the inductors of a converter can be
calculated by (49), where dM is the value of duty cycle at the
specific voltage gain, ∆𝐿 % is the percentage of ripple current,
VLi is the voltage across inductor Li when the main switch is on,
and ILi is the dc current flowing in inductor Li.
2
𝐿𝑖 𝐼𝐿𝑖 𝐼𝐿𝑖 𝑑𝑀 𝑉𝐿𝑖
𝐸𝐿 = ∑ =∑ ( ) (49)
2 2 ∆𝐿 % 𝑓𝑠
The stored energy in the capacitors of a converter can be
calculated by (50), where ∆𝐶 % is the percentage of ripple
voltage, iCi is the current of capacitor Ci when the main switch
is on, and VCi is the dc voltage of capacitor Ci.
𝐶𝑖 𝑉𝐶𝑖2 𝑉𝐶𝑖 𝑑𝑀 𝑖𝐶𝑖 Fig. 10. Normalized maximum voltage stress across the power switches in
𝐸𝐶 = ∑ =∑ ( ) (50) the compared converters
2 2 ∆𝐶 % 𝑓𝑠
In order to compare the estimated cost of the semiconductor
devices used in the converters in Table II, the utilization factor
of these semiconductor devices (US) is used, and it is defined as
given in (51):
𝑃𝑜
𝑈𝑆 = (51)
∑ 𝑉𝐾𝑖 𝐼𝐾𝑖 (𝑟𝑚𝑠)
Where VKi is the voltage stress on a semiconductor device Ki,
and IKi (rms) is the rms value of the current stress on
semiconductor device Ki. Fig. 12, Fig. 13, and Fig. 14 show the
energy stored in inductors and capacitors and the
semiconductor utilization factor for the compared converters in
Table II, respectively, when Vo = 400V, Po = 1.6kW, fs =
100kHz, ∆𝐿 % = 25%, ∆𝐶 % = 10% (for the output capacitors) Fig. 11. Normalized maximum voltage stress across the diodes in the
compared converters

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Fig. 12. Stored energy in the inductors of the compared converters at Fig. 14. Semiconductor utilization factor of the compared converters at
different voltage gain values. different voltage gain values.

side, it utilizes an extra power switch compared to the proposed

converter, has a pulsating input current, does not have a
common ground, and the voltage stress on its output diode is
high. The voltage gain of the proposed converter is higher for d
> 0.5, and the voltage stress on the semiconductor devices of
the proposed converter is less for d > 0.5, compared to the
converter II in [31]. The boost converter that utilizes diode-
capacitor voltage multipliers in [32] has less inductors
compared to the proposed converter, however, to increase its
voltage gain, the number of diodes of the voltage multipliers
duplicates, leading to increased conduction losses and
decreased efficiency. Additionally, as the number of voltage
multipliers increases, the minimum boosting gain increases,
Fig. 13. Stored energy in the capacitors of the compared converters at rendering it not sufficient for applications with wide voltage
different voltage gain values. fluctuations such as fuel cells. Comparing the hybrid boost
and 20% (for the middle capacitors), and MCCM = 4 → 8. converter in [33] with the proposed converter, the number of
Comparing the proposed converter with the conventional boost inductors and capacitors in the converter in [33] is less, while it
converter (CBC), on one hand, the CBC has lower number of utilizes an extra diode. The input current ripple of the converter
diodes and passive components, on the other hand, the proposed in [33] is high which can affect the life time of the fuel cell.
converter has higher voltage gain, lower voltage stress on the Additionally, the proposed converter has higher voltage gain for
semiconductor devices, and wider voltage gain range. The d > 0.65, and less voltage stress on the semiconductor devices
converter in [28], is composed of less number of inductors and for MCCM > 7 compared to the converter in [33]. The converter
capacitors, however, it utilizes an extra power switch compared presented in [35] has less capacitors, less diodes, and an extra
to the proposed converter, does not have a common ground and power switch compared to the proposed converter. Also, it has
has a high voltage stress on the output diode. Additionally, the a wider voltage gain range, and less voltage stress on the
converter in [28] has a narrower voltage gain range and its semiconductor devices. The main drawbacks of this converter
voltage gain is less compared to the proposed converter for d > are the higher number of power switches, the pulsating input
0.5. In [25], the voltage lift-based converter has the same current and the lack of common ground between its input and
number of semiconductor devices, and utilizes less capacitors output ports, as the potential difference between the two
and less inductors compared to the proposed converter. grounds is high frequency PWM voltage which can increase the
Nevertheless, the converter in [25] has high input current ripple, EMI and requires more maintenance.
narrower voltage gain range, less voltage gain, and higher Based on Fig. 12, the energy stored in the inductors of the
voltage stress on its power switch and diodes compared to the proposed converter is the same as the CBC, while it is lower
proposed converter. The quadratic converter presented in [26], than that of the converters in [25], [26], and [28], and is higher
on one hand has higher voltage gain and less number of than that of the converters in [31], [32], [33], and [35]. This
inductors and capacitors compared to the proposed converter, means that the estimated weight and size of inductors for the
and on the other hand it has high input current ripple and higher proposed converter is close to that of the CBC while it is lower
voltage stress on the power switch. In [31], converter II, on one than that of the converters in [25], [26], and [28], and is higher
side has double the voltage gain of the conventional boost than that of the converters in [31], [32], [33], and [35].
converter and utilizes less number of diodes, inductors, and Similarly, based on Fig. 13, the energy stored in the capacitors
capacitors compared to the proposed converter, but on the other of the proposed converter is lower than that of the converters in

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[25], [31], [33] and [28] (when MCCM < 6.5), while it is higher V. EXPERIMENTAL RESULTS AND ANALYSIS
than that of the CBC and the converters in [26], [32], and [35]. In order to validate the theoretical analysis of the proposed
This means that the estimated weight and size of capacitors for converter, a scaled-down 1.6kW laboratory prototype was built,
the proposed converter is lower than that of the converters in presented in Fig. 15. The input voltage to the converter is
[25], [31], [33], and [28] (when MCCM < 6.5), and is higher than depicted by an adjustable dc power supply, and the converter is
that of the converters in [26], [32], and [35]. Fig. 14 shows that controlled by a microcontroller TMS320f28377s.
the proposed converter has the highest utilization factor The power circuit is built using (IXFP72N30X3M) power
compared to all the converters in Table II, which means that the MOSFET and (MBRF40250TG) Schottky diodes. The values
estimated cost of the semiconductor devices of the proposed of inductors and capacitors used in the developed prototype are
converter is lower than that of the other compared converters. as following: L1 = L2 = L3 = 250 µH, C1 = C2 = 40 µF, C3 = C4 =
From the above comparisons, it is evident that the proposed 220 µF, and Co = 240 µF. In addition, the load R = 100Ω, and
converter integrates many advantages such as: high conversion switching frequency fs = 100 KHz. The case study investigated
ratio, wide voltage gain range, low voltage stress on the in this section is Vin = 50V, and the duty cycle d = 0.7.
semiconductor devices, common ground between its input and
According to equations (7)-(9), the voltages across the five
output ports, low input current ripple, and utilizes a single
capacitors can be calculated as following: VC1 = VC2 = VC4 ≈
power switch. This makes it an excellent candidate for fuel cell
116.7V, VC3 ≈ 166.7V, and Vo ≈ 400V, which closely agree with
vehicles application.
the experimental results in Fig. 16(c) and Fig. 16(d). The output
𝑉
IV. DESIGN CONSIDERATIONS AND COMPONENTS current can be theoretically calculated as: Io = 𝑜⁄𝑅 = 4A, which
SELECTION agrees with the experimental result shown in Fig.16 (d).
A. Semiconductor Devices Selection Accordingly, the currents of the three inductors can be
calculated using (13) and (14), as following: IL2 = IL3 = Io = 4A,
By knowing the maximum value of MCCM (max) needed by
and IL1 = 32A, which closely agree with the experimental results
the converter, and the maximum output load current, the peak
currents flowing through the power switch and diodes can be shown in Fig. 16(a) and Fig. 16(b). Additionally, the ripple
calculated using (24) and (25), respectively. From (12), the currents of the three inductors can be calculated using (52), as
maximum voltage stress on the power switch and diodes can be
TABLE III
calculated when MCCM (max) is known. These maximum EXPERIMENT PARAMETERS
voltage and current stresses should be within the safe operating
area (SOA) of the selected power switch and diodes. Parameters and Components Values
Rated power Po 1.6 kW
B. Inductors Design Output voltage Vo 400V
By knowing the maximum output load current and by means Power MOSFET Q IXFP72N30X3M
Power Diodes D1, D2, D3 MBRF40250TG
of (13) and (14), the currents flowing through the three Inductors L1, L2, L3 250 µH
inductors can be calculated. Assuming the maximum ripple Capacitors C1, C2 40 µF
currents ∆𝑖𝐿1 , ∆𝑖𝐿2 , and ∆𝑖𝐿3 are known. The minimum required Capacitors C3, C4 220 µF
inductances can be determined using (52). Capacitor Co 240 µF
Switching frequency fs 100 KHz
𝑑𝑉𝑖𝑛 Load R 100Ω
𝐿1 ≥ Microcontroller TMS320f28377s
𝑓𝑠 ∆𝑖𝐿1
𝑑𝑉𝑖𝑛
𝐿2 ≥ (52)
𝑓𝑠 ∆𝑖𝐿2
𝑑𝑉𝑖𝑛
𝐿3 ≥
{ 𝑓𝑠 ∆𝑖𝐿3

C. Capacitors Design
By means of (7)-(9), the voltages across the five capacitors
can be calculated. Assuming the maximum ripple voltages
∆𝑉𝐶1 , ∆𝑉𝐶2 , ∆𝑉𝐶3 , ∆𝑉𝐶4 and ∆𝑉𝐶𝑜 are known. The minimum
required capacitances can be determined using (53).
2𝐼𝑜 𝑑
𝐶1 ≥
𝑓𝑠 ∆𝑉𝐶1 𝐼𝑜 𝑑
𝐶4 ≥
𝐼𝑜 𝑑 𝑓𝑠 ∆𝑉𝐶4
𝐶2 ≥ , (53)
𝑓𝑠 ∆𝑉𝐶2 𝐼𝑜 𝑑
𝐶𝑜 ≥
2𝐼𝑜 𝑑 { 𝑓𝑠 ∆𝑉𝐶𝑜
𝐶3 ≥
{ 𝑓𝑠 ∆𝑉𝐶3 Fig. 15. Experimental prototype.

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(a) (b) (c)

(d) (e) (f)

(g) (h) (i)

Fig. 16. Experimental results. (a) Current of L1, and voltage stress across Q, (b) Currents of L2 and L3, (c) Voltages across C1, C2, C3, and C4, (d) Output voltage
and output current, (e) Voltage stresses across D1, D2, and D3, (f) Current stresses of Q and D1, (g) Current stresses of D2 and D3. (h) Dynamic performance of
the output voltage with input voltage variation. (i) Dynamic performance of the input current with input voltage variation.

following: ∆𝑖𝐿1 = ∆𝑖𝐿2 = ∆𝑖𝐿3 = 1.4A, which comply with the shows that IL1 = 40A when Vin = 40V, while IL1 ≈ 13.3A when
experimental results presented in Fig. 16(a) and Fig. 16(b). The Vin = 120V, as IL1 is directly proportional to the voltage gain of
voltage stresses across the power switch and the three diodes the converter (when the output current is constant). The results
can be calculated using equation (11), as following: VQ = VD1 = given in Fig. 16(h) and Fig. 16(i) show evidently that the
VD2 = VD3 ≈ 166.7V, which closely comply with the proposed converter has an acceptable dynamic performance
experimental results given in Fig. 16(a) and Fig. 16(e). The under wide changes in its input voltage.
current stresses on the power switch and the three diodes can be In order to build the initial voltages across the capacitors of
derived via equations (20) and (21), as following: iQ = 40A, and the proposed converter without having high inrush currents that
iD1 = iD2 = iD3 ≈ 13.3A, which closely agree with the may damage the semiconductor devices, a soft-starting
experimental results shown in Fig. 16(f) and Fig.16 (g). algorithm is adopted. This soft-starting algorithm gradually
In order to test the wide-input feature of the proposed increases the value of duty cycle from zero to the desired value
converter, Fig. 16(h) shows the input voltage of proposed during the starting instant. Fig. 17 shows the currents of the
converter changed from 40V to 120V, while the output voltage three inductors and the voltages of the five capacitors during the
is fixed at 400V. In this test, the converter is controlled by a soft start and during steady state. Based on these results, the
closed-loop proportional-integral (PI) voltage controller. Fig. converter appears to not have high inrush inductor currents
16(i) shows the effect of the change in the input voltage from during the start instant, and the capacitor voltages increase
40V to 120V on the input current (current flowing in L1) and it gradually without having high voltage overshoots during the

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(a) (b) (c)

Fig. 17. (a) Inductor currents during start-up, (b) Voltages across C1, C2, and C4 during start-up, (c) Voltages across C3 and Co during stat-up,

powers (Po = 800W, 1200W, and 1600W), while keeping Vo

fixed at 400V, are shown in Fig. 19. The measured efficiency
curves are obtained using a power analyzer (Tektronix
PA3000). The maximum recorded efficiency is 97.8%, when Po
= 800W and Vin = 120V, while the minimum recorded
efficiency is 92.5%, when Po = 1600W and Vin = 40V.

VI. CONCLUSION
Fig. 18. Calculated power loss distributions for the experiment (Vin = 50V, In this paper, a new single-switch dc-dc converter with an
Vo = 400V, and R = 100Ω). integrated L2C3D2 network is presented. The proposed converter
has many merits such as: high voltage gain without magnetic
coupling, low voltage stress on the semiconductor devices,
common ground, and universal input voltage. These features
make it an excellent candidate for fuel cell vehicles. Steady-
state analyses in CCM and DCM operations of the proposed
converter were discussed. The proposed converter is compared
with other step-up converters in literature regarding the voltage
gain, the voltage stress on the semiconductor devices, the
number of components, and other specifications, and the
privilege of the proposed topology is justified. Finally, a 1.6 kW
400V prototype for the proposed topology was built, and the
theoretical analysis was verified by the experimental results.

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0018-9545 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TVT.2019.2905583, IEEE
Transactions on Vehicular Technology

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"Step-Up DC–DC Converters: A Comprehensive Review of Voltage- DC Converter With Active Switched-Inductor and Passive Switched-
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29, no. 6, pp. 2829 - 2836, Jun. 2014. degrees in electrical engineering from Ain
[14] R. Moradpour, H. Ardi, and A. Tavakoli, " Design and Implementation of Shams University, Cairo, Egypt, in 2010 and
a New SEPIC-Based High Step-Up DC/DC Converter for Renewable 2014, respectively. He is currently working
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Mar. 2008.
bidirectional dc-dc converters, wide-input dc-dc converters, multilevel
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[18] X. Ruan, B. Li, Q. Chen, S. Tan, and C. K. Tse, “Fundamental and M.S degree from Amirkabir University of
considerations of three-level DC–DC converters: topologies, analyses, Technology, Tehran, Iran in 2013. He is
and control,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 55, no. 11, currently working as a Graduate Assistant
pp. 3733–3743, Dec. 2008. pursuing his Ph.D. in the Department of
[19] D. Vinnikov, I. Roasto, “Quasi-Z-source based dc/dc converters for Electrical and Computer Engineering, Florida
distributed power generation,” IEEE Trans. Ind. Electron., vol. 58, no.1, International University, Miami, FL, USA. His
pp. 192-201, Jan. 2011. research interests include power converters for
[20] M. M. H. Esmaeili, E. Babaei, and M. Sabahi, “High Step-Up Quasi-Z renewable energy applications, electric vehicle powertrain system, and
Source DC-DC Converter,” IEEE Trans. Pow. Electron., Feb. 2018. High-efficiency converters using wide bandgap semiconductors.
[21] D. Vinnikov, I. Roasto, R. Strzelecki, M. Adamowicz, “Step-up dc/dc
converters with cascaded quasi-Z-source network,” IEEE Trans. Ind. Osama A. Mohammed (S’79, M’83, SM’85,
Electron., vol. 59, no. 10, Oct. 2012. F’94) received the MS and PhD degrees in
[22] A. Ho, T. Chun, and H. Kim, “Extended boost active-switched capacitor/ electrical engineering from Virginia Tech,
switched-inductor quasi-Z-source inverters,” IEEE Trans. Power. Blacksburg, VA, USA, in 1981 and 1983,
Electron., vol. 30, no. 10, pp. 5681-5690, Oct. 2015. respectively. He is currently a Distinguished
[23] M. Nguyen, Y. Lim, and G. Cho, “Switched-inductor quasi-Z-source Professor and the Associate Dean of
inverter,” IEEE Trans. Power. Electron., vol. 26, no. 11, Nov. 2011. Research at the College of Engineering and
[24] Y. Tang, D. Fu, T. Wang, and Z. Xu, “Hybrid Switched-Inductor Computing, Florida International University
Converters for High Step-Up Conversion,” IEEE Trans. Ind. Electron., (FIU), Miami, Florida. He is also the Director
vol. 62, no. 3, pp. 1480 - 1490, Mar. 2015. of the Energy Systems Research Laboratory
[25] F. M. Shahir, E. Babaei, and M. Farsadi, "Voltage-Lift Technique Based in the Electrical and Computer Engineering
Nonisolated Boost DC–DC Converter: Analysis and Design," IEEE Department at FIU. He has performed research on various topics in
Trans. on Pow. Electron., vol. 33, no. 7, pp. 5917 - 5926, Jul. 2018. power and energy systems in addition to design optimization and
[26] Y. m. Ye, and K. W. E. Cheng, "Quadratic boost converter with low buffer physics based modeling in electric drive systems and other low-frequency
capacitor stress," IET Pow. Electron., vol. 7, no. 5, pp. 1162 - 1170, May environments. He is a world renowned leader in electrical energy systems. He
2014. has performed research in the areas of electromagnetic signature, wideband gap
[27] H. Kang, and H. Cha, “A New Nonisolated High-Voltage-Gain Boost devices and switching, and ship power systems modeling and analysis. He has
Converter With Inherent Output Voltage Balancing,” IEEE Trans. Ind. current active research projects for several federal agencies dealing with power
Electron., vol. 62, no. 3, pp. 1480 - 1490, Mar. 2015. system analysis and operation, smart grid distributed control and
[28] F. M. Shahir, E. Babaei, and M. Farsadi, “Extended Topology for Boost interoperability, cyber physical systems, and co-design of cyber and physical
DC-DC Converter,” IEEE Trans. Power. Electron., May 2018. components for future energy systems applications. He has published more than
[29] C. T. Pan, C. F. Chuang, C. C. Chu, “A Novel Transformer-less 750 articles in refereed journals and other IEEE refereed international
Adaptable Voltage Quadrupler DC Converter with Low Switch Voltage conference records. He also authored a book and several book chapters. His
Stress,” IEEE Trans. Power. Electron., vol. 29, no. 9, pp. 4787 - 4796, publications are highly cited, and frequently invited to lecture at research and
Sep. 2014. industrial organizations worldwide. Professor Mohammed is an elected Fellow
[30] M. Soltani, A. Mostaan, Y. P. Siwakoti, P. Davari, and F. Blaabjerg, of IEEE and is a Fellow of the Applied Computational Electromagnetic Society.
"Family of step-up DC/DC converters with fast dynamic response for low He received the prestigious IEEE Power and Energy Society Cyril Veinott
power applications," IET Pow. Electron., vol. 9, no. 14, pp. 2665 - 2673, Electromechanical Energy Conversion Award. He also received the 2012
Nov. 2016. Outstanding Research Award and the 2017 outstanding Doctoral Mentorship
[31] L. S. Yang, T. Liang, and J. Chen, “Transformerless DC–DC Converters Award from Florida International University. He was designated Distinguished
With High Step-Up Voltage Gain,” IEEE Trans. Ind. Electron., vol. 56, University Professor in 2018.
no. 8, pp. 3144 - 3152, Aug. 2009.

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