ICL8038

Semiconductor

September 1998 File Number 2864.3

Precision Waveform Generator/Voltage Features

Controlled Oscillator • Low Frequency Drift with Temperature . . . . . . .250ppm/oC
The ICL8038 waveform generator is a monolithic integrated • Low Distortion. . . . . . . . . . . . . . . . 1% (Sine Wave Output)
circuit capable of producing high accuracy sine, square,
• High Linearity . . . . . . . . . . . 0.1% (Triangle Wave Output)
triangular, sawtooth and pulse waveforms with a minimum of
external components. The frequency (or repetition rate) can • Wide Frequency Range . . . . . . . . . . . 0.001Hz to 300kHz
be selected externally from 0.001Hz to more than 300kHz • Variable Duty Cycle . . . . . . . . . . . . . . . . . . . . . 2% to 98%
using either resistors or capacitors, and frequency
modulation and sweeping can be accomplished with an • High Level Outputs . . . . . . . . . . . . . . . . . . . . . . TTL to 28V
external voltage. The ICL8038 is fabricated with advanced • Simultaneous Sine, Square, and Triangle Wave
monolithic technology, using Schottky barrier diodes and thin Outputs
film resistors, and the output is stable over a wide range of
• Easy to Use - Just a Handful of External Components
temperature and supply variations. These devices may be
Required
interfaced with phase locked loop circuitry to reduce
temperature drift to less than 250ppm/oC.

Ordering Information
PART NUMBER STABILITY TEMP. RANGE (oC) PACKAGE PKG. NO.

ICL8038CCPD 250ppm/oC (Typ) 0 to 70 14 Ld PDIP E14.3

ICL8038CCJD 250ppm/oC (Typ) 0 to 70 14 Ld CERDIP F14.3

ICL8038BCJD 180ppm/oC (Typ) 0 to 70 14 Ld CERDIP F14.3

ICL8038ACJD 120ppm/oC (Typ) 0 to 70 14 Ld CERDIP F14.3

Pinout Functional Diagram

ICL8038
V+
(PDIP, CERDIP) 6
TOP VIEW CURRENT
SOURCE
#1 COMPARATOR
I #1
SINE WAVE 1 14 NC 10
ADJUST
SINE 2I
2 13 NC C COMPARATOR
WAVE OUT
#2
TRIANGLE
3 12 SINE WAVE
OUT ADJUST

DUTY CYCLE 4 11 V- OR GND

FREQUENCY
ADJUST 5 10 TIMING CURRENT
CAPACITOR SOURCE FLIP-FLOP
6 9 SQUARE #2
V+
WAVE OUT V- OR GND
FM SWEEP 11
FM BIAS 7 8
INPUT
SINE
BUFFER BUFFER CONVERTER

9 3 2

1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Copyright © Harris Corporation 1998
 ICL8038

Absolute Maximum Ratings Thermal Information

Supply Voltage (V- to V+). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W)
Input Voltage (Any Pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . V- to V+ CERDIP Package. . . . . . . . . . . . . . . . . 75 20
Input Current (Pins 4 and 5). . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA PDIP Package . . . . . . . . . . . . . . . . . . . 115 N/A
Output Sink Current (Pins 3 and 9) . . . . . . . . . . . . . . . . . . . . . 25mA Maximum Junction Temperature (Ceramic Package) . . . . . . . .175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC
Operating Conditions Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Temperature Range
ICL8038AC, ICL8038BC, ICL8038CC . . . . . . . . . . . . 0oC to 70oC
Die Characteristics
Back Side Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V-
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications VSUPPLY = ±10V or +20V, TA = 25oC, RL = 10kΩ, Test Circuit Unless Otherwise Specified

ICL8038CC ICL8038BC ICL8038AC

TEST
PARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS

Supply Voltage Operating Range VSUPPLY

V+ Single Supply +10 - +30 +10 - +30 +10 - +30 V

V+, V- Dual Supplies ±5 - ±15 ±5 - ±15 ±5 - ±15 V

Supply Current ISUPPLY VSUPPLY = ±10V 12 20 - 12 20 - 12 20 mA

(Note 2)

FREQUENCY CHARACTERISTICS (All Waveforms)

Max. Frequency of Oscillation fMAX 100 - - 100 - - 100 - - kHz

Sweep Frequency of FM Input fSWEEP - 10 - - 10 - - 10 - kHz

Sweep FM Range (Note 3) - 35:1 - - 35:1 - - 35:1 -

FM Linearity 10:1 Ratio - 0.5 - - 0.2 - - 0.2 - %

Frequency Drift with ∆f/∆T 0oC to 70oC - 250 - - 180 - - 120 ppm/oC
Temperature (Note 5)
Frequency Drift with Supply Voltage ∆f/∆V Over Supply - 0.05 - - 0.05 - 0.05 - %/V
Voltage Range

OUTPUT CHARACTERISTICS

Square Wave
Leakage Current IOLK V9 = 30V - - 1 - - 1 - - 1 µA

Saturation Voltage VSAT ISINK = 2mA - 0.2 0.5 - 0.2 0.4 - 0.2 0.4 V

Rise Time tR RL = 4.7kΩ - 180 - - 180 - - 180 - ns

Fall Time tF RL = 4.7kΩ - 40 - - 40 - - 40 - ns

Typical Duty Cycle Adjust ∆D 2 98 2 - 98 2 - 98 %

(Note 6)

Triangle/Sawtooth/Ramp -
Amplitude VTRIAN- RTRI = 100kΩ 0.30 0.33 - 0.30 0.33 - 0.30 0.33 - xVSUPPLY
GLE

Linearity - 0.1 - - 0.05 - - 0.05 - %

Output Impedance ZOUT IOUT = 5mA - 200 - - 200 - - 200 - Ω

2
 ICL8038

Electrical Specifications VSUPPLY = ±10V or +20V, TA = 25oC, RL = 10kΩ, Test Circuit Unless Otherwise Specified (Continued)

ICL8038CC ICL8038BC ICL8038AC

TEST
PARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS

Sine Wave
Amplitude VSINE RSINE = 100kΩ 0.2 0.22 - 0.2 0.22 - 0.2 0.22 - xVSUPPLY

THD THD RS = 1MΩ - 2.0 5 - 1.5 3 - 1.0 1.5 %

(Note 4)

THD Adjusted THD Use Figure 4 - 1.5 - - 1.0 - - 0.8 - %

NOTES:
2. RA and RB currents not included.
3. VSUPPLY = 20V; RA and RB = 10kΩ, f ≅ 10kHz nominal; can be extended 1000 to 1. See Figures 5A and 5B.
4. 82kΩ connected between pins 11 and 12, Triangle Duty Cycle set at 50%. (Use RA and RB.)
5. Figure 1, pins 7 and 8 connected, VSUPPLY = ±10V. See Typical Curves for T.C. vs VSUPPLY.
6. Not tested, typical value for design purposes only.

Test Conditions
PARAMETER RA RB RL C SW1 MEASURE

Supply Current 10kΩ 10kΩ 10kΩ 3.3nF Closed Current Into Pin 6

Sweep FM Range (Note 7) 10kΩ 10kΩ 10kΩ 3.3nF Open Frequency at Pin 9

Frequency Drift with Temperature 10kΩ 10kΩ 10kΩ 3.3nF Closed Frequency at Pin 3

Frequency Drift with Supply Voltage (Note 8) 10kΩ 10kΩ 10kΩ 3.3nF Closed Frequency at Pin 9

Output Amplitude (Note 10)

Sine 10kΩ 10kΩ 10kΩ 3.3nF Closed Pk-Pk Output at Pin 2

Triangle 10kΩ 10kΩ 10kΩ 3.3nF Closed Pk-Pk Output at Pin 3

Leakage Current (Off) (Note 9) 10kΩ 10kΩ 3.3nF Closed Current into Pin 9

Saturation Voltage (On) (Note 9) 10kΩ 10kΩ 3.3nF Closed Output (Low) at Pin 9

Rise and Fall Times (Note 11) 10kΩ 10kΩ 4.7kΩ 3.3nF Closed Waveform at Pin 9

Duty Cycle Adjust (Note 11)

Max 50kΩ ~1.6kΩ 10kΩ 3.3nF Closed Waveform at Pin 9

Min ~25kΩ 50kΩ 10kΩ 3.3nF Closed Waveform at Pin 9

Triangle Waveform Linearity 10kΩ 10kΩ 10kΩ 3.3nF Closed Waveform at Pin 3

Total Harmonic Distortion 10kΩ 10kΩ 10kΩ 3.3nF Closed Waveform at Pin 2

NOTES:
7. The hi and lo frequencies can be obtained by connecting pin 8 to pin 7 (fHI) and then connecting pin 8 to pin 6 (fLO). Otherwise apply Sweep
Voltage at pin 8 (2/3 VSUPPLY +2V) ≤ VSWEEP ≤ VSUPPLY where VSUPPLY is the total supply voltage. In Figure 5B, pin 8 should vary between
5.3V and 10V with respect to ground.
8. 10V ≤ V+ ≤ 30V, or ±5V ≤ VSUPPLY ≤ ±15V.
9. Oscillation can be halted by forcing pin 10 to +5V or -5V.
10. Output Amplitude is tested under static conditions by forcing pin 10 to 5V then to -5V.
11. Not tested; for design purposes only.

3
 ICL8038

Test Circuit
+10V
RA RB RL
10K 10K 10K

7 4 5 6 9
SW1
N.C.

8 ICL8038 3
RTRI

10 11 12 2

C RSINE
82K
3300pF
-10V
FIGURE 1. TEST CIRCUIT

Detailed Schematic
CURRENT SOURCES 6
V+
R41 R32
REXT B REXT A
R1 4K 5.2K
8 Q1 5
11K 4 Q14
Q2 Q48 1
7 R8
Q3 Q47 R33
R2 5K
Q R19 200
39K 6 Q4 Q5 Q46

COMPARATOR 800 Q45 R34

Q7 R20 375
Q8 Q9 Q44
10
Q15 Q18 2.7K
R46 Q43 R35
R21
40K
CEXT Q16Q17 330
R9 Q42
5K 10K
R7B R7A Q41
Q10
R3 R25 R26 R27 R45
Q11 15K 10K
30K 33K 33K 33K 33K
Q12 R36
Q30
Q13 Q20 Q21 1600
Q31 Q19 Q22
R4 R5 R6 R28 R29 R30 R31
Q32 100 100 100 R10 33K 33K 33K 33K
5K Q49
Q33 R22
Q50
Q34
R13 R16 R43 10K Q51 R37
620 1.8K 27K R23 330
Q24 Q52
9 R14 Q37 2.7K Q53 R38
Q35 Q39
27K R24 375
R11 Q36 Q Q54
270 38 Q40
R41 3 R44 800 R39
Q26 Q Q55
Q23 Q27 28 200
27K 1K 12
R12 R15 R17 Q56
2.7K 470 4.7K R40
R42 REXTC
Q25 Q29 BUFFER AMPLIFIER 2 5.6K
27K 11 82K
R18
4.7K SINE CONVERTER
FLIP-FLOP

Application Information (See Functional Diagram) net-current I and the voltage across it drops linearly with time.
When it has reached the level of comparator #2 (set at 1/3 of
An external capacitor C is charged and discharged by two
the supply voltage), the flip-flop is triggered into its original
current sources. Current source #2 is switched on and off by a
state and the cycle starts again.
flip-flop, while current source #1 is on continuously. Assuming
that the flip-flop is in a state such that current source #2 is off, Four waveforms are readily obtainable from this basic
and the capacitor is charged with a current I, the voltage generator circuit. With the current sources set at I and 2I
across the capacitor rises linearly with time. When this voltage respectively, the charge and discharge times are equal. Thus
reaches the level of comparator #1 (set at 2/3 of the supply a triangle waveform is created across the capacitor and the
voltage), the flip-flop is triggered, changes states, and flip-flop produces a square wave. Both waveforms are fed to
releases current source #2. This current source normally buffer stages and are available at pins 3 and 9.
carries a current 2I, thus the capacitor is discharged with a

4
 ICL8038

The levels of the current sources can, however, be selected

C×V C × 1/3 × V SUPPLY × R A RA × C
over a wide range with two external resistors. Therefore, with t 1 = -------------- = ------------------------------------------------------------------- = ------------------
I 0.22 × V SUPPLY 0.66
the two currents set at values different from I and 2I, an
The falling portion of the triangle and sine wave and the 0
asymmetrical sawtooth appears at Terminal 3 and pulses
state of the square wave is:
with a duty cycle from less than 1% to greater than 99% are
C×V C × 1/3V SUPPLY R R C
A B
available at Terminal 9. t = ------------- = ----------------------------------------------------------------------------------- = --------------------------------------
2 1 V
SUPPLY
V
SUPPLY 0.66 ( 2R A – R B )
2 ( 0.22 ) ------------------------ – 0.22 ------------------------
The sine wave is created by feeding the triangle wave into a R
B
R
A
nonlinear network (sine converter). This network provides a Thus a 50% duty cycle is achieved when RA = RB.
decreasing shunt impedance as the potential of the triangle
If the duty cycle is to be varied over a small range about 50%
moves toward the two extremes.
only, the connection shown in Figure 3B is slightly more
Waveform Timing convenient. A 1kΩ potentiometer may not allow the duty cycle
The symmetry of all waveforms can be adjusted with the to be adjusted through 50% on all devices. If a 50% duty cycle
external timing resistors. Two possible ways to accomplish is required, a 2kΩ or 5kΩ potentiometer should be used.
this are shown in Figure 3. Best results are obtained by With two separate timing resistors, the frequency is given by:
keeping the timing resistors RA and RB separate (A). RA 1 1
f = ---------------- = ------------------------------------------------------
controls the rising portion of the triangle and sine wave and t1 + t2 RA C  RB 
------------  1 + -------------------------
the 1 state of the square wave. 0.66  2R A – R B

The magnitude of the triangle waveform is set at 1/3 or, if RA = RB = R

VSUPPLY; therefore the rising portion of the triangle is, 0.33
f = ----------- (for Figure 3A)
RC

FIGURE 2A. SQUARE WAVE DUTY CYCLE - 50% FIGURE 2B. SQUARE WAVE DUTY CYCLE - 80%
FIGURE 2. PHASE RELATIONSHIP OF WAVEFORMS

V+
V+
1kΩ RL
RA RB RL RA RB

7 4 5 6 9 4 5 6
7 9

8 ICL8038 3 8 ICL8038 3

10 11 12 2 10 11 12 2

C 82K C 100K
V- OR GND V- OR GND
FIGURE 3A. FIGURE 3B.
FIGURE 3. POSSIBLE CONNECTIONS FOR THE EXTERNAL TIMING RESISTORS

5
 ICL8038

Neither time nor frequency are dependent on supply voltage, R1 and R2 are shown in the Detailed Schematic.
even though none of the voltages are regulated inside the
A similar calculation holds for RB.
integrated circuit. This is due to the fact that both currents
and thresholds are direct, linear functions of the supply The capacitor value should be chosen at the upper end of its
voltage and thus their effects cancel. possible range.

Reducing Distortion Waveform Out Level Control and Power Supplies

To minimize sine wave distortion the 82kΩ resistor between The waveform generator can be operated either from a
pins 11 and 12 is best made variable. With this arrangement single power supply (10V to 30V) or a dual power supply
distortion of less than 1% is achievable. To reduce this even (±5V to ±15V). With a single power supply the average levels
further, two potentiometers can be connected as shown in of the triangle and sine wave are at exactly one-half of the
Figure 4; this configuration allows a typical reduction of sine supply voltage, while the square wave alternates between
wave distortion close to 0.5%. V+ and ground. A split power supply has the advantage that
all waveforms move symmetrically about ground.

V+ The square wave output is not committed. A load resistor

RA
1kΩ
RB RL can be connected to a different power supply, as long as the
applied voltage remains within the breakdown capability of
7 4 5 6 9 the waveform generator (30V). In this way, the square wave
output can be made TTL compatible (load resistor
connected to +5V) while the waveform generator itself is
8 ICL8038 3
powered from a much higher voltage.

Frequency Modulation and Sweeping

10 11 12 1 2
The frequency of the waveform generator is a direct function
100kΩ 10kΩ
of the DC voltage at Terminal 8 (measured from V+). By
C
100kΩ altering this voltage, frequency modulation is performed. For
10kΩ small deviations (e.g. ±10%) the modulating signal can be
applied directly to pin 8, merely providing DC decoupling
V- OR GND with a capacitor as shown in Figure 5A. An external resistor
FIGURE 4. CONNECTION TO ACHIEVE MINIMUM SINE WAVE between pins 7 and 8 is not necessary, but it can be used to
DISTORTION increase input impedance from about 8kΩ (pins 7 and 8
connected together), to about (R + 8kΩ).
Selecting RA, RB and C
For larger FM deviations or for frequency sweeping, the
For any given output frequency, there is a wide range of RC
modulating signal is applied between the positive supply
combinations that will work, however certain constraints are
voltage and pin 8 (Figure 5B). In this way the entire bias for
placed upon the magnitude of the charging current for
the current sources is created by the modulating signal, and
optimum performance. At the low end, currents of less than
a very large (e.g. 1000:1) sweep range is created (f = 0 at
1µA are undesirable because circuit leakages will contribute
VSWEEP = 0). Care must be taken, however, to regulate the
significant errors at high temperatures. At higher currents
supply voltage; in this configuration the charge current is no
(I > 5mA), transistor betas and saturation voltages will
longer a function of the supply voltage (yet the trigger
contribute increasingly larger errors. Optimum performance
thresholds still are) and thus the frequency becomes
will, therefore, be obtained with charging currents of 10µA to
dependent on the supply voltage. The potential on Pin 8 may
1mA. If pins 7 and 8 are shorted together, the magnitude of
be swept down from V+ by (1/3 VSUPPLY - 2V).
the charging current due to RA can be calculated from:
R 1 × ( V+ – V- ) 1 0.22 ( V+ – V- )
I = ---------------------------------------- × -------- = ------------------------------------
( R1 + R2 ) RA RA

6
 ICL8038

V+ With a dual supply voltage the external capacitor on Pin 10 can

RL
be shorted to ground to halt the ICL8038 oscillation. Figure 7
RA RB
shows a FET switch, diode ANDed with an input strobe signal
to allow the output to always start on the same slope.
7 4 5 6 9

R V+

8 ICL8038 3 RA RB 15K

7 4 5 9
FM
10 11 12 2

C 81K 8 ICL8038
1N914
V- OR GND

2
FIGURE 5A. CONNECTIONS FOR FREQUENCY MODULATION 11 10

1N914
C 2N4392 STROBE
V+
100K
-15V
SWEEP RA RB RL OFF
VOLTAGE +15V (+10V)
-15V (-10V)
4 5 6 9 ON

FIGURE 7. STROBE TONE BURST GENERATOR

8 ICL8038 3
To obtain a 1000:1 Sweep Range on the ICL8038 the
voltage across external resistors RA and RB must decrease
to nearly zero. This requires that the highest voltage on
10 11 12 2
control Pin 8 exceed the voltage at the top of RA and RB by a
C 81K few hundred mV. The Circuit of Figure 8 achieves this by
using a diode to lower the effective supply voltage on the
V- OR GND
ICL8038. The large resistor on pin 5 helps reduce duty cycle
FIGURE 5B. CONNECTIONS FOR FREQUENCY SWEEP variations with sweep.
FIGURE 5.
The linearity of input sweep voltage versus output frequency
can be significantly improved by using an op amp as shown
Typical Applications in Figure 10.
The sine wave output has a relatively high output impedance
(1kΩ Typ). The circuit of Figure 6 provides buffering, gain +10V

and amplitude adjustment. A simple op amp follower could 1N457

also be used. DUTY CYCLE

0.1µF 15K
1K
V+ 4.7K 4.7K

RA RB

AMPLITUDE 5 4 6 9
7 4 5 6 2

+
100K 741 10K
FREQ. 8 ICL8038 3
8 ICL8038 -
20K

4.7K 10 11 12 2
10 11

C
20K ≈15M 0.0047µF DISTORTION
100K
-10V
V-

FIGURE 8. VARIABLE AUDIO OSCILLATOR, 20Hz TO 20kHzY

FIGURE 6. SINE WAVE OUTPUT BUFFER AMPLIFIERS

7
 ICL8038

V2+
DUTY
CYCLE
R1
FREQUENCY TRIANGLE
ADJUST OUT
FM BIAS
V1+ 6
7 4 5 3
SQUARE SINE WAVE
WAVE OUT
OUT
9 ICL8038 2

VCO DEMODULATED
IN SINE WAVE
INPUT PHASE AMPLIFIER FM 1
8 10 11 12 ADJ.
DETECTOR R2

TIMING SINE WAVE

CAP. ADJ.
LOW PASS
FILTER
V-/GND

FIGURE 9. WAVEFORM GENERATOR USED AS STABLE VCO IN A PHASE-LOCKED LOOP

HIGH FREQUENCY
SYMMETRY
10kΩ 100kΩ
500Ω
1N753A
4.7kΩ 4.7kΩ
(6.2V) 1MΩ
1kΩ 100kΩ
1,000pF LOW FREQUENCY
4 5 6 9 SYMMETRY
+15V

- 1kΩ SINE WAVE

ICL8038 +15V OUTPUT
741 8 3
FUNCTION GENERATOR
+ -
-VIN P4 741
+ +
10 11 12 2
10kΩ 50µF
OFFSET 100kΩ 15V
3,900pF SINE WAVE
DISTORTION

-15V

FIGURE 10. LINEAR VOLTAGE CONTROLLED OSCILLATOR

Use in Phase Locked Loops

Its high frequency stability makes the ICL8038 an ideal Second, the DC output level of the amplifier must be made
building block for a phase locked loop as shown in Figure 9. compatible to the DC level required at the FM input of the
In this application the remaining functional blocks, the phase waveform generator (pin 8, 0.8V+). The simplest solution here
detector and the amplifier, can be formed by a number of is to provide a voltage divider to V+ (R1, R2 as shown) if the
available ICs (e.g., MC4344, NE562). amplifier has a lower output level, or to ground if its level is
higher. The divider can be made part of the low-pass filter.
In order to match these building blocks to each other, two
steps must be taken. First, two different supply voltages are This application not only provides for a free-running
used and the square wave output is returned to the supply of frequency with very low temperature drift, but is also has the
the phase detector. This assures that the VCO input voltage unique feature of producing a large reconstituted sinewave
will not exceed the capabilities of the phase detector. If a signal with a frequency identical to that at the input.
smaller VCO signal is required, a simple resistive voltage
For further information, see Harris Application Note AN013,
divider is connected between pin 9 of the waveform
“Everything You Always Wanted to Know About the ICL8038”.
generator and the VCO input of the phase detector.

8
 ICL8038

Definition of Terms FM Linearity. The percentage deviation from the best fit
straight line on the control voltage versus output frequency
Supply Voltage (VSUPPLY). The total supply voltage from
curve.
V+ to V-.
Output Amplitude. The peak-to-peak signal amplitude
Supply Current. The supply current required from the
appearing at the outputs.
power supply to operate the device, excluding load currents
and the currents through RA and RB. Saturation Voltage. The output voltage at the collector of
Q23 when this transistor is turned on. It is measured for a
Frequency Range. The frequency range at the square wave
sink current of 2mA.
output through which circuit operation is guaranteed.
Rise and Fall Times. The time required for the square wave
Sweep FM Range. The ratio of maximum frequency to
output to change from 10% to 90%, or 90% to 10%, of its
minimum frequency which can be obtained by applying a
final value.
sweep voltage to pin 8. For correct operation, the sweep
voltage should be within the range: Triangle Waveform Linearity. The percentage deviation
from the best fit straight line on the rising and falling triangle
(2/3 VSUPPLY + 2V) < VSWEEP < VSUPPLY
waveform.

Total Harmonic Distortion. The total harmonic distortion at

the sine wave output.

Typical Performance Curves

20 1.03

1.02
NORMALIZED FREQUENCY
SUPPLY CURRENT (mA)

-55oC
15 1.01

125oC 1.00

10 25oC 0.99

0.98

5
5 10 15 20 25 30 5 10 15 20 25 30
SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V)

FIGURE 11. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 12. FREQUENCY vs SUPPLY VOLTAGE

1.03 200

1.02
NORMALIZED FREQUENCY

RISE TIME
10 150 125oC
1.01 25oC
20
TIME (ns)

30 -55oC
1.00
20
100 125oC
10 30 25oC
0.99 FALL TIME
-55oC
50
0.98

0
-50 -25 0 25 75 125 0 2 4 6 8 10
TEMPERATURE (oC) LOAD RESISTANCE (kΩ)

FIGURE 13. FREQUENCY vs TEMPERATURE FIGURE 14. SQUARE WAVE OUTPUT RISE/FALL TIME vs
LOAD RESISTANCE

9
 ICL8038

Typical Performance Curves (Continued)

2 1.0

NORMALIZED PEAK OUTPUT VOLTAGE

LOAD CURRENT 125oC
TO V -
25oC
SATURATION VOLTAGE

1.5
0.9
-55oC
125oC
1.0
25oC
-55oC
0.8
LOAD CURRENT TO V+
0.5

0
0 2 4 6 8 10 0 2 4 6 8 10 12 14 16 18 20
LOAD CURRENT (mA) LOAD CURRENT (mA)

FIGURE 15. SQUARE WAVE SATURATION VOLTAGE vs LOAD FIGURE 16. TRIANGLE WAVE OUTPUT VOLTAGE vs LOAD
CURRENT CURRENT

1.2 10.0
NORMALIZED OUTPUT VOLTAGE

1.1

1.0 1.0
LINEARITY (%)

0.9

0.8 0.1

0.7

0.6 0.01
10 100 1K 10K 100K 1M 10 100 1K 10K 100K 1M

FREQUENCY (Hz) FREQUENCY (Hz)

FIGURE 17. TRIANGLE WAVE OUTPUT VOLTAGE vs FIGURE 18. TRIANGLE WAVE LINEARITY vs FREQUENCY
FREQUENCY

1.1 12
NORMALIZED OUTPUT VOLTAGE

10
DISTORTION (%)

1.0 8

0.9 4
UNADJUSTED ADJUSTED

0
10 100 1K 10K 100K 1M 10 100 1K 10K 100K 1M
FREQUENCY (Hz) FREQUENCY (Hz)

FIGURE 19. SINE WAVE OUTPUT VOLTAGE vs FREQUENCY FIGURE 20. SINE WAVE DISTORTION vs FREQUENCY

10
 Everything You Always Wanted to Know
Semiconductor
About the ICL8038
Application Note November 199 AN013.1
Author: Bill O’Neil

Introduction Answer
The 8038 is a function generator capable of producing sine, First of all, the voltage difference need only be a few hundred
square, triangular, sawtooth and pulse waveforms (some at millivolts so there is no danger of damaging the 8038. One
the same time). Since its introduction, marketing and appli- way to get this higher potential is to lower the supply voltage
cation engineers have been manning the phones explaining on the 8038 and external resistors. The simplest way to do
the care and feeding of the 8038 to customers worldwide. this is to include a diode in series with pin 6 and resistors RA
This experience has enabled us to form articulate responses and RB. See Figure 1. This technique should increase the
to the most frequently asked questions. So, with data sheet sweep range to 1000:1.
and breadboard in hand, read on and be enlightened.
+15V
Question 1
1N457
I want to sweep the frequency externally but can only get a
range of 100:1 (or 50:1, or 10:1). Your data sheet says 0.1µF DUTY
CYCLE
1000:1. How much sweep range can I expect?
1K 15K
Answer 4.7K
RB
Let’s look at what determines the output frequency. Start by 4.7K
RA
examining the circuit schematic at pin 8 in the upper left hand
corner. From pin 8 to pin 5 we have the emitter-base of NPN
Q1 and the emitter-base of PNP Q2. Since these two diode 5 4 6
9
drops cancel each other (approximately), the potential at pins 100K
8, 5, and 4 are the same. This means that the voltage from V+ FREQUENCY 8
3
LOG POT
to pin 8 is the same as the voltage across external resistors
7
RA and RB. This is a textbook example of a voltage across 2
10 11 12
two resistors which produce two currents to charge and dis- 10M
charge a capacitor between two fixed voltages. This is also a
linear system. If the voltage across the resistors is dropped 0.0047µF DISTORTION
100K
from 10V to 1V, the frequency will drop by 10:1. Changing
from 1V to 0.1V will also change the frequency by 10:1. -15V
Therefore, by causing the voltage across the external resis-
FIGURE 1. VARIABLE AUDIO OSCILLATOR, 20Hz TO 20kHz
tors to change from say 10V to 10mV, the frequency can be
made to vary at least 1000:1. There are, however, several fac-
tors which make this large sweep range less than ideal. Question 4
O.K., now I can get a large frequency range, but I notice that
Question 2
the duty cycle and hence my distortion changes at the low-
You say I can vary the voltage on pin 8 (FM sweep input) to est frequencies.
get this large range, yet when I short pin 8 to V+ (pin 6), the
ratio is only around 100:1. Answer

Answer This is caused partly by a slight difference in the VBEs of Q2

and Q3. In trying to manufacture two identical transistors, it is
This is often true. With pin 8 shorted to V+, a check on the not uncommon to get VBE differences of several millivolts or
potentials across the external RA and RB will show 100mV more. In the standard 8038 connection with pins 7 and 8 con-
or more. This is due to the VBE mismatch between Q1 and nected together, there are several volts across RA and RB and
Q2 (also Q1 and Q3) because of the geometries and current this small mismatch is negligible. However, in a swept mode
levels involved. Therefore, to get smaller voltages across with the voltage at pin 8 near V+ and only tens of millivolts
these resistors, pin 8 must be raised above V+. across RA and RB, the VBE mismatch causes a larger mis-
match in charging currents, hence the duty cycle changes. For
Question 3 lowest distortion then, it is advisable to keep the minimum
How can I raise pin 8 above V+ without a separate power voltage across RA and RB around 100mV. This would of
supply? course, limit the frequency sweep range to around 100:1.

1 Copyright © Harris Corporation 1998

 Application Note 013

Question 5 Finally, trimming the various pins for lowest distortion

deserves some attention. With pins 7 and 8 connected
I have a similar duty cycle problem when I use high values of
together and the pot at pin 7 and 8 externally set at its maxi-
RA and RB. What causes this?
mum, adjust the ratio of RA and RB for 50% duty cycle. Then
Answer adjust a pot on pin 12 or both pins 1 and 12 depending on
There is another error term which becomes important at very minimum distortion desired. After these trims have been
low charge and discharge currents. This error current is the made, set the voltage on pin 8 for the lowest frequency of
emitter current of Q7. The application note on the 8038 gives interest. The principle error here is due to the excess current
a complete circuit description, but it is sufficient to know that of Q7 causing a shift in the duty cycle. This can be partially
the current charging the capacitor is the current in RA which compensated for by bleeding a small current away from pin
flows down through diode Q9 and into the external C. The 5. The simplest way to do this is to connect a high value of
discharge current is the current in RB which flows down resistance (10MΩ to 20MΩ) from pin 5 to V- to bring the duty
through diode Q8. Adding to the Q8 current is the current of cycle back to 50%. This should result in a reasonable com-
Q7 which is only a few microamperes. Normally, this Q7 cur- promise between low distortion and large sweep range.
rent is negligible, but with a small current in RB, this current
will cause a faster discharge than would be expected. This Question 7
problem will also appear in sweep circuits when the voltage This waveform generator is a piece of junk. The triangle wave
across the external resistors is small. is non-linear and has large glitches when it changes slope.
Answer
Question 6
You’re probably having trouble keeping the constant voltage
How can I get the lowest distortion over the largest
across RA and RB really constant. The pulse output on pin 9
frequency sweep range.
puts a moderate load on both supplies as it switches current on
Answer and off. Changes in the supply reflect as variations in charging
First of all, use the largest supply voltage available (±15V or current, hence non-linearity. Decoupling both power supply pins
+30V is convenient). This will minimize VBE mismatch prob- to ground right at the device pins is a good idea. Also, pins 7
lems and allow a wide variation of voltage on pin 8. The and 8 are susceptible to picking up switching transients (this is
potential on pin 8 may be swept from VCC (and slightly especially true on printed circuit boards where pins 8 and 9 run
higher) to 2/3 VCC +2V) where VCC is the total voltage side by side). Therefore, a capacitor (0.1µF or more) from V+ to
across the 8038. Specifically for ±15V supplies (+30V), the pin 8 is often advisable. In the case when the pulse output is not
voltage across the external resistors can be varied from 0V required, leave pin 9 open to be sure of minimizing transients.
to nearly 8V before clipping of the triangle waveform occurs.
Second, keep the maximum currents relatively large (1mA or
Question 8
2mA) to minimize the error due to Q7. Higher currents could What is the best supply voltage to use for lowest frequency
be used, but the small geometry transistors used in the 8038 drift with temperature?
could give problems due to VCE(SAT) and bulk resistance, etc. Answer
Third, and this is important, use two separate resistors for RA The 8038AM, 8038AC, 8038BM and 8038BC are all temper-
and RB rather than one resistor with pins 4 and 5 connected ature drift tested at VCC = +20V (or ±10V). A curve in the
together. This is because transistors Q2 and Q3 form a differ- lower right hand corner of Page 4 of the data sheet indicates
ential amplifier whose gain is determined by the impedance frequency versus temperature at other supply voltages. It is
between pins 4 and 5 as well as the quiescent current. There important to connect pins 7 and 8 together.
are a number of implications in the differential amplifier con-
nection (pins 4 and 5 shorted). The most obvious is that the Question 9
gain determines the way the currents split between Q2 and
Why does connecting pin 7 to pin 8 give the best temperature
Q3. Therefore, any small offset or differential voltage will
performance?
cause a marked imbalance in the charge and discharge cur-
rents and hence the duty cycle. A more subtle result of this Answer
connection is the effective capacitance at pin 10. With pins 4 There is a small temperature drift of the comparator thresh-
and 5 connected together, the “Miller Effect” as well as the olds in the 8038. To compensate for this, the voltage divider
compound transistor connection of Q3 and Q5 can produce at pin 7 uses thin film resistors plus diffused resistors. The
several hundred picofarads at pin 10, seriously limiting the different temperature coefficients of these resistors causes
highest frequency of oscillation. The effective capacitance the voltage at pins 7 and 8 to vary 0.5mV/oC to maintain
would have to be considered important in determining what overall low frequency drift at VCC = 20V. At higher supply
value of external C would result in a particular frequency of voltages, e.g., ±15V (+30V), the threshold drifts are smaller
oscillation. The single resistor connection is fine for very sim- compared with the total supply voltage. In this case, an
ple circuits, but where performance is critical, the two sepa- externally applied constant voltage at pin 8 will give reason-
rate resistors for RA and RB are recommended. ably low frequency drift with temperature.

2
 Application Note 013

Question 10 Question 13
Your data sheet is very confusing about the phase relationship How can I buffer the sine wave output without loading it down?
of the various waveforms. Answer
Answer The simplest circuit is a simple op amp follower as shown in Fig-
Sorry about that! The thing to remember is that the triangle ure 3A. Another circuit shown in Figure 3B allows amplitude and
and sine wave must be in phase since one is derived from offset controls without disturbing the 8038. Either circuit can be
the other. A check on the way the circuit works shows that DC or AC coupled. For AC coupling the op amp non-inverting
the pulse waveform on pin 9 will be high as the capacitor input must be returned to ground with a 100kΩ resistor.
charges (positive slope on the triangle wave) and will be low
during discharge (negative slope on the triangle wave). Question 14
The latest data sheet corrects the photograph Figure 7 on Page Your 8038 data sheet implies that all waveforms can operate up
5 of the data sheet. The 20% duty cycle square wave was to 1MHz. Is this true?
inverted, i.e., should be 80% duty cycle. Also, on that page Answer
under “Waveform Timing” the related sentences should read
“RA controls the rising portion of the triangle and sine-wave and Unfortunately, only the square wave output is useful at that
the 1 state of the square wave.” Also, “the falling portion of the frequency. As can be seen from the curves on page 4 of the
triangle and sine wave and the 0 state of the square wave is:” data sheet, distortion on the sine wave and linearity of the tri-
angle wave fall off rapidly above 200kHz.
Question 11
Question 15
Under Parameter Test Conditions on Page 3 of your 8038
data sheet, the suggested value for Min and Max duty cycle Is it normal for this device to run hot to the touch?
adjust don’t seem to work. Answer
Answer Yes. The 8038 is essentially resistive. The power dissipation
The positive charging current is determined by RA alone is then E2/R and at ±15V, the device does run hot. Extensive
since the current from RB is switched off. (See 8038 Applica- life testing under this operating condition and maximum
tion Note AN012 for complete circuit description.) The nega- ambient temperature has verified the reliability of this prod-
tive discharge current is the difference between the RA uct.
current and twice the RB current. Therefore, changing RB
will affect only the discharge time, while changing RA will Question 16
affect both charge and discharge times. For short negative How stable are the output amplitudes versus temperature?
going pulses (greater than 50% duty cycle) we can lower the
Answer
value of RB (e.g., RA = 50kΩ and RB = 1.6kΩ). For short
positive going pulses (duty cycles less than 50%) the limiting The amplitude of the triangle waveform decreases slightly
values are reached when the current in RA is twice that in with temperature. The typical amplitude coefficient is
RB (e.g., RB = 50kΩ). This has been corrected on the latest -0.01%/oC, giving a drop of about 1% at 125oC. The sine
data sheet. output is less sensitive and decreases only about 0.6% at
125oC. For the square wave output the VCE(SAT) goes from
Question 12 0.12V at 25oC to 0.17V at 125oC. Leakage current in the “1”
state is less than a few nanoamperes even at 125oC and is
I need to switch the waveforms off and on. What’s a good
usually negligible.
way to strobe the 8038?
Answer +15V
With a dual supply voltage (e.g., ±15V) the external capaci- RA RB 15K
tor (pin 10) can be shorted to ground so that the sine wave
and triangle wave always begin at a zero crossing point. 4 5 6
9
Random switching has a 50/50 chance of starting on a posi-
tive or negative slope. A simple AND gate using pin 9 will 8 8038
allow the strobe to act only on one slope or the other, see 7 2 1N914
11 10
Figure 2. Using only a single supply, the capacitor (pin 10)
can be switched either to V+ or ground to force the compara- 1N914
tor to set in either the charge or discharge mode. The disad- 2N4392 STROBE
vantage of this technique is that the beginning cycle of the C OFF
100K +15V (>0V)
next burst will be 30% longer than the normal cycle. -15V
-15V (< -10V)
ON

FIGURE 2. STROBE-TONE BURST GENERATOR

3
 Application Note 013

V+ V+
RA RB
RA RB

4 5 6 AMPLITUDE
4 5 6 2
7
7 100K
8038 +
8038 +
- 8 -
8 2
10 11 20K
10 11

4.7K
C
C

V-
V-

FIGURE 3A. FIGURE 3B.

FIGURE 3. SINEWAVE OUTPUT BUFFER AMPLIFIERS

Schematic Diagram

V+