STK4192II Schematics

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Ordering number: EN2305C

Thick Film Hybrid IC

STK4192II

AF Power Amplifier (Split Power Supply)


(50W + 50W min, THD = 0.4%)

Features Package Dimensions


• The STK4102II series (STK4192II) and STK4101V unit: mm
series (high-grade type) are pin-compatible in the out- 4040
put range of 6W to 50W and enable easy design.
[STK4192II]
• Small-sized package whose pin assignment is the same
as that of the STK4101II series
• Built-in muting circuit to cut off various kinds of pop
noise
• Greatly reduced heat sink due to substrate temperature
125°C guaranteed
• Excellent cost performance

Specifications
Maximum Ratings at Ta = 25°C

Parameter Symbol Conditions Ratings Unit


Maximum supply voltage VCC max ±52.5 V
Thermal resistance θj-c 1.8 °C/W
Junction temperature Tj 150 °C
Operating substrate temperature Tc 125 °C
Storage temperature Tstg −30 to +125 °C
Available time for load short-circuit ts VCC = ±35V, RL = 8Ω, f = 50Hz, PO = 50W 2 s

Recommended Operating Conditions at Ta = 25°C

Parameter Symbol Conditions Ratings Unit


Recommended supply voltage VCC ±35 V
Load resistance RL 8 Ω

SANYO Electric Co., Ltd. Semiconductor Business Headquarters


TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
70997HA (ID) / D2593YK / 0078TA / 7167AT, TS No. 2305—1/8
STK4192II

Operating Characteristics at Ta = 25°C, VCC = ±35V, RL = 8Ω, Rg = 600Ω, VG = 40dB,


RL : non-inductive load

Parameter Symbol Conditions min typ max Unit


Quiescent current ICCO VCC = ±42V 20 40 100 mA
THD = 0.4%,
PO (1) 50 W
f = 20Hz to 20kHz
Output power
VCC = ±31V, THD = 1.0%,
PO (2) 55 W
RL = 4Ω, f = 1kHz
Total harmonic distortion THD PO = 1.0W, f = 1kHz 0.3 %
+0
Frequency response fL, fH PO = 1.0W, dB 20 to 50k Hz
–3
Input impedance ri PO = 1.0W, f = 1kHz 55 kΩ
Output noise voltage VNO VCC = ±42V, Rg = 10kΩ 1.2 mVrms
Neutral voltage VN VCC = ±42V –70 0 +70 mV
Muting voltage VM –2 –5 –10 V

Notes. For power supply at the time of test, use a constant-voltage power supply
unless otherwise specified.
For measurement of the available time for load short-circuit and output
noise voltage, use the specified transformer power supply shown right.
The output noise voltage is represented by the peak value on rms scale
(VTVM) of average value indicating type. For AC power supply, use an
AC stabilized power supply (50Hz) to eliminate the effect of flicker noise
in AC primary line.
Specified Transformer Power Supply
(Equivalent to MG-200)
Equivalent Circuit

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STK4192II

Sample Application Circuit : 50W min 2-channel AF power amplifier

Sample Printed Circuit Pattern for Application Circuit (Cu-foiled side)

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Voltage gain, VG - dB Total harmonic distortion, THD - % Output power, PO - W

Frequency, f - Hz
Input voltage, Vi - mV

Output power, PO - W
Quiescent current, Icco - mA Output power, PO - W Total harmonic distortion, THD - %
STK4192II

Frequency, f - Hz
Output power, PO - W

Operating substrate temperature, Tc - °C

No. 2305—4/8
Neutral voltage, VN - mV
Voltage gain, VG - dB IC power dissipation, Pd - W Quiescent current, Icco - mA

Frequency, f - Hz
Output power, PO - W
Supply voltage, VCC - V Neutral voltage, VN - mV

IC power dissipation, Pd - W Output power, PO - W


STK4192II

Output power, PO - W
Supply voltage, VCC - V

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STK4192II

Description of External Parts

Input filter capacitors


C1, C2
• A filter formed with R3 or R4 can be used to reduce noise at high frequencies.
Input coupling capacitors
• Used to block DC current. When the reactance of the capacitor increases at low frequencies, the dependence of 1/f noise on signal source
C3, C4 resistance causes the output noise to worsen. It is better to decrease the reactance.
• To reduce the pop noise at the time of application of power, it is effective to increase C3, C4 that fix the time constant on the input side and
to decrease C5, C6 on the NF side.
NF capacitors
• These capacitors fix the low cutoff frequency as shown below.
1
C5, C6 f L = --------------------------
2π ⋅ C5 ⋅ R5 [Hz]
To provide the desired voltage gain at low frequencies, it is better to increase C5. However, do not increase C5 more than needed because
the pop noise level becomes higher at the time of application of power.
Decoupling capacitor
C15
• Used to eliminate the ripple components that mix into the input side from the power line (+VCC).
Bootstrap capacitors
C11, C12
• When the capacitor value is decreased, the distortion is liable to be higher at low frequencies.
Oscillation blocking capacitors
C9, C10 • Must be inserted as close to the IC power supply pins as possible so that the power supply impedance is decreased to operate the IC stably.
• Electrolytic capacitors are recommended for C9, C10.
Capacitor for ripple filter
C14
• Capacitor for the TR10-used ripple filter in the IC system
Oscillation blocking capacitor
C7
• A polyester film capacitor, being excellent in temperature characteristic, frequency characteristic, is recommended for C7.
R3, R4 Resistors for input filter
Input bias resistors
R1, R2
• Used to bias the input pin potential to zero. These resistors fix the input impedance practically.
These resistors fix voltage gain VG.
R5, R9 It is recommended to use R5 (R6) = 560Ω, R9 (R10) = 56kΩ for VG = 40dB.
(R6, R10) • To adjust VG, it is desirable to change R9 (or R10).
• When R9 (or R10) is changed to adjust VG, R1 (=R2) =R9 (=R10) must be set to ensure VN balance.
R11, R13 Bootstrap resistors
(R12, R14) • The quiescent current is set by these resistors 3.3kΩ + 3.3kΩ. It is recommended to use this resistor value.
Resistor for ripple filter
R21
• Limiting resistor for predriver transistor at the time of load short
R18 Used to ensure plus/minus balance at the time of clip.
Resistor for ripple filter
R19, R20 • When muting TR11 is turned ON, current flows from ground to -VCC through TR 11. It is recommended to use 1kΩ (1W) + 1kΩ (1W)
allowing for the power that may be dissipated on that occasion.
R15, R16 Oscillation blocking resistors

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STK4192II

Sample Application Circuit (protection circuit and muting circuit)

Thermal Design
The IC power dissipation of the STK4192II at the IC-operated mode is 66W max. at load resistance 8Ω and 103W max.
at load resistance 4Ω (simultaneous drive of 2 channels) for continuous sine wave as shown in Figure 1 and 2.
IC Power dissipation, Pd - W

IC Power dissipation, Pd - W

Output power, PO - W Output power, PO - W


Figure 1. STK4192II Pd – PO (RL = 8Ω) Figure 2. STK4192II Pd – PO (RL = 4Ω)

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STK4192II

In an actual application where a music signal is used, it is impractical to estimate the power dissipation based on the con-
tinuous signal as shown above, because too large a heat sink must be used. It is reasonable to estimate the power dissipa-
tion as 1/10 Po max. (EIAJ).
That is, Pd = 43W at 8Ω, Pd = 55W at 4Ω
Thermal resistance θc-a of a heat sink for this IC power dissipation (Pd) is fixed under conditions 1 and 2 shown below.
Condition 1: Tc = Pd × θc-a + Ta ≤ 125°C............................................... (1)
where Ta : Specified ambient temperature
Tc : Operating substrate temperature
Condition 2: Tj= Pd × (θc-a) + Pd/4 × (θj-c) + Ta ≤ 150°C..................... (2)
where Tj : Junction temperature of power transistor
Assuming that the power dissipation is shared equally among the four power transistors (2 channels × 2), thermal resis-
tance θj-c is 1.8°C/W and
Pd × (θc-a + 1.8/4) + Ta ≤ 150°C........................................ (3)
Thermal resistance θc-a of a heat sink must satisfy ine-
qualities (1) and (3).
Figure 3 shows the relation between Pd and θc-a given
Thermal resistance of heat sink, θc-a - °C/W
from (1) and (3) with Ta as a parameter.

[Example] The thermal resistance of a heat sink is


obtained when the ambient temperature speci-
fied for a stereo amplifier is 50°C.
Assuming VCC = ±35V, RL = 8Ω, VCC = ±31V, RL = 4Ω,
RL = 8Ω : Pd1 = 43W at 1/10 Po max.
RL = 4Ω : Pd2 = 55W at 1/10 Po max.
The thermal resistance of a heat sink is
obtained from Figure 3.
RL = 8Ω : θc-a1 = 1.75°C/W
RL = 4Ω : θc-a2 = 1.35°C/W IC Power dissipation, Pd - W
Tj when a heat sink is used is obtained from Figure 3. STK4192II θc-a – Pd
(3).
RL = 8Ω : Tj = 144.6°C
RL = 4Ω : Tj = 149°C

■ No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear
power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury,
death or property loss.
■ Anyone purchasing any products described or contained herein for an above-mentioned use shall:
➀ Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their
officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated
with such use:
➁ Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO.,
LTD., its affiliates, subsidiaries and distributors or any of their officers and employees, jointly or severally.
■ Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO
believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of
intellectual property rights or other rights of third parties.

This catalog provides information as of July, 1997. Specifications and information herein are subject to change without notice.
No. 2305—8/8

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