In this section, we will look at flow control instructions.

Typically when the assembly language

program is executed, the processor continues to execute the next available instruction from the
next available address. Flow control instructions allow us to change that behavior and either
skip certain instructions or jump to a different point in code. By the end of this section, you
should be able to read a given sequence of instructions for the ARMV8-M architecture and
describe how the program would flow to those instructions. This slide shows a summary of the
different types of branch instructions available in the ARMV8-M mainline architecture. The main
thing to note is that all of these branch instructions have a specific range of addresses that they
can branch to. This is an artifact of the encoding of the instructions themselves. If you are
assembling code by hand, then the assembler should report an error or a warning if you try to
branch to an address that is outside of the range of an instruction. If you are compiling code,
most compilers will be able to work around these limits by chaining multiple branches together if
you are branching to an address that is really far away. Let's start by looking at specific
examples of branch instructions. The category of branch instructions also contains an actual
instruction called the branch instruction and it has the following syntax. The letter B, which
denotes that this is a branch and optional conditional code, which can allow this branch to be
executed conditionally and the label. The label is a piece of text that is associated with some
address in a memory written in assembly. When you branch to that label, what you're actually
doing is branching to the address that that label is associated with. For example, we have a
code sequence here where we have a branch instruction without any condition code and a label
start. The label start is defined further down in the program somewhere over here at some
address which contains a compare instruction. When this branch instruction is executed, what
actually happens is the offset between this point where the branch instruction is placed and the
address that the start label is associated with is calculated and the branch is taken based on
that offset. This kind of relative branching where you are going from one specific instruction to
another instruction by means of an offset is known as a PC relative or a program counter
relative branch. Another important type of branch instruction is the branch with link instruction.
These are used for subroutines or function calls. For example, if you have a function called
func1 and you want to call a function func2 from somewhere in there in such a way that once
func2 has finished executing, you go back to func1 and carry on from where you left off, you
must use a branch with link instruction. This instruction has the opcode BL, and it has two
effects. In addition to just branching to the label func2 associated with the function func2, this
instruction also updates the link register LR, which is also known as the register R14, with the
address of the next instruction immediately after the branch with link instruction. In this manner,
if this is combined with a different instruction, the return instruction BX, LR, the overall flow
works like this. Within the function func1, you use the BL or branch with link instruction to call
func2. This updates the link register to point to whatever is immediately after func2. Then you
jump into func2 and execute all of your instructions and then you reach the return instruction.
The return instruction loads the value of the link register which would still contain the address
here and then it branches to that address, causing a function return and letting you carry on
from where you left off. If you're compiling C code, the compiler will take care of this for you. If
you're writing the assembly by hand, then it is very important that you make sure to include a
return instruction in your functions if there are functions that you expect to return and that you
make sure that by the end of the function, the link registers value has been preserved and has
not been corrupted.
Another type of branch instruction that has been introduced as part of the architecture to be m
profile architectures is the compare and branch on 0 or CBZ instruction. This instruction allows
you to merge two common operations that are typically done together into the same instruction.
For instance, if you are at the end of a loop and you're iterating through that loop and your
counter variable is in register r0. When you get to zero iterations remaining, you might do
something like this. You compare your counter to zero if the counter has hit zero that is, the
condition EQ is true, which means the zero flag is set you exit the loop. The compare and
branch on zero instruction allows you to do both of these operations in the same instruction. So
instead of writing these two instructions separately, you could just write CBZ r0 and exit. There
are caveats to this however, unlike the compare instruction, which changes the actual flags and
updates them, the compare and a branch on zero instruction does not do that. It only uses the
flags for its own purposes. It does not update them. Additionally, unlike a branch instruction, the
compare and branch on zero instruction has a very finite and limited branch range. It can only
branch forwards not backwards, and it can only branch forwards by between four and 130
bytes. This instruction is typically generated by compilers if you are writing a loop where you are
iterating through your counter and you'll counting it down to zero. So far we've looked at some
examples of branch instructions which can change the instructions the processor is executing
by jumping or branching a different address entirely. Another way to change the program flow is
by using what is known as an if to then block. You might have referred to this functionality in
other architectures or in other computer architecture theory by the name, predication or
conditional execution. The way this works is you define an if-then block using an IT, or if-then
instruction. That block makes the next one up to four instructions conditional. This allows the
processor to essentially treat certain instructions that won't be executed as a not or a new
operation. For example, if I have some C code that does something like this, if the value of r0 is
zero then our r0 load some data pointed to by r1 and add two to it otherwise it load some data
pointing to by r2 and then add four to it. The way a compiler might generate code for this is as
follows. For the actual if condition, this is just a comparison to as zero. You might get a compare
r0 with zero instruction. This updates the conditions flags, negative zero [inaudible] inside
overflow. Those flags are then used by the if-then block. The if-then block is defined like this. It
starts with an if-then instruction IT and then you can suffix this with up to three other letters,
either T for them or E for else. In this case, what we want the processor to do is when this
condition is true, then we wanted to load some stuff from r1 and add two to it. Otherwise, we
wanted to know if some stuff from r2 and add four to it. So the way the if-then block here is
generated is it makes the first two instructions a then instruction as in the letter T and the next
two instructions after that else instructions using the letter E. The condition we want to use is the
same one that we use here for our comparison operation that is the E equal to zero or EQ
condition. Now the way this program will work is if the value in r0 is equal to zero, then these
two instructions will be executed and these two will be skipped. If r0 is not equal to zero, then
these instructions will be skipped and these instructions will be executed instead. In terms of
syntax, you don't have to do too much of this by hand. If you're writing assembly yourself. The
main thing that you need to do is add these condition codes to the instructions that you want to
make conditional. Most assemblers window automatically generate the if-then block for you.

Introduction
A program is a set of instructions. We know that processor executes each instruction of
the program. A processor executes instructions one by one. Whatever we write in our
program is executed in the same order as it appears in the program.
Instructions are a set of commands stored in the computer's consecutive memory
locations.
These instructions are fetched from successive memory locations for processing and
executing. The change in the content of the program counter can cause a break in the
instruction execution. However, the program control instructions control the flow of
program execution and can branch to different program segments.
Most computer Instructions can be classified into three categories: 
  Data Transfer 
  Data Manipulation
  Program Control Instructions
 
In this blog, we will have a look at Program Control Instructions.
Recommended Topic, 8085 Microprocessor Pin Diagram
What is Program Control Instructions?
Program control instructions modify or change the flow of a program. It is the instruction
that alters the sequence of the program's execution, which means it changes the value
of the program counter, due to which the execution of the program changes. 
Features:
 These instructions cause a change in the sequence of the execution of the
instruction.
 This change can be through a condition or sometimes unconditional.
 Flags represent the conditions.
 Flag-Control Instructions.
 Control Flow and the Jump Instructions include jumps, calls, returns, interrupts, and
machine control instructions.
 Subroutine and Subroutine-Handling Instructions.
 Loop and Loop-Handling Instructions.
 
Program
Control Description
Instructions
Branch which means it is an unconditional jump. It is unconditional
Branch (BR) 
branching wherever we specify the address we need to branch.
Skip instructions is used to skip one(next) instruction. It can be conditional
or unconditional. It does not need an address field. In the case of
conditional skip instruction, the combination of conditional skip and an
Skip (SKP) 
unconditional branch can be used as a replacement for the conditional
branch.
 
 The jump instruction transfers the program sequence to the memory address
Jump (JMP) given in the operand based on the specified flag.
 
The Compare instruction performs a comparison via a subtraction, with
Compare
difference not retained. CMP compares register sized values, with one
(CMP)
exception.
The CALL and RETURN instructions interrupt the flow of a program by
passing control to an internal or external subroutine. An external subroutine
CALL and
is another program. The RETURN instruction returns control from a
RETURN
subroutine back to the calling program and optionally returns a value.
 
TEST instructions perform the AND of two operands without retaining the
  TEST result, and so on.
 
 
Now let us move further, these all are unconditional jumps or unconditional branching,
which means there is no certain condition based on which they can jump or alter the
execution sequence.
Status Bit Conditions 
To check different conditions for branching instructions like CMP (compare) or TEST
can be used. Certain status bit conditions are set as a result of these operations.
V Z S C
 
Status bits mean that the value will be either 0 or 1 as it is a bit. We have four status
bits:
 "V" stands for Overflow
  "Z" stands for Zero
 "S" stands for the Sign bit
  "C" stands for Carry. 
 
Now, these will be set or reset based on the ALU (Arithmetic Logic Unit) operation
carried out into the CPU. Let us discuss these bits before understanding the operation. 
 Overflow(V) is based on certain bits, i.e., if extra bits are generated into our
operation. Then we have Zero (Z).
 If the output of the ALU(Arithmetic Logic Unit) is 0, then the Z flag is set to 1,
otherwise, it is set to 0. 
 If the number is positive, the Sign(S) flag is 0, and if the number is negative, the
Sign flag is 1.
 We have Carry(C), if the output of the thirst ALU operation generates Carry, then C
is set to 1, else C is set to 0.

Let's see how these flags are affected. You can see in the figure this is an 8-bit ALU that
performs arithmetic or logic operations on our data. Suppose we have two operands A
and B of 8-bits on which we are performing certain arithmetic or logic operations.
Arithmetic operation-addition is performed on A and B. We know that an extra Carry bit
may be generated, which means eight Carry bits are generated. If the addition operation
is performed on operands A and B, then the carry bits C0 to C7 may be generated. But
we know that extra Carry may also be generated, which we term as C8. If C8 is
generated, i.e., Carry is generated, reflecting our Carry flag, which results in the C flag
or C status bit being set to 1. 
Let's move further to the last two carries, C7 and C8. If the XOR of these two carries
comes out to be 1, then we can say that the Overflow condition has happened and the
V flag is set to 1; otherwise, it's set to 0. This is the most occurring case when we have
negative numbers represented in 2's complement form.
 
Now moving on to the next flag which is the sign flag(S), the sign flag is set to 1 or 0
based on the output of the 8 bit ALU. As we know that if the number is positive, then the
most significant bit of a number is represented to be 0, which means if F7 is 0 then we
can say that the number is positive and if F7 is 1 then we say that the number is
negative.
And lastly, we have a Zero flag, Zero status bit Z, "Z" is said to 1 if the output of all the
bits from F0 to F7 is 0, then we can say that the zero flag is SET.
Now all these four bits that are "V", "Z", "S" and "C" are reflected based on the
arithmetic or logic operation carried out on the 8 bit ALU. 
Also See, Shift Registers in Digital Electronics
Conditional Branch Instructions
A conditional branch instruction is basically used to examine the values that are stored
in the condition code register to examine whether the specific condition exists and to
branch if it does. 
Conditional branch instructions such as ‘branch if zero’ or ‘branch if positive’ specify the
condition to transfer the execution flow. The branch address will be loaded in the
program counter when the condition is met.
Each conditional branch instruction tests for a different combination of Status bits for a
condition