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    GyanVirSingh (0 0)

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    Ronnit Shukla
    Gyan Vir Singh is seeking a job in the VLSI domain with 2 months of experience as a verification intern. He has a strong academic background graduating with 74.4% from BTech in Electronics and Communication Engineering. He is currently pursuing his MTech in VLSI Design from National Institute of Technology Hamirpur with a CGPA of 8.91/10. His technical skills include Verilog, SystemVerilog, Python, UVM, Vivado, ModelSim and system level languages. He has work experience in AHB-APB bridge verification and has completed projects in humidity indication, traffic light control and bidirectional counters.

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    GyanVirSingh (0 0)

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    Ronnit Shukla
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    Gyan Vir Singh is seeking a job in the VLSI domain with 2 months of experience as a verification intern. He has a strong academic background graduating with 74.4% from BTech in Electronics and Communication Engineering. He is currently pursuing his MTech in VLSI Design from National Institute of Technology Hamirpur with a CGPA of 8.91/10. His technical skills include Verilog, SystemVerilog, Python, UVM, Vivado, ModelSim and system level languages. He has work experience in AHB-APB bridge verification and has completed projects in humidity indication, traffic light control and bidirectional counters.

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    Gyan Vir Singh is seeking a job in the VLSI domain with 2 months of experience as a verification intern. He has a strong academic background graduating with 74.4% from BTech in Electronics and Communication Engineering. He is currently pursuing his MTech in VLSI Design from National Institute of Technology Hamirpur with a CGPA of 8.91/10. His technical skills include Verilog, SystemVerilog, Python, UVM, Vivado, ModelSim and system level languages. He has work experience in AHB-APB bridge verification and has completed projects in humidity indication, traffic light control and bidirectional counters.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    20 views2 pages

    GyanVirSingh (0 0)

    Uploaded by

    Ronnit Shukla
    Gyan Vir Singh is seeking a job in the VLSI domain with 2 months of experience as a verification intern. He has a strong academic background graduating with 74.4% from BTech in Electronics and Communication Engineering. He is currently pursuing his MTech in VLSI Design from National Institute of Technology Hamirpur with a CGPA of 8.91/10. His technical skills include Verilog, SystemVerilog, Python, UVM, Vivado, ModelSim and system level languages. He has work experience in AHB-APB bridge verification and has completed projects in humidity indication, traffic light control and bidirectional counters.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 2

    Gyan Vir Singh

    Phone number : +91-6396190929


    Email address : [email protected]
    LinkedIN : www.linkedin.com/in/gyan-vir-singh-953690114

    PROFILE SCHOLASTIC ACHIEVEMENTS

     Seeking for a job in VLSI Domain.  Qualifies JEE MAINS 2014 was amongst the
     2 month experience as an Verification Intern in top 5.0% of the total candidates appeared.
    Maven Silicon.  Qualifies UPTU 2014 (STATE ENGINEERING
     Academic course work focusing on VLSI Design. ENTRANCE), was amongst the top 0.25% of
     Pro Active, Enthusiastic Team Player, the total candidates appeared.
    Enjoy Problem Solving, Quick in adapting  Qualifies GATE (Graduate Aptitude Test in
    New technologies Engineering) EXAM – 2020.
     Awarded as a BEST PAINTER at District
    Level.
    st
    EDUCATION  Won 1 prize in 100 meter Race, Kabaddi and
    won some other prizes in other sports activity
    in sports Olympiad at school competitions.
    09/2020 – 09/2022 HAMIRPUR, INDIA nd
     Win 2 Prize in Essay writing competition in
    VLSI DESIGN | M-TECH Hindi Pakhwada at school level.
    National Institute Of Technology Hamirpur
    CGPI :- 8.91/10 (Till II Semester)
    STRENGTHS
    08/2014 – 08/2018 RAEBAREILLY, INDIA
    Electronics And Communication # Ability to prioritize # Creativity # Flexibility
    Engineering | B-Tech # Critical Thinking # Initiative # Leadership
    Feroze Gandhi Institute Of Engineering And # Teamwork
    Technology
    Percentage :- 74.4%
    CERTIFICATE
    AGRA, INDIA
    Class XII
    9/7/2021
    Kendriya Vidyalaya No. 1 AFS Agra
    Percentage :- 70.33 % Verilog for an FPGA engineer with Xilinx
    Vivado Design Suite (UDEMY)
    AGRA, INDIA 9/7/2021
    Class X VLSI Verification Internship (Maven Silicon)
    Kendriya Vidyalaya No. 1 AFS Agra
    CGPA :- 8.6/10 07/2017
    Training Certificate
    DRDO (Defence Research And Develo. Org.)
    TECHNICAL SKILLS 12/2020
    Global Satellite Navigation System
     LANGUAGES ISRO (Indian Space Research Organisation)
    Programming Technologies: Verilog, System Verilog,
    Python
    Verification Technologies: System Verilog, UVM PROJECT UNDERTAKEN
     SOFTWARE SKILLS
    Micosoft Offices  Verification Internship in Maven Silicon
    Libre Offices Topic : AHB-APB Bridge Verification by
    developing class based verification
    environment using System Verilog HVL
     OPERATING SYSTEM
    Windows, Linux th
     B-Tech 4 Year Major project
    Topic : Humidity Indicator And Controller
     TOOLS
    Xilinx (Vivado), ModelSim, Tanner(EDA)tool, LTspice
    th
     B-Tech 4 Year Minor project
    RELEVANT COURSES DONE Topic : Bidirectional Visitors Counters

     Summer Internship in DRDO (Defence


    Switching Theory And Logic Design, Electronics Research And Development organization)
    Devices and Circuit theory, Characterization of Topic : Traffic light Controller Using Arduino
    Semiconductors, Digital VLSI Design, Digital ASIC
    Design

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