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2018 - FPGA - Implementation - of - Filtering - Algorithm - For - Multispectral - Satellite - Image

1) The document describes a hardware implementation of a filtering algorithm for multispectral satellite images using an FPGA. 2) The proposed method includes preprocessing the image, implementing the filtering algorithm in Verilog code, and simulating and testing the output both in MATLAB and on the FPGA. 3) The performance is analyzed by comparing the peak signal to noise ratio (PSNR) calculated in MATLAB and from the FPGA implementation output.

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0% found this document useful (0 votes)
8 views5 pages

2018 - FPGA - Implementation - of - Filtering - Algorithm - For - Multispectral - Satellite - Image

1) The document describes a hardware implementation of a filtering algorithm for multispectral satellite images using an FPGA. 2) The proposed method includes preprocessing the image, implementing the filtering algorithm in Verilog code, and simulating and testing the output both in MATLAB and on the FPGA. 3) The performance is analyzed by comparing the peak signal to noise ratio (PSNR) calculated in MATLAB and from the FPGA implementation output.

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Saru 2002
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Proceedings of the Second International Conference on Inventive Systems and Control (ICISC 2018)

IEEE Xplore Compliant - Part Number:CFP18J06-ART, ISBN:978-1-5386-0807-4; DVD Part Number:CFP18J06DVD, ISBN:978-1-5386-0806-7

FPGA Implementation of Filtering Algorithm for


Multispectral Satellite Image
STEFFI SHAKILA P VINOTH THYAGARAJAN V RAJARAM S
PG scholar Assistant professor Associate Professor
Department of ECE Department of ECE Department of ECE
Thiagarajar college of Engineering , Thiagarajar college of Engineering , Thiagarajar college of Engineering,
Madurai,India Madurai,India Madurai,India

Abstract— Onboard processing of remotely sensed multispectral exploitation of multispectral data sets in various
data is a highly desirable goal in many applications.For this applications[8][9].
aspiration, compact reconfigurable hardware modules such as
field programmable gate arrays(FPGAs) are popularly used.In II. PROPOSED METHOD
this paper, a hardware implementation of filtering algorithm on
multispectral satellite image was proposed.Filtering is a process
start
used to smooth the image.The performance of the system was
analyzed in terms of peak signal to noise ratio(PSNR). Verilog
language was used for hardware representation and Matlab was
used for software processing.The simulation part was carried out
using Verilog HDL language in Quartus II tool and Pre-processing
(RGB to gray, image to
implementation was done in Altera cyclone II EP2C20F484C7 Upload on SRAM
hex file)
using FPGA DE1 kit.

Keywords— Multispectral image,filtering,field programmable


Filtering algorithm
gate arrays(FPGAs).
Verilog code for
I. INTRODUCTION filtering algorithm

Recently, Field Programmable Gate Array (FPGA) Simulation


output
technology has become a viable target for the implementation MATLAB
of algorithms handling huge data set. In applications like
remote sensing and satellite image processing the image size
and bit, depth increases, as a result, the computational FPGA Compare performance and
complexity and time increases. Hardware implementation implementation Implementation analysis of implementation
output and simulation output
offers the better solution, but one must consider the increase in using quartus

development time inherent in creating a hardware


design[1][2]. FPGA suites this types of application because of
its prefabricated and reconfigurable structures.
In electromagnetic spectrum the multispectral PSNR
satellite image data within specific wavelength ranges.The
multispectral image has 4-10 bands.Reconfigurable field-
programmable gate arrays (FPGAs) are promising platforms
that allow hardware/software co-design and the potential Figure 1: system design
provide effective onboard computing capabilities and
adaptability at the same time[3].The main challenge in satellite The design of the system has two operating tools that
image processing is reducing the data volume[4]. is Matlab andquartusII. The Matlab is a software tool it is
FPGA provides an efficient compression of used to calculate the manual calculation. The quarts tool used
multispectral images in order to save bandwidth and storage to create the filtering algorithm in Verilog HDL language.
space[5][6].It reduces mathematical complexity,latency Verilog language is used for Hardware representation. Finally,
without losing reliability[7].multispectral data onboard compare the PSNR calculation of Matlab and Quartus II.This
satellite imaging platforms in order to reduce downlink process is explained in detailed manner as follows
connection requirements and perform a more efficient

978-1-5386-0807-4/18/$31.00 ©2018 IEEE 1006


uthorized licensed use limited to: AMRITA VISHWA VIDYAPEETHAM AMRITA SCHOOL OF ENGINEERING. Downloaded on July 27,2023 at 19:02:03 UTC from IEEE Xplore. Restrictions appl
Proceedings of the Second International Conference on Inventive Systems and Control (ICISC 2018)
IEEE Xplore Compliant - Part Number:CFP18J06-ART, ISBN:978-1-5386-0807-4; DVD Part Number:CFP18J06DVD, ISBN:978-1-5386-0806-7

A.PREPROCESSING
The main aim of the preprocessing is an 1/9 1/9 1/9
improvement of the image data that suppresses unwanted
distortions or enhances some image features important for
further processing. The input image is a three-dimensional 1/9 1/9 1/9
colored image, It must be converted to a grayscale image then
the image is resized with the resolution of 25*25 the resized
image is fed as input to QuartusII simulator for further 1/9 1/9 1/9
processing.
B.GRAYSCALE CONVERSION
Matlab convert an RGB image to grayscale.As a
result, an 8-bit image is received which have possible values Figure 2:3×3 Averaging Kernel Window
from 0 to 255.But in real time, image taken from the camera is
an RGB image but there is no function available there and it is
filtered values
converted in grey scale by using the following general formula unfiltered
Grayscale =0.2*R+0.59*G+0.11*B values * * *
Where 5 3 6
R-Red value * 5 *
G-Green value 2 1 9
B-Blue value * * *
C.IMAGE TO HEX FILE CONVERSION 8 4 7
To process the .bmp image on FPGA, the image is
converted from bitmap to hexadecimal format.Because the
hardware tool does not understand direct image so that using
Matlab the bitmap image is converted to .hex file. Image size Mean:
is 25*25 and the hex file includes R, G, B data of the bitmap 5+3+6+2+1+9+8+4+7=45
image. 45/9=5
D.IMPULSE NOISE
The impulse noise occurs due to the faulty memory F.PEAK SIGNAL TO NOISE RATIO
locations, malfunctioning pixel elements in the camera The mean square error(MSE) and the peak signal to
sensors, timing errors in the process of digitization.The noise ratio(PSNR) are the two error metrics used to compare
impulse noise also called salt and pepper noise,shot image compression quality. The calculation of Peak signal-to-
noise,spike noise.For 8 bit image, the pixel value of 255 noise ratio is the ratio between the maximum possible power
represents the salt noise and 0 represents pepper noise.Reasons of a signal and the power of corrupting noise that affects the
for Salt and Pepper Noise: fidelity of its representation. PSNR is denoted in terms of the
a. memory cell failure. logarithmic decibel scale.
b. malfunctioning of camera’s sensor cells. PSNR is used to measure the quality of a
c.synchronization errors in image digitizing or transmission. reconstructed image.For an example take image compression,
E.REMOVAL OF NOISE USING MEAN FILTER in this case, the signal is the original data, compression
Mean filter used to remove noise from the image it is introduced the noise in original data that is the error.A higher
a linear method.It is used reducing the amount of intensity PSNR indicates that the reconstruction is of higher quality.
variation between one pixel and the next. It is often used to Given a noise-free m×n monochrome image I and its noisy
remove noise from image and smoothing the image.The mean approximation K, MSE is defined as:
filter works by functioning through the image pixel by pixel
and replacing each pixel value in an image with the average
MSE
value of its neighbors, including itself. This has the effect of
discard the pixel values which are unrepresentative of their
surroundings. PSNR=10log( )
Mean filter is also knowing as a convolution filter.
Convolutions it is based around a kernel, which represents the
shape and size of the neighborhood to be sampled when =
calculating the mean. A 3×3 square kernel is used, as shown in
Figure 1, although larger kernels can be used for more severe Here is the maximum possible pixel value of
smoothing. Mean filter causes a certain amount of blurring to the image. when the pixels are represented using 8bits per
the image, thereby reducing the effect of noise. The amount of sample, this is 255.
blurring proportional to the window size.

978-1-5386-0807-4/18/$31.00 ©2018 IEEE 1007


uthorized licensed use limited to: AMRITA VISHWA VIDYAPEETHAM AMRITA SCHOOL OF ENGINEERING. Downloaded on July 27,2023 at 19:02:03 UTC from IEEE Xplore. Restrictions appl
Proceedings of the Second International Conference on Inventive Systems and Control (ICISC 2018)
IEEE Xplore Compliant - Part Number:CFP18J06-ART, ISBN:978-1-5386-0807-4; DVD Part Number:CFP18J06DVD, ISBN:978-1-5386-0806-7

G.IMAGE CONVERSION 2D TO 1D III. RESULTS AND DICUSSION


A.SIMULATION RESULTS USING QUARTUS II
In quartusII tool, the image file does not read directly
so that the image file is first converted into hex file format
using Matlab.In Matlab the image values represented in 2D
format,Quartus it is represented by an array format.Each
memory address has the 16-bit data.

H.FILE READING USING QUARTUS II

Using Verilog HDL language the .hex file is read in


quartsIItool.The image size is 25*25 in matrix representation
in .hex file it contains 25*25*3=1875 values.The arrangement
of values with respect to the image is not in correct format.The Figure 4 Pixel values of multispectral satellite image
arrangement of hexadecimal values with corresponding to the
unsigned decimal value of the image is the major
challenge.Using Verilog HDL language the .hex file is
arranged with respect to the image.

The mean filtering algorithm is used to remove the


salt and pepper noise from the image. Mean filtering is also
called as an average filtering. The mean filter works by
moving through the image pixel by pixel, replacing each pixel
value in an image with the average value of its neighbors. The
filtering algorithm is written in Verilog HDL
language.Simulate the filtering algorithm in the quartusII tool
the resultant waveform shows the hexadecimal values of a
filtered image. Figure 5: RGB value of the input image pixels

I.WRITING TO SRAM USING CONTROL PANEL The above Figure 4 shows the pixel values of the
The Control Panel facility in DE1 board that allows a input image in hexadecimal format.For every clk cycle it will
user to access various components on the board through a return a pixel value of the image.The hexadecimal value is not
USB connection from a host computer.Using the Quartus II in organized value of the image.Using Verilog HDL code the
software the Control Panel can be used to write/read data image pixel values separated by corresponding band and the
to/from the SDRAM and SRAM chips on the DE1 board. The organized value are stored in separate registers shows in
figure of file writing in SRAM as shown in figure(3). Figure (5).

Figure 6:Filtered Value of the Image

INPUT :clk,R,G,B
OUTPUT: A_OUT
The final result of the proposed idea is shown in
Figure 6.It contains the input data that is loaded for the
process and output data of proposed idea. As each input values
Figure 3:File writing in SRAM consists of 8bits, the hexadecimal representation of the

978-1-5386-0807-4/18/$31.00 ©2018 IEEE 1008


uthorized licensed use limited to: AMRITA VISHWA VIDYAPEETHAM AMRITA SCHOOL OF ENGINEERING. Downloaded on July 27,2023 at 19:02:03 UTC from IEEE Xplore. Restrictions appl
Proceedings of the Second International Conference on Inventive Systems and Control (ICISC 2018)
IEEE Xplore Compliant - Part Number:CFP18J06-ART, ISBN:978-1-5386-0807-4; DVD Part Number:CFP18J06DVD, ISBN:978-1-5386-0806-7

corresponding pixel values contain 2 hexadecimal digits.In


mean filtering process the 3*3 kernal window is convolved
with the input image.The output register value is 8bit but if the
resultant value is more than 8bit the truncation effect will
occur.In the final filtered image each pixel values of the input
image is replaced by average value.

KEYWORD EXPLANATION
Clk Clock period
TEMP Hex value of the input image

R Indicate R band values of an image

G Indicate G band values of an image Figure 9 :Altra DE1 Board

B Indicate B band values of an image In Figure(8) shows the control panel setup using this
control panel the operation of read and Write into the SRAM
The resultant value after filtering the
A_OUT is done.to read the data in SRAM, specified the address line in
image by mean filter control panel and the value of stored data is displayed in the
DE1kit using LED’s shown in Figure(9).

B.FPGA IMPLEMENTATION RESULTS C.SIMULATION RESULTS USING MATLAB

The input image(bmp) is resized to


25*25preprocessed and converted into .hex format using
Matlab software. The hexadecimal format of the image is fed
to QuartsII and after processing the .hex format is converted
into bmp and its displayed using Matlab software.

Figure 7:Programmer Window

The above figure 7 shows the programmer


window.Add the DE1_USB_API.sof file to the programmer if
it is successful then DE1kit act as a control panel.
Figure 10: Input Image

Figure 8 DE1 Control Panel Figure 11:Filtered Image

978-1-5386-0807-4/18/$31.00 ©2018 IEEE 1009


uthorized licensed use limited to: AMRITA VISHWA VIDYAPEETHAM AMRITA SCHOOL OF ENGINEERING. Downloaded on July 27,2023 at 19:02:03 UTC from IEEE Xplore. Restrictions appl
Proceedings of the Second International Conference on Inventive Systems and Control (ICISC 2018)
IEEE Xplore Compliant - Part Number:CFP18J06-ART, ISBN:978-1-5386-0807-4; DVD Part Number:CFP18J06DVD, ISBN:978-1-5386-0806-7

[3] Lucana Santos, Luis Berrojo, Javier Moreno, José Fco.


IMAGE López, and Roberto Sarmiento, “Multispectral and
MODE MSE PSNR Hyperspectral Lossless Compressor for Space Applications
SIZE
Implementation 25*25 54.9408 30.731 (HyLoC): A Low-Complexity FPGA Implementation of the
CCSDS 123 Standard’’,IEEE Journal of Selected Topics in
Simulation 25*25 55.5581 30.683 Applied Earth Observations and Remote Sensing Volume:
9, Issue: 2, Feb. 2016.
Table 1: PSNR Results Comparison
[4]QianXu,SrenivasVaradarajan,ChaitaliChakrabarti,Lina J.
Karam,“A Distributed Canny Edge Detector: Algorithm and
IV. CONCLUSION
FPGA Implementation’’,IEEE Transactions on image
Recently Field Programmable Gate Array(FPGA) processing volume: 23, Issue: 7, July 2014
technology has become a viable target for the implementation
of algorithms handling huge data set. The objective of the [5] Sebastian Lopez, Tanya Vladimirova, Carlos Gonza ´lez,
project was hardware implementation of the filtering Javier Resano, Daniel Mozos and Antonio Plaza, “The
algorithm on multispectral image and comparing the Promise of ReconFigureurable Computing for Hyperspectral
performance in term of PSNR for the simulation and Imaging OnboardSystems:A Review and Trends’’IEEE | Vol.
implementation results. The objective has been achieved by 101, No. 3, March 2013
using Matlab for simulation and Quartus II for hardware
implementation.The organization of the hex file used for the [6] Sebastian Lopez, Tanya Vladimirova, Carlos Gonza ´lez,
simulation and implementation were not same. As a Javier Resano, Daniel Mozos and Antonio Plaza, “The
preprocessing the hex file were reorganized and the Promise of ReconFigureurable Computing for Hyperspectral
corresponding bands were stored in separate registers. The Imaging OnboardSystems:A Review and Trends’’IEEE | Vol.
resultant filtered output was not same as the simulated values 101, No. 3, March 2013
due to truncation effect. As indicated in table 1 the PSNR
value for the simulation and implementation remains the same [7] C. Gonzalez, S. Sanchez, A. Paz, J. Resano, D. Mozos, and
whereas the MSE value is less when compared with A. Plaza, “Use of FPGA or GPU-based architectures for
simulation results. Due to the truncation effect the MSE remotely sensed hyperspectral image processing,” Integr.
values are changed but it does not affect the PSNR value. VLSI J., vol. 46, no. 2, pp. 89–103, 2013.
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with the implementation. The entire process was implemented [8] Carlos González, Javier Resano,Antonio Plaza and Daniel
using Altera cyclone II EP2C20F484C7 device FPGA. Mozos,“FPGA Implementation of Abundance Estimation for
The real time implementation of dumping of the hex Spectral Unmixing of Hyperspectral Data Using the Image
file of the chosen multispectral image in the onboard SRAM Space Reconstruction Algorithm’’IEEE Journal Of Selected
memory available in DE1 FPGA board was completed. As a Topics In Applied Earth Observations And Remote Sensing,
future work, the sequential fetching of data from the memory Vol. 5, No. 1, February 2012
and real time implementation of the filtering, followed by the
calculation of the PSNR value will be done. [9] C. Gonzalez, D. Mozos, J. Resano, and A. Plaza, “FPGA
implementation of the N-FINDR algorithm for remotely
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[1] Ernestina Martel, Raul Guerra, Sebastian,Lopez and Remote Sens., vol. 50, no. 2, pp. 374–388,Feb. 2012.
Roberto Sarmiento,“A GPU-Based Processing Chain for
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