Infineon IRFR540Z DataSheet v01 01 EN-3166491

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PD - 96141B

IRFR540ZPbF
Features IRFU540ZPbF
l Advanced Process Technology
l Ultra Low On-Resistance HEXFET® Power MOSFET
l 175°C Operating Temperature
l Fast Switching D
l Repetitive Avalanche Allowed up to Tjmax VDSS = 100V
l Lead-Free
l Halogen-Free RDS(on) = 28.5mΩ
G
Description
This HEXFET® Power MOSFET utilizes the latest ID = 35A
S
processing techniques to achieve extremely low
on-resistance per silicon area. Additional features
of this design are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating. These features
combine to make this design an extremely efficient
and reliable device for use in a wide variety of
applications.
D-Pak I-Pak
IRFR540ZPbF IRFU540ZPbF
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 35
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 25 A
IDM Pulsed Drain Current c 140
P D @T C = 25°C Power Dissipation 91 W
Linear Derating Factor 0.61 W/°C
V GS Gate-to-Source Voltage ± 20 V
d
E AS (Thermally limited) Single Pulse Avalanche Energy 39 mJ
E AS (Tested ) Single Pulse Avalanche Energy Tested Value h 75
IAR Avalanche Current c See Fig.12a, 12b, 15, 16 A
E AR Repetitive Avalanche Energy g mJ
TJ Operating Junction and -55 to + 175
T STG Storage Temperature Range °C
Reflow Soldering Temperature, for 10 seconds 300
Mounting Torque, 6-32 or M3 screw y
10 lbf in (1.1N m)y
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case j ––– 1.64
RθJA Junction-to-Ambient (PCB mount) ij ––– 40 °C/W
RθJA Junction-to-Ambient j ––– 110
HEXFET® is a registered trademark of International Rectifier.
www.irf.com 1
09/30/10
IRFR/U540ZPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.092 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– 22.5 28.5 mΩ VGS = 10V, ID = 21A e
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 50µA
gfs Forward Transconductance 28 ––– ––– S VDS = 25V, ID = 21A
IDSS Drain-to-Source Leakage Current ––– ––– 20 µA VDS = 100V, VGS = 0V
––– ––– 250 VDS = 100V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 200 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -200 VGS = -20V
Qg Total Gate Charge ––– 39 59 ID = 21A
Qgs Gate-to-Source Charge ––– 11 ––– nC VDS = 50V
Qgd Gate-to-Drain ("Miller") Charge ––– 12 ––– VGS = 10V e
td(on) Turn-On Delay Time ––– 14 ––– VDD = 50V
tr Rise Time ––– 42 ––– ID = 21A
td(off) Turn-Off Delay Time ––– 43 ––– ns RG = 13 Ω
tf Fall Time ––– 34 ––– VGS = 10V e
LD Internal Drain Inductance ––– 4.5 ––– Between lead, D

nH 6mm (0.25in.)
G
LS Internal Source Inductance ––– 7.5 ––– from package
and center of die contact S

Ciss Input Capacitance ––– 1690 ––– VGS = 0V


Coss Output Capacitance ––– 180 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 100 ––– pF ƒ = 1.0MHz
Coss Output Capacitance ––– 720 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance ––– 110 ––– VGS = 0V, VDS = 80V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 190 ––– VGS = 0V, VDS = 0V to 80V f
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 35 MOSFET symbol
(Body Diode) A showing the
ISM Pulsed Source Current ––– ––– 140 integral reverse
(Body Diode) c p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 21A, VGS = 0V e
trr Reverse Recovery Time ––– 32 48 ns TJ = 25°C, IF = 21A, VDD = 50V
Qrr Reverse Recovery Charge ––– 40 60 nC di/dt = 100A/µs e
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

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IRFR/U540ZPbF

1000 1000
VGS ≤60µs PULSE WIDTH VGS
TOP 15V TOP 15V
10V Tj = 25°C 10V
8.0V 8.0V
ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)


7.0V 7.0V
6.0V 6.0V
5.5V 5.5V
100 5.0V 100 5.0V
BOTTOM 4.5V BOTTOM 4.5V

10 10 4.5V

≤60µs PULSE WIDTH


4.5V Tj = 175°C
1 1
0.1 1 10 100 0.1 1 10 100
VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 70
TJ = 25°C
Gfs , Forward Transconductance (S)

60
ID, Drain-to-Source Current(Α)

100
50

TJ = 175°C 40
10 TJ = 175°C
30

TJ = 25°C 20
1

VDS = 25V 10 VDS = 10V


≤60µs PULSE WIDTH 380µs PULSE WIDTH
0.1 0
2 3 4 5 6 7 8 0 10 20 30 40 50

VGS, Gate-to-Source Voltage (V) ID,Drain-to-Source Current (A)

Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance


vs. Drain Current
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IRFR/U540ZPbF

3000 20
VGS = 0V, f = 1 MHZ ID= 21A
Ciss = Cgs + Cgd, Cds SHORTED

VGS, Gate-to-Source Voltage (V)


2500 Crss = Cgd VDS = 80V
16 VDS= 50V
Coss = Cds + Cgd
VDS= 20V
C, Capacitance(pF)

2000
Ciss 12

1500
8
1000

4
500
Coss
Crss 0
0
0 10 20 30 40 50 60
1 10 100
QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance vs. Fig 6. Typical Gate Charge vs.


Drain-to-Source Voltage Gate-to-Source Voltage

1000.0 1000
OPERATION IN THIS AREA
LIMITED BY R DS (on)
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)

100.0 100
100µsec
TJ = 175°C 1msec

10.0 10

TJ = 25°C
10msec
1.0 1
Tc = 25°C
Tj = 175°C DC
VGS = 0V Single Pulse
0.1 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 1 10 100 1000

VSD, Source-to-Drain Voltage (V) VDS , Drain-toSource Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area


Forward Voltage
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IRFR/U540ZPbF

40 2.5
ID = 21A

RDS(on) , Drain-to-Source On Resistance


VGS = 10V

30 2.0
ID , Drain Current (A)

(Normalized)
20 1.5

10 1.0

0 0.5
25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100 120 140 160 180

TC , CaseTemperature (°C) TJ , Junction Temperature (°C)

Fig 9. Maximum Drain Current vs. Fig 10. Normalized On-Resistance


Case Temperature vs. Temperature

10
Thermal Response ( ZthJC )

1
D = 0.50
0.20
0.10 R1 R2 R3
R1 R2 R3 Ri (°C/W) τi (sec)
0.1 0.05 τJ
τJ
τC
τ
2.626 0.000052
τ1
0.02 τ1
τ2
τ2
τ3
τ3 0.6611 0.001297
0.01
Ci= τi/Ri 0.7154 0.01832
Ci i/Ri
0.01
SINGLE PULSE Notes:
( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRFR/U540ZPbF

160
15V

EAS, Single Pulse Avalanche Energy (mJ)


I D
TOP 6.5A
9.4A
L DRIVER 120
VDS BOTTOM 21A

RG D.U.T +
V
- DD
IAS A 80
20V
VGS
tp 0.01Ω

Fig 12a. Unclamped Inductive Test Circuit 40


V(BR)DSS
tp

0
25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

I AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
vs. Drain Current
QG

10 V
QGS QGD 4.5
ID = 1.0mA
ID = 250µA
VGS(th) Gate threshold Voltage (V)

4.0
VG ID = 50µA

3.5

Charge 3.0
Fig 13a. Basic Gate Charge Waveform
2.5

2.0

L 1.5
VCC
DUT
0 1.0
1K -75 -50 -25 0 25 50 75 100 125 150 175

TJ , Temperature ( °C )

Fig 13b. Gate Charge Test Circuit Fig 14. Threshold Voltage vs. Temperature
6 www.irf.com
IRFR/U540ZPbF

100

Duty Cycle = Single Pulse


Allowed avalanche Current vs
Avalanche Current (A)

10 avalanche pulsewidth, tav


0.01 assuming ∆Tj = 25°C due to
avalanche losses
0.05
0.10
1

0.1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

Fig 15. Typical Avalanche Current vs.Pulsewidth

40 Notes on Repetitive Avalanche Curves , Figures 15, 16:


TOP Single Pulse (For further info, see AN-1005 at www.irf.com)
BOTTOM 1% Duty Cycle 1. Avalanche failures assumption:
ID = 21A Purely a thermal phenomenon and failure occurs at a
EAR , Avalanche Energy (mJ)

30 temperature far in excess of T jmax. This is validated for


every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
20
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
10 voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
0 tav = Average time in avalanche.
25 50 75 100 125 150 175 D = Duty cycle in avalanche = tav ·f
Starting TJ , Junction Temperature (°C) ZthJC(D, tav ) = Transient thermal resistance, see figure 11)

PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC


Fig 16. Maximum Avalanche Energy Iav = 2DT/ [1.3·BV·Zth]
vs. Temperature EAS (AR) = PD (ave)·tav
www.irf.com 7
IRFR/U540ZPbF

Driver Gate Drive


P.W.
D.U.T P.W.
Period D=
Period
+

ƒ
*
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚ Recovery Body Diode Forward
- „ + Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • dv/dt controlled by RG VDD Re-Applied


• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• I SD controlled by Duty Factor "D" - Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

RD
V DS

VGS
D.U.T.
RG
+
-VDD

10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

Fig 18a. Switching Time Test Circuit

VDS
90%

10%
VGS
td(on) tr t d(off) tf

Fig 18b. Switching Time Waveforms

8 www.irf.com
IRFR/U540ZPbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)

D-Pak (TO-252AA) Part Marking Information


EXAMPLE: THIS IS AN IRFR120
PART NUMBER
WITH AS SEMBLY INTERNATIONAL
LOT CODE 1234 RECTIFIER IRFR120 DATE CODE
AS SEMBLED ON WW 16, 2001 LOGO 116A YEAR 1 = 2001
IN THE ASS EMBLY LINE "A" 12 34 WEEK 16
LINE A
Note: "P" in assembly line position AS SEMBLY
indicates "Lead-Free" LOT CODE
"P" in assembly line position indicates
"Lead-Free" qualification to the consumer-level

PART NUMBER
INTERNATIONAL
OR RECTIFIER IRFR120
DATE CODE
P = DESIGNATES LEAD-FREE
LOGO PRODUCT (OPTIONAL)
12 34
P = DESIGNATES LEAD-FREE
ASS EMBLY PRODUCT QUALIFIED TO THE
CONSUMER LEVEL (OPTIONAL)
LOT CODE
YEAR 1 = 2001
WEEK 16
A = AS SEMBLY S ITE CODE

Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
www.irf.com 9
IRFR/U540ZPbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)

I-Pak (TO-251AA) Part Marking Information


EXAMPLE: T HIS IS AN IRF U120 PART NUMBER
INT ERNATIONAL
WIT H AS SEMBLY
RECTIF IER IRFU120 DAT E CODE
LOT CODE 5678
LOGO 119A YEAR 1 = 2001
AS SEMBLED ON WW 19, 2001
56 78 WEEK 19
IN THE ASS EMB LY LINE "A"
LINE A
ASS EMBLY
LOT CODE
Note: "P" in ass embly line pos ition
indicates Lead-Free"

OR
PART NUMB ER
INT ERNATIONAL
RECTIFIER IRFU120 DAT E CODE
LOGO P = DESIGNAT ES LEAD-F REE
56 78 PRODUCT (OPT IONAL)
YEAR 1 = 2001
ASSEMBLY
LOT CODE WEEK 19
A = ASSEMBLY SITE CODE

Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
10 www.irf.com
IRFR/U540ZPbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR TRR TRL

16.3 ( .641 ) 16.3 ( .641 )


15.7 ( .619 ) 15.7 ( .619 )

12.1 ( .476 ) 8.1 ( .318 )


FEED DIRECTION FEED DIRECTION
11.9 ( .469 ) 7.9 ( .312 )

NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.

13 INCH

16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

Notes:
 Repetitive rating; pulse width limited by „ Coss eff. is a fixed capacitance that gives the same charging time
max. junction temperature. (See fig. 11). as Coss while VDS is rising from 0 to 80% VDSS .
‚ Limited by TJmax, starting TJ = 25°C, L = 0.17mH Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
RG = 25Ω, IAS = 21A, VGS =10V. Part not avalanche performance.
recommended for use above this value. † This value determined from sample failure population. 100%
ƒ Pulse width ≤ 1.0ms; duty cycle ≤ 2%. tested to this value in production.
‡ When mounted on 1" square PCB (FR-4 or G-10 Material) .
ˆ Rθ is measured at TJ approximately 90°C

Data and specifications subject to change without notice.


This product has been designed for the Industrial market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.09/2010
www.irf.com 11
IMPORTANT NOTICE
The information given in this document shall in no For further information on the product, technology,
event be regarded as a guarantee of conditions or delivery terms and conditions and prices please
characteristics (“Beschaffenheitsgarantie”) . contact your nearest Infineon Technologies office
(www.infineon.com).
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon WARNINGS
Technologies hereby disclaims any and all Due to technical requirements products may
warranties and liabilities of any kind, including contain dangerous substances. For information on
without limitation warranties of non-infringement the types in question please contact your nearest
of intellectual property rights of any third party. Infineon Technologies office.
In addition, any information given in this document Except as otherwise explicitly approved by Infineon
is subject to customer’s compliance with its Technologies in a written document signed by
obligations stated in this document and any authorized representatives of Infineon
applicable legal requirements, norms and Technologies, Infineon Technologies’ products may
standards concerning customer’s products and any not be used in any applications where a failure of
use of the product of Infineon Technologies in the product or any consequences of the use thereof
customer’s applications. can reasonably be expected to result in personal
injury.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.
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