TDA6107Q
TDA6107Q
DATA SHEET
TDA6107Q
Triple video output amplifier
Product specification 1999 Oct 26
Supersedes data of 1999 Jun 18
File under Integrated Circuits, IC02
Philips Semiconductors Product specification
ORDERING INFORMATION
TYPE PACKAGE
NUMBER NAME DESCRIPTION VERSION
TDA6107Q DBS9MPF plastic DIL-bent-SIL medium power package with fin; 9 leads SOT111-1
BLOCK DIAGRAM
MIRROR 1 MIRROR 5
TDA6107Q CASCODE 1
3×
MIRROR 4
Voc(3),
CURRENT 9, 8, 7
1× Voc(2),
SOURCE
Voc(1)
1×
THERMAL Rf
PROTECTION VIP DIFFERENTIAL
CIRCUIT REFERENCE STAGE
Vi(1),
Vi(2), 1, 2, 3 5
MIRROR 3 Io(m)
Vi(3) Ri
Ra
3× CASCODE 2
MIRROR 2
4
MGK278
1999 Oct 26 2
Philips Semiconductors Product specification
PINNING
Voc(2) 8
Voc(1) 9
MGK277
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); voltages measured with respect to pin 4 (ground);
currents as specified in Fig.1; unless otherwise specified.
SYMBOL PARAMETER MIN. MAX. UNIT
VDD supply voltage 0 250 V
Vi input voltage at pins 1 to 3 0 12 V
Vo(m) measurement output voltage 0 6 V
Vo(c) cathode output voltage 0 VDD V
Tstg storage temperature −55 +150 °C
Tj junction temperature −20 +150 °C
Ves electrostatic handling
Human Body Model (HBM) − 2000 V
Machine Model (MM) − 300 V
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling MOS devices (see “Handling MOS Devices” ).
QUALITY SPECIFICATION
Quality specification “SNW-FQ-611 part D” is applicable and can be found in the “Quality reference Handbook”.
The handbook can be ordered using the code 9397 750 00192.
1999 Oct 26 3
Philips Semiconductors Product specification
THERMAL CHARACTERISTICS
Thermal protection
The internal thermal protection circuit gives a decrease of
MBH989
8 the slew rate at high temperatures: 10% decrease at
handbook, halfpage
Ptot 130 °C and 30% decrease at 145 °C (typical values on the
(W) spot of the thermal protection circuit).
(1)
6
(2)
handbook, halfpage outputs
2
5 K/W
1999 Oct 26 4
Philips Semiconductors Product specification
CHARACTERISTICS
Operating range: Tj = −20 to +150 °C; VDD = 180 to 210 V. Test conditions: Tamb = 25 °C; VDD = 200 V;
Vo(c1) = Vo(c2) = Vo(c3) = 1⁄2VDD; CL = 10 pF (CL consists of parasitic and cathode capacitance); Rth(h-a) = 18 K/W
(measured in test circuit of Fig.8); unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Iq quiescent supply current 5.9 6.9 7.9 mA
Vref(int) internal reference voltage − 2.5 − V
(input stage)
Ri input resistance − 3.6 − kΩ
G gain of amplifier 47.5 51.0 55.0
∆G gain difference −2.5 0 +2.5
VO(c) nominal output voltage at Ii = 0 µA 116 129 142 V
pins 7, 8 and 9 (DC value)
∆VO(c)(offset) differential nominal output Ii = 0 µA − 0 5 V
offset voltage between
pins 7 and 8, 8 and 9 and
9 and 7 (DC value)
∆Vo(c)(T) output voltage temperature − −10 − mV/K
drift at pins 7, 8 and 9
∆Vo(c)(T)(offset) differential output offset − 0 − mV/K
voltage temperature drift
between pins 7 and 8,
8 and 9 and 7 and 9
Io(m)(offset) offset current of measurement Io(c) = 0 µA; −50 − +50 µA
output 1.5 V < Vi < 5.5 V;
3 V < Vo(m) < 6 V
∆Io(m)/∆Io(c) linearity of current transfer −100 µA < Io(c) < 100 µA; 0.9 1.0 1.1
1.5 V < Vi < 5.5 V;
3 V < Vo(m) < 6 V
at CRT discharge; − 1.0 −
Io(c) = 1 mA;
1.5 V < Vi < 5.5 V;
3 V < Vo(m) < 5.4 V
Io(c)(max) maximum peak output current 50 V < Vo(c) < VDD − 50 V − 20 − mA
(pins 7, 8 and 9)
Vo(c)(min) minimum output voltage Vi = 7.0 V; note 1 − − 10 V
(pins 7, 8 and 9)
Vo(c)(max) maximum output voltage Vi = 1.0 V; note 1 VDD − 15 − − V
(pins 7, 8 and 9)
BS small signal bandwidth Vo(c) = 60 V (p-p) − 5.5 − MHz
(pins 7, 8 and 9)
BL large signal bandwidth Vo(c) = 100 V (p-p) − 4.5 − MHz
(pins 7, 8 and 9)
1999 Oct 26 5
Philips Semiconductors Product specification
1999 Oct 26 6
Philips Semiconductors Product specification
MBH988
200
handbook, halfpage
Vo(c)
(V)
160
129
120
80
40
0
0 2 2.5 4 6
Vi (V)
1999 Oct 26 7
Philips Semiconductors Product specification
4.04
Vi
(V)
3.08
t
2.12
tst
Ov (in %)
151
150
140
149
Vo(c)
(V)
100
60
50
t
to(r)
tPco MGK280
Fig.6 Output voltage (pins 7, 8 and 9) rising edge as a function of the AC input signal.
1999 Oct 26 8
Philips Semiconductors Product specification
4.04
Vi
(V)
3.08
t
2.12
tst
150
140
Vo(c)
(V)
100
Ov (in %)
51
60
50
49
t
to(f)
tPco MGK281
Fig.7 Output voltage (pins 7, 8 and 9) falling edge as a function of the AC input signal.
1999 Oct 26 9
Philips Semiconductors Product specification
1999 Oct 26 10
Philips Semiconductors Product specification
22 µF 1
Ri Vof
Vi(1) Voc(1) 9
C2 1
Ra
Iom C10 R1
22 nF 6.8 pF 2 MΩ
C9
3.2 pF probe 1
C11 R2
J2 136 pF 100 kΩ
C3 Rf
22 µF 2
Ri Vof
Vi(2) Voc(2) 8
C4 2
Ra
Iom C13 R3
22 nF 6.8 pF 2 MΩ
C12
3.2 pF probe 2
C14 R4
J3 136 pF 100 kΩ
C5 Rf
22 µF 3
Ri Vof
Vi(3) Voc(3) 7
C6 3
Ra
Iom C16 R5
22 nF 6.8 pF 2 MΩ
C15
3.2 pF probe 3
C17 R6
VIP 136 pF 100 kΩ
REFERENCE
5
TDA6107Q Vo(m)
4
4V
MGK282
Current sources J1, J2 and J3 are to be tuned so that Vo(c) of pins 9, 8 and 7 is set to 100 V.
1999 Oct 26 11
Philips Semiconductors Product specification
INTERNAL CIRCUITRY
4 6
to cascode
stage
to black current
TDA6107Q measurement circuit
1, 2, 3
(1)
esd
from
input flash
circuit
esd 7, 8, 9
esd
to black current Vbias
from esd
measurement circuit
from input
control circuit
circuit
5 from black
current
measurement esd
esd 6.8 V circuit
from
control
circuit to black current
to black current measurement circuit
measurement circuit
MGK283
(1) All pins have an energy protection for positive or negative overstress situations.
1999 Oct 26 12
Philips Semiconductors Product specification
PACKAGE OUTLINE
DBS9MPF: plastic DIL-bent-SIL medium power package with fin; 9 leads SOT111-1
D1
q A2
P P1 Q
A3
q2
q1
A4
E
seating plane
pin 1 index
L c
1 9
Z e b e2
b2
b1
w M θ
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
92-11-17
SOT111-1
95-03-11
1999 Oct 26 13
Philips Semiconductors Product specification
SOLDERING The total contact time of successive solder waves must not
exceed 5 seconds.
Introduction to soldering through-hole mount
packages The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
This text gives a brief insight to wave, dip and manual
specified maximum storage temperature (Tstg(max)). If the
soldering. A more in-depth account of soldering ICs can be
printed-circuit board has been pre-heated, forced cooling
found in our “Data Handbook IC26; Integrated Circuit
may be necessary immediately after soldering to keep the
Packages” (document order number 9398 652 90011).
temperature within the permissible limit.
Wave soldering is the preferred method for mounting of
through-hole mount IC packages on a printed-circuit Manual soldering
board.
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
Soldering by dipping or by solder wave
2 mm above it. If the temperature of the soldering iron bit
The maximum permissible temperature of the solder is is less than 300 °C it may remain in contact for up to
260 °C; solder at this temperature must not be in contact 10 seconds. If the bit temperature is between
with the joints for more than 5 seconds. 300 and 400 °C, contact may be up to 5 seconds.
Suitability of through-hole mount IC packages for dipping and wave soldering methods
SOLDERING METHOD
PACKAGE
DIPPING WAVE
DBS, DIP, HDIP, SDIP, SIL suitable suitable(1)
Note
1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
DEFINITIONS
1999 Oct 26 14
Philips Semiconductors Product specification
NOTES
1999 Oct 26 15
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Printed in The Netherlands 545004/200/04/pp16 Date of release: 1999 Oct 26 Document order number: 9397 750 06485