Lecture 1 Introduction
Lecture 1 Introduction
Lecture 1 Introduction
Dennard's model of MOSFET scaling implies that, with every technology generation:
1.Transistor dimensions could be scaled by −30% (0.7×). This has the following effects simultaneously:
1. The area of an individual device reduces by 50%, because area is length times width.
2. The capacitance associated with the device, C, is reduced by 30% (0.7×), because capacitance varies with
area over distance.
3. To keep the electric field unchanged, the voltage, V, is reduced by 30% (0.7×), because voltage is field times
length.
4. Characteristics such as current and transition time are likewise scaled down by 30%, due to their relationship
with capacitance and voltage.
5. Overall circuit delay is assumed to be dominated by transition time, so it too is reduced by 30%.
2.The above effects lead to an increase in operating frequency, f, by about 40% (1.4×), because frequency varies with
one over delay.
3.Power consumption of an individual transistor decreases by 50%, because active power is CV2f.
Therefore, in every technology generation, the area and power consumption of individual transistors is
halved. In other words, if the transistor density doubles, power consumption (with twice the number of
transistors) stays the same.
Technology nodes
Grading: Relative
• Attendance ~ 80%
• Course is designed for students who are interested in semiconductor devices and for those
who intend to do higher studies :
• Last date for course drop is 18th August (Friday)
• Self study is highly recommended