VIPA 315-2AG12 Manual

VIPA System 300S
SPEED7 - CPU | 315-2AG12 | Manual

HB140E_CPU | RE_315-2AG12 | Rev. 12/51
December 2012
Copyright © VIPA GmbH. All Rights Reserved.
This document contains proprietary information of VIPA and is not to be disclosed or used except in accordance with applicable
agreements.
This material is protected by the copyright laws. It may not be reproduced, distributed, or altered in any fashion by any entity (either
internal or external to VIPA), except in accordance with applicable agreements, contracts or licensing, without the express written
consent of VIPA and the business management owner of the material.
For permission to reproduce or distribute, please contact:
VIPA, Gesellschaft für Visualisierung und Prozessautomatisierung mbH
Ohmstraße 4, D-91074 Herzogenaurach, Germany
Tel.: +49 (91 32) 744 -0
Fax.: +49 9132 744 1864
EMail: [email protected]
http://www.vipa.com
Note
Every effort has been made to ensure that the information contained in this document was complete and accurate at the time of
publishing. Nevertheless, the authors retain the right to modify the information. This customer document describes all the hardware
units and functions known at the present time. Descriptions may be included for units which are not present at the customer site. The
exact scope of delivery is described in the respective purchase contract.
CE Conformity Declaration
Hereby, VIPA GmbH declares that the products and systems are in compliance with the essential requirements and other relevant
provisions.
Conformity is indicated by the CE marking affixed to the product.
Conformity Information
For more information regarding CE marking and Declaration of Conformity (DoC), please contact your local VIPA customer service
organization.
Trademarks
VIPA, SLIO, System 100V, System 200V, System 300V, System 300S, System 400V, System 500S and Commander Compact are
registered trademarks of VIPA Gesellschaft für Visualisierung und Prozessautomatisierung mbH.
SPEED7 is a registered trademark of profichip GmbH.
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Information product support

Contact your local VIPA Customer Service Organization representative if you wish to report errors or questions regarding the contents
of this document. If you are unable to locate a customer service center, contact VIPA as follows:
VIPA GmbH, Ohmstraße 4, 91074 Herzogenaurach, Germany
Telefax:+49 9132 744 1204
Technical support
Contact your local VIPA Customer Service Organization representative if you encounter problems with the product or have questions
regarding the product. If you are unable to locate a customer service center, contact VIPA as follows:
VIPA GmbH, Ohmstraße 4, 91074 Herzogenaurach, Germany
Telephone: +49 9132 744 1150 (Hotline)
Manual VIPA System 300S SPEED7 Contents
Contents
About this manual .................................................................................... 1
Safety information .................................................................................... 2
Chapter 1 Basics .............................................................................. 1-1
Safety Information for Users................................................................. 1-2
Operating structure of a CPU ............................................................... 1-3
CPU 315-2AG12 .................................................................................. 1-6
Chapter 2 Assembly and installation guidelines............................ 2-1
Installation dimensions ......................................................................... 2-2
Assembly standard bus ........................................................................ 2-3
Cabling................................................................................................. 2-5
Installation guidelines ........................................................................... 2-6
Chapter 3 Hardware description ..................................................... 3-1
Properties............................................................................................. 3-2
Structure .............................................................................................. 3-3
Technical Data ..................................................................................... 3-9
Chapter 4 Deployment CPU 315-2AG12.......................................... 4-1
Assembly.............................................................................................. 4-2
Start-up behavior.................................................................................. 4-2
Addressing ........................................................................................... 4-3
Addressing ........................................................................................... 4-3
Hardware configuration - CPU.............................................................. 4-5
Hardware configuration - I/O modules .................................................. 4-6
Hardware configuration - Ethernet PG/OP channel .............................. 4-7
Setting standard CPU parameters........................................................ 4-9
Setting VIPA specific CPU parameters............................................... 4-16
Project transfer................................................................................... 4-21
Access to the internal Web page........................................................ 4-25
Operating modes................................................................................ 4-27
Overall reset....................................................................................... 4-30
Firmware update ................................................................................ 4-32
Factory reset ...................................................................................... 4-35
Slot for storage media ........................................................................ 4-36
Memory extension with MCC.............................................................. 4-37
Extended know-how protection........................................................... 4-38
MMC-Cmd - Auto commands ............................................................. 4-40
VIPA specific diagnostic entries ......................................................... 4-42
Using test functions for control and monitoring of variables................ 4-46
Chapter 5 Deployment PtP communication ................................... 5-1
Fast introduction................................................................................... 5-2
Principle of the data transfer ................................................................ 5-3
Deployment of RS485 interface for PtP................................................ 5-4
Parameterization .................................................................................. 5-7
Communication .................................................................................. 5-10
Protocols and procedures .................................................................. 5-16
Modbus - Function codes ................................................................... 5-20
Modbus - Example communication..................................................... 5-24
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 i
Contents Manual VIPA System 300S SPEED7
Chapter 6 Deployment PROFIBUS communication ....................... 6-1

Overview .............................................................................................. 6-2
Deployment as PROFIBUS DP master ................................................ 6-5
Deployment as PROFIBUS DP slave ................................................... 6-6
PROFIBUS installation guidelines ........................................................ 6-8
Commissioning and Start-up behavior................................................ 6-11
Chapter 7 WinPLC7 .......................................................................... 7-1
System presentation............................................................................. 7-2
Installation ............................................................................................ 7-3
Example project engineering ................................................................ 7-4
ii HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Manual VIPA System 300S SPEED7 About this manual
About this manual
This manual describes the System 300S SPEED7 CPU 315-2AG12 from
VIPA. Here you may find every information for commissioning and
operation.
Overview Chapter 1: Basics

These basics contain hints for the usage and information about the project
engineering of a SPEED7 system from VIPA.
General information about the System 300S like dimensions and
environment conditions will also be found.
Chapter 2: Assembly and installation guidelines
In this chapter you will find every information, required for the installation
and the cabling of a process control with the components of the System
300S with a CPU 315-2AG12.
Chapter 3: Hardware description
Here the hardware components of the CPU 315-2AG12 are described.
The technical data are at the end of the chapter.
Chapter 4: Deployment CPU 315-2AG12
This chapter describes the deployment of a CPU 315-2AG12 with SPEED7
technology in the System 300S. The description refers directly to the CPU
and to the deployment in connection with peripheral modules, mounted on
a profile rail together with the CPU at the standard bus.
Chapter 5: Deployment PtP communication
Content of this chapter is the deployment of the RS485 interface for serial
PtP communication. Here you’ll find every information about the protocols,
the activation and project engineering of the interface, which are necessary
for the serial communication using the RS485 interface.
Chapter 6: Deployment PROFIBUS communication
Content of this chapter is the deployment of the CPU 315-2AG12 with
PROFIBUS. After a short overview the project engineering and parameteri-
zation of a CPU 315-2AG12 with integrated PROFIBUS-Part from VIPA is
shown. Further you get information about usage as DP master and DP
slave of the PROFIBUS part. The chapter is ending with notes to
commissioning and start-up behavior.
Chapter 7: WinPLC7
In this chapter the programming and simulation software WinPLC7 from
®
VIPA is presented. WinPLC7 is suited for every with Siemens STEP 7
programmable PLC. Besides the system presentation and installation here
the basics for using the software is explained with a sample project.
More information concerning the usage of WinPLC7 may be found in the
online help respectively in the online documentation of WinPLC7.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 1

About this manual Manual VIPA System 300S SPEED7
Objective and This manual describes the System 300S SPEED7 CPU 315-2AG12 from
contents VIPA. It contains a description of the construction, project implementation
and usage.
This manual is part of the documentation package with order number
HB140E_CPU and relevant for:
Product Order number as of state:
CPU-HW CPU-FW DPM-FW
CPU 315SB/DPM VIPA 315-2AG12 02 V360 V312
Target audience The manual is targeted at users who have a background in automation
technology.
Structure of the The manual consists of chapters. Every chapter provides a self-contained
manual description of a specific topic.
Guide to the The following guides are available in the manual:

document • an overall table of contents at the beginning of the manual
• an overview of the topics for every chapter
Availability The manual is available in:

• printed form, on paper
• in electronic form as PDF-file (Adobe Acrobat Reader)
Icons Important passages in the text are highlighted by following icons and
Headings headings:
Danger!
Immediate or likely danger.
Personal injury is possible.
Attention!
Damages to property is likely if these warnings are not heeded.
Note!
Supplementary information and useful tips.
2 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Manual VIPA System 300S SPEED7 Safety information
Safety information
Applications The SPEED7 CPU is constructed and produced for:

conforming with • all VIPA System 300S components
specifications
• communication and process control
• general control and automation applications
• industrial applications
• operation within the environmental conditions specified in the technical
data
• installation into a cubicle
Danger!
This device is not certified for applications in
• in explosive environments (EX-zone)
Documentation The manual must be available to all personnel in the

• project design department
• installation department
• commissioning
• operation
The following conditions must be met before using or commissioning

the components described in this manual:
• Hardware modifications to the process control system should only be

carried out when the system has been disconnected from power!
• Installation and hardware modifications only by properly trained

personnel.
• The national rules and regulations of the respective country must be

satisfied (installation, safety, EMC ...)
Disposal National rules and regulations apply to the disposal of the unit!
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 3

Safety information Manual VIPA System 300S SPEED7
4 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Manual VIPA System 300S SPEED7 Chapter 1 Basics
Chapter 1 Basics
Overview This Basics contain hints for the usage and information about the project
engineering of a SPEED7 system from VIPA.
General information about the System 300S like dimensions and
environment conditions will also be found.
Content Topic Page

Chapter 1 Basics .............................................................................. 1-1
Safety Information for Users................................................................. 1-2
Operating structure of a CPU ............................................................... 1-3
CPU 315-2AG12 .................................................................................. 1-6
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 1-1

Chapter 1 Basics Manual VIPA System 300S SPEED7
Safety Information for Users
Handling of VIPA modules make use of highly integrated components in MOS-

electrostatic Technology. These components are extremely sensitive to over-voltages
sensitive modules that can occur during electrostatic discharges.
The following symbol is attached to modules that can be destroyed by
electrostatic discharges.
The Symbol is located on the module, the module rack or on packing

material and it indicates the presence of electrostatic sensitive equipment.
It is possible that electrostatic sensitive equipment is destroyed by energies
and voltages that are far less than the human threshold of perception.
These voltages can occur where persons do not discharge themselves
before handling electrostatic sensitive modules and they can damage
components thereby, causing the module to become inoperable or
unusable.
Modules that have been damaged by electrostatic discharges can fail after
a temperature change, mechanical shock or changes in the electrical load.
Only the consequent implementation of protection devices and meticulous
attention to the applicable rules and regulations for handling the respective
equipment can prevent failures of electrostatic sensitive modules.
Shipping of Modules must be shipped in the original packing material.

electrostatic
sensitive modules
Measurements and When you are conducting measurements on electrostatic sensitive

alterations on modules you should take the following precautions:
electrostatic
• Floating instruments must be discharged before use.
sensitive modules
• Instruments must be grounded.
Modifying electrostatic sensitive modules you should only use soldering
irons with grounded tips.
Attention!
Personnel and instruments should be grounded when working on
electrostatic sensitive modules.
1-2 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Operating structure of a CPU
General The CPU contains a standard processor with internal program memory. In
combination with the integrated SPEED7 technology the unit provides a
powerful solution for process automation applications within the System
300S family.
A CPU supports the following modes of operation:
• cyclic operation
• timer processing
• alarm controlled operation
• priority based processing
Cyclic processing Cyclic processing represents the major portion of all the processes that
are executed in the CPU. Identical sequences of operations are repeated in
a never-ending cycle.
Timer processing Where a process requires control signals at constant intervals you can
initiate certain operations based upon a timer, e.g. not critical monitoring
functions at one-second intervals.
Alarm controlled If a process signal requires a quick response you would allocate this signal
processing to an alarm controlled procedure. An alarm can activate a procedure in
your program.
Priority based The above processes are handled by the CPU in accordance with their
processing priority. Since a timer or an alarm event requires a quick reaction, the
CPU will interrupt the cyclic processing when these high-priority events
occur to react to the event. Cyclic processing will resume, once the
reaction has been processed. This means that cyclic processing has the
lowest priority.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 1-3

Applications The program that is present in every CPU is divided as follows:

• System routine
• User application
System routine The system routine organizes all those functions and procedures of the
CPU that are not related to a specific control application.
User application This consists of all the functions that are required for the processing of a
specific control application. The operating modules provide the interfaces
to the system routines.
Operands The following series of operands is available for programming the CPU:
• Process image and periphery
• Bit memory
• Timers and counters
• Data blocks
Process image The user application can quickly access the process image of the inputs
and periphery and outputs PAA/PAE. You may manipulate the following types of data:
• individual Bits
• Bytes
• Words
• Double words
You may also gain direct access to peripheral modules via the bus from
user application. The following types of data are available:
• Bytes
• Words
• Blocks
1-4 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Bit Memory The bit memory is an area of memory that is accessible by means of
certain operations. Bit memory is intended to store frequently used working
data.
You may access the following types of data:
• individual Bits
• Bytes
• Words
• Double words
Timers and In your program you may load cells of the timer with a value between 10ms
counters and 9990s. As soon as the user application executes a start-operation, the
value of this timer is decremented by the interval that you have specified
until it reaches zero.
You may load counter cells with an initial value (max. 999) and increment
or decrement these when required.
Data Blocks A data block contains constants or variables in the form of bytes, words or
double words. You may always access the current data block by means of
operands.
You may access the following types of data:
• individual Bits
• Bytes
• Words
• Double words
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 1-5

CPU 315-2AG12
Overview The CPU 315-2AG12 bases upon the SPEED7 technology. This supports
the CPU at programming and communication by means of co-processors
that causes a power improvement for highest needs.
The SPEED7 CPUs from VIPA are instruction compatible to the
®
programming language STEP 7 from Siemens and may be programmed
via WinPLC7 from VIPA or via the Siemens SIMATIC Manager. Here the
instruction set of the S7-400 from Siemens is used.
Modules and CPUs of the System 300S from VIPA and Siemens may be
used at the bus as a mixed configuration.
The user application is stored in the battery buffered RAM or on an
additionally pluggable MMC storage module.
The CPU is configured as CPU 318-2 (6ES7 318-2AJ00-0AB0/V3.0) from
Siemens.
Access options
DP Adapter
CPU
DP master
MPI Adapter MPI CPU DP

RN
PC RS232
Proj. Proj. Firmw.
Power ON RAM Flash
PG/OP
Proj. Firmw.
RAM Proj./Firmw.
RAM Flash
WinPLC7 from VIPA
System data
SIMATIC Manager RN
overall reset Tip Web
from Siemens
ST 3Sec.
MR
Web-Browser MMC TP
firmware wld file
RJ45
MMC
Ethernet
Note!
Please do always use the CPU 318-2 (6ES7 318-2AJ00-0AB0/V3.0) from
Siemens of the hardware catalog to project this CPU from VIPA.
For the project engineering, a thorough knowledge of the Siemens
SIMATIC Manager and the hardware configurator from Siemens is
required!
1-6 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Memory The CPU has an integrated memory. Information about the capacity
management (min. capacity ... max capacity) of the memory may be found at the front of
the CPU. The memory is divided into the following 3 parts:
• Load memory 2Mbyte
• Code memory (50% of the work memory)
• Data memory (50% of the work memory)
The work memory has 1Mbyte. There is the possibility to extend the work
memory to its maximum printed capacity 2Mbyte by means of a MCC
memory extension card.
Integrated The CPU has an integrated PROFIBUS DP master, which also may be
PROFIBUS used as PROFIBUS DP salve.
DP master The project engineering takes place or in the hardware configurator from
Siemens in WinPLC7 from VIPA.
Integrated The CPU has an Ethernet interface for PG/OP communication. Via the
Ethernet PG/OP "PLC" functions you may directly access the Ethernet PG/OP channel and
channel program res. remote control your CPU. A max. of 4 PG/OP connections is
available.
You may also access the CPU with a visualization software via these
connections.
Operation Security • Wiring by means of spring pressure connections (CageClamps) at the

front connector
2
• Core cross-section 0.08...2.5mm
• Total isolation of the wiring at module change
• Potential separation of all modules to the backplane bus
• ESD/Burst acc. IEC 61000-4-2/IEC 61000-4-4 (up to level 3)
• Shock resistance acc. IEC 60068-2-6 / IEC 60068-2-27 (1G/12G)
Environmental • Operating temperature: 0 ... +60°C

conditions • Storage temperature: -25 ... +70°C
• Relative humidity: 5 ... 95% without condensation
• Ventilation by means of a fan is not required
Dimensions/ • Dimensions of the basic enclosure:

Weight 1tier width: (WxHxD) in mm: 40x125x120
Integrated The CPU comes with an integrated power supply. The power supply is to
power supply be supplied with DC 24V. By means of the supply voltage, the internal
electronic is supplied as well as the connected modules via backplane bus.
The power supply is protected against inverse polarity and overcurrent.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 1-7

1-8 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Manual VIPA System 300S SPEED7 Chapter 2 Assembly and installation guidelines
Chapter 2 Assembly and installation guidelines
Overview In this chapter you will find every information, required for the installation
and the cabling of a process control with the components of a CPU 315-
2AG12 in the System 300S.
Content Topic Page

Chapter 2 Assembly and installation guidelines............................ 2-1
Installation dimensions ......................................................................... 2-2
Assembly standard bus ........................................................................ 2-3
Cabling................................................................................................. 2-5
Installation guidelines ........................................................................... 2-6
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 2-1

Chapter 2 Assembly and installation guidelines Manual VIPA System 300S SPEED7
Installation dimensions
Dimensions 1tier width (WxHxD) in mm: 40 x 125 x 120

Basic enclosure
Dimensions
65mm
122mm
40mm
Installation 125mm
dimensions 120mm
125 mm
175mm
2-2 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Assembly standard bus
General The single modules are directly installed on a profile rail and connected via
the backplane bus connector. Before installing the modules you have to
clip the backplane bus connector to the module from the backside.
The backplane bus connector is delivered together with the peripheral
modules.
Profile rail Order number A B C

VIPA 390-1AB60 160 140 10
VIPA 390-1AE80 482 466 8.3
VIPA 390-1AF30 530 500 15
VIPA 390-1AJ30 830 800 15
VIPA 390-9BC00* 2000 Drillings only left 15
* Unit pack: 10 pieces
Measures in mm
32.5
57.2 M6 10 122
15
B
C
Bus connector For the communication between the modules the System 300S uses a
backplane bus connector. Backplane bus connectors are included in the
delivering of the peripheral modules and are clipped at the module from the
backside before installing it to the profile rail.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 2-3

Assembly
possibilities
horizontal assembly vertical Please regard the allowed environment temperatures:
assembly
• horizontal assembly: from 0 to 60°C
SLOT2 SLOT1
• vertical assembly: from 0 to 40°C
DCDC
• lying assembly: from 0 to 40°C
lying assembly
Approach
• Bolt the profile rail with the background (screw size: M6),
so that you still have minimum 65mm space above and
40mm below the profile rail.
• If the background is a grounded metal or device plate,
please look for a low-impedance connection between
profile rail and background.
• Connect the profile rail with the protected earth conductor.
For this purpose there is a bolt with M6-thread.
• The minimum cross-section of the cable to the protected
2
earth conductor has to be 10mm .
• Stick the power supply to the profile rail and pull it to the
left side to the grounding bolt of the profile rail.
• Fix the power supply by screwing.
• Take a backplane bus connector and click it at the CPU
from the backside like shown in the picture.
• Stick the CPU to the profile rail right from the power supply
and pull it to the power supply.
• Click the CPU downwards and bolt it like shown.

• Repeat this procedure with the peripheral modules, by
clicking a backplane bus connector, stick the module right
from the modules you've already fixed, click it downwards
and connect it with the backplane bus connector of the last
module and bolt it.
Danger!
• The power supplies must be released before installation and repair
tasks, i.e. before handling with the power supply or with the cabling you
must disconnect current/voltage (pull plug, at fixed connection switch off
the concerning fuse)!
• Installation and modifications only by properly trained personnel!
2-4 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Cabling
Danger!
• The power supplies must be released before installation and repair
tasks, i.e. before handling with the power supply or with the cabling you
must disconnect current/voltage (pull plug, at fixed connection switch off
the concerning fuse)!
• Installation and modifications only by properly trained personnel!
CageClamp For the cabling of power supply of a CPU, a green plug with CageClamp
technology (green) technology is deployed.
The connection clamp is realized as plug that may be clipped off carefully if
it is still cabled.
2 2
1 Here wires with a cross-section of 0.08mm to 2.5mm may be connected.
You can use flexible wires without end case as well as stiff wires.
[1] Test point for 2mm test tip

1 [2] Locking (orange) for screwdriver
[3] Round opening for wires
2
3
2
The picture on the left side shows the cabling step by step from top view.
• For cabling you push the locking vertical to the inside with a suiting
screwdriver and hold the screwdriver in this position.
• Insert the de-isolated wire into the round opening. You may use wires
with a cross-section from 0.08mm2 to 2.5mm2.
• By removing the screwdriver the wire is connected safely with the plug
3 connector via a spring.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 2-5

Installation guidelines
General The installation guidelines contain information about the interference free
deployment of System 300S systems. There is the description of the ways,
interference may occur in your control, how you can make sure the
electromagnetic digestibility (EMC), and how you manage the isolation.
What means Electromagnetic digestibility (EMC) means the ability of an electrical

EMC? device, to function error free in an electromagnetic environment without
being interferenced res. without interferencing the environment.
All System 300S components are developed for the deployment in hard
industrial environments and fulfill high demands on the EMC. Nevertheless
you should project an EMC planning before installing the components and
take conceivable interference causes into account.
Possible Electromagnetic interferences may interfere your control via different ways:
interference • Fields
causes
• I/O signal conductors
• Bus system
• Current supply
• Protected earth conductor
Depending on the spreading medium (lead bound or lead free) and the
distance to the interference cause, interferences to your control occur by
means of different coupling mechanisms.
One differs:
• galvanic coupling
• capacitive coupling
• inductive coupling
• radiant coupling
2-6 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Basic rules for In the most times it is enough to take care of some elementary rules to
EMC guarantee the EMC. Please regard the following basic rules when installing
your PLC.
• Take care of a correct area-wide grounding of the inactive metal parts
when installing your components.
- Install a central connection between the ground and the protected
earth conductor system.
- Connect all inactive metal extensive and impedance-low.
- Please try not to use aluminum parts. Aluminum is easily oxidizing
and is therefore less suitable for grounding.
• When cabling, take care of the correct line routing.
- Organize your cabling in line groups (high voltage, current supply,
signal and data lines).
- Always lay your high voltage lines and signal res. data lines in
separate channels or bundles.
- Route the signal and data lines as near as possible beside ground
areas (e.g. suspension bars, metal rails, tin cabinet).
• Proof the correct fixing of the lead isolation.
- Data lines must be laid isolated.
- Analog lines must be laid isolated. When transmitting signals with
small amplitudes the one sided laying of the isolation may be
favorable.
- Lay the line isolation extensively on an isolation/protected earth con-
ductor rail directly after the cabinet entry and fix the isolation with
cable clamps.
- Make sure that the isolation/protected earth conductor rail is
connected impedance-low with the cabinet.
- Use metallic or metalized plug cases for isolated data lines.
• In special use cases you should appoint special EMC actions.
- Wire all inductivities with erase links.
- Please consider luminescent lamps can influence signal lines.
• Create a homogeneous reference potential and ground all electrical
operating supplies when possible.
- Please take care for the targeted employment of the grounding
actions. The grounding of the PLC is a protection and functionality
activity.
- Connect installation parts and cabinets with the System 300S in star
topology with the isolation/protected earth conductor system. So you
avoid ground loops.
- If potential differences between installation parts and cabinets occur,
lay sufficiently dimensioned potential compensation lines.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 2-7

Isolation of Electrical, magnetically and electromagnetic interference fields are

conductors weakened by means of an isolation, one talks of absorption.
Via the isolation rail, that is connected conductive with the rack,
interference currents are shunt via cable isolation to the ground. Hereby
you have to make sure, that the connection to the protected earth conduc-
tor is impedance-low, because otherwise the interference currents may
appear as interference cause.
When isolating cables you have to regard the following:

• If possible, use only cables with isolation tangle.
• The hiding power of the isolation should be higher than 80%.
• Normally you should always lay the isolation of cables on both sides.
Only by means of the both-sided connection of the isolation you achieve
high quality interference suppression in the higher frequency area.
Only as exception you may also lay the isolation one-sided. Then you
only achieve the absorption of the lower frequencies. A one-sided
isolation connection may be convenient, if:
- the conduction of a potential compensating line is not possible
- analog signals (some mV res. µA) are transferred
- foil isolations (static isolations) are used.
• With data lines always use metallic or metalized plugs for serial
couplings. Fix the isolation of the data line at the plug rack. Do not lay
the isolation on the PIN 1 of the plug bar!
• At stationary operation it is convenient to strip the insulated cable
interruption free and lay it on the isolation/protected earth conductor line.
• To fix the isolation tangles use cable clamps out of metal. The clamps
must clasp the isolation extensively and have well contact.
• Lay the isolation on an isolation rail directly after the entry of the cable in
the cabinet. Lead the isolation further on to the System 300S module
and don't lay it on there again!
Please regard at installation!

At potential differences between the grounding points, there may be a
compensation current via the isolation connected at both sides.
Remedy: Potential compensation line
2-8 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Manual VIPA System 300S SPEED7 Chapter 3 Hardware description
Chapter 3 Hardware description
Overview Here the hardware components of the CPU 315-2AG12 are described.
The technical data are at the end of the chapter.
Content Topic Page

Chapter 3 Hardware description ..................................................... 3-1
Properties............................................................................................. 3-2
Structure .............................................................................................. 3-3
Technical Data ..................................................................................... 3-9
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 3-1

Chapter 3 Hardware description Manual VIPA System 300S SPEED7
Properties
CPU 315SB/DPM • SPEED7 technology integrated

315-2AG12 • 1Mbyte work memory integrated (512kbyte code, 512kbyte data)
• Memory expandable to max. 2Mbyte (1Mbyte code, 1MByte data)
• PROFIBUS DP master integrated (DP-V0, DP-V1)
• MPI interface
• MCC slot for external memory cards and memory extension (lockable)
• Status LEDs for operating state and diagnosis
• Real-time clock battery buffered
• Ethernet PG/OP interface integrated
• RS485 interface configurable for PROFIBUS DP master respectively
PtP communication
• I/O address range digital/analog 8191byte
• 512 timer
• 512 counter
• 8192 flag byte
CPU 315SB
PW RN
RN ER
ST DE
SF IF
FC
MC MCC
L/A
S
RUN
STOP
MRES
VIPA 315-2AG12 X 2
3 4
Ordering data
Type Order number Description
315SB/DPM VIPA 315-2AG12 MPI interface, card slot, real time clock, Ethernet interface for
PG/OP, PROFIBUS DP master
3-2 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Structure
CPU 315SB/DPM
315-2AG12
CPU315 SB [1] LEDs of the integrated

PW RN
PROFIBUS DP master
RN ER
ST DE
1 [2] Storage media slot (lockable)
SF IF [3] LEDs of the CPU part
FC 2 [4] Operating mode switch CPU
MC
MCC
A
3
S The following components
RUN are under the front flap
STOP 4
MRES
X 2
[5] Slot for DC 24V power supply
VIPA 315-2AG12 3 4
5 [6] Twisted pair interface

for Ethernet PG/OP channel
+ 6
- [7] MPI interface
X1 X4 [8] PROFIBUS DP/PtP interface
7
X2 X3
MPI PB-DP
X1 X4
Interfaces 1 2 3 4 5 6 7 8
1 Transmit +
+ 1 + DC 24 V
2 Transmit -
- 2 0V 3 Receive +
4 -
5 -
6 Receive -
7 -
X2
8 -
MPI
1 n.c.
5 2 M24V
9 3 RxD/TxD-P (line B)
4
8
4 RTS
3 5 M5V
7
2 6 P5V
6 7 P24V
1
8 RxD/TxD-N (line A)
9 n.c.
X3
PtP/PB-DP
1 shield
5 2 M24V
9
4
3 RxD/TxD-P (line B)
8 4 RTS
3
7
5 M5V
2 6 P5V
6
1
7 P24V
8 RxD/TxD-N (line A)
9 n.c.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 3-3

Power supply The CPU has an integrated power supply. The power supply has to be
X1 provided with DC 24V. For this serves the double DC 24V slot, that is
underneath the flap.
Via the power supply not only the internal electronic is provided with
voltage, but by means of the backplane bus also the connected modules.
The power supply is protected against polarity inversion and overcurrent.
The internal electronic is galvanically connected with the supply voltage.
MPI interface 9pin SubD jack:

X2 The MPI interface serves for the connection between programming unit
and CPU. By means of this the project engineering and programming
happens. In addition MPI serves for communication between several CPUs
or between HMIs and CPU.
Standard setting is MPI Address 2.
Ethernet PG/OP 8pin RJ45 jack:

channel The RJ45 jack serves the interface to the Ethernet PG/OP channel. This
X4 interface allows you to program res. remote control your CPU, to access
the internal website or to connect a visualization. Configurable connections
are not possible.
For online access to the CPU via Ethernet PG/OP channel valid IP address
parameters have to be assigned to this. More may be found at chapter
"Deployment CPU ..." at "Initialization Ethernet PG/OP channel".
PROFIBUS/PtP The CPU has a PROFIBUS/PtP interface with a fix pinout. After an overall
interface with reset the interface is deactivated.
configurable By appropriate configuration, the following functionalities for this interface
functionality may be enabled:
X3 • PROFIBUS DP master operation
• PROFIBUS DP slave operation
• PtP functionality
PROFIBUS The PROFIBUS master/slave functionality of this interface is activated by

functionality configuring the sub module X1 (MPI/DP) of the CPU in the hardware
configuration.
PtP functionality Using the PtP functionality the RS485 interface is allowed to connect via
serial point-to-point connection to different source res. target systems.
Here the following protocols are supported: ASCII, STX/ETX, 3964R, USS
and Modbus-Master (ASCII, RTU) .
The activation of the PtP functionality happens by embedding the
SPEEDBUS.GSD from VIPA in the hardware catalog. After the installation
the CPU may be configured in a PROFIBUS master system and here the
interface may be switched to PtP communication.
3-4 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Memory The CPU has an integrated memory. Information about the capacity
management (min. capacity ... max capacity) of the memory may be found at the front of
the CPU.
The memory is divided into the following 3 parts:
• Code memory (50% of the work memory)
• Data memory (50% of the work memory)
The work memory has 1Mbyte. There is the possibility to extend the work
memory to its maximum printed capacity 2Mbyte by means of a MCC
memory extension card.
Storage As external storage medium for applications and firmware you may use a
media slot MMC storage module (Multimedia card) or a MCC memory extension card.
The MCC can additionally be used as an external storage medium.
Both VIPA storage media are pre-formatted with the PC format FAT16 and
can be accessed via a card reader. An access to the storage media always
happens after an overall reset and PowerON.
After PowerON respectively an overall reset the CPU checks, if there is a
storage medium with data valid for the CPU.
Push the memory card into the slot until it snaps in leaded by a spring
mechanism. This ensures contacting. By sliding down the sliding
mechanism, a just installed memory card can be protected against drop
out.
MCC MCC
To remove, slide the sliding mechanism up again and push the storage
media against the spring pressure until it is unlocked with a click.
Note!
Caution, if the media was already unlocked by the spring mechanism, with
shifting the sliding mechanism, a just installed memory card can jump out
of the slot!
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 3-5

Battery backup for A rechargeable battery is installed on every CPU 31xS to safeguard the
clock and RAM contents of the RAM when power is removed. This battery is also used to
buffer the internal clock.
The rechargeable battery is maintained by a charging circuit that receives
its power from the internal power supply and that maintain the clock and
RAM for a max. period of 30 days.
Attention!
Please connect the CPU at least for 24 hours to the power supply, so that
the internal accumulator/battery is loaded accordingly.
After a power reset and with an empty battery the CPU starts with a BAT
error and executes an overall reset.
The loading procedure is not influenced by the BAT error.
The BAT error can be deleted again, if once during power cycle the time
between switching on and off the power supply is at least 30sec. and the
battery is fully loaded.
Otherwise with a short power cycle the BAT error still exists and an overall
reset is executed.
3-6 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

LEDs The CPU has got LEDs on its front side. In the following the usage and the
according colors of the LEDs is described.
LEDs CPU As soon as the CPU is supplied with 5V, the green PW-LED (Power) is on.
RN ST SF FC MC Meaning
(RUN) (STOP) (SYSFAIL) (FRCE) (MCC)
green yellow red yellow yellow
Boot-up after PowerON
● ☼* ● ● ● * Blinking with 10Hz: Firmware is loaded.
● ● ● ● ● Initialization: Phase 1
● ● ● ● ○ Initialization: Phase 2
● ● ● ○ ○ Initialization: Phase 3
○ ● ● ○ ○ Initialization: Phase 4
Operation
○ ● x x x CPU is in STOP state.
CPU is in start-up state, the RUN LED blinks during
☼ ○ x x x operating OB100 at least for 3s.
● ○ ○ x x CPU is in state RUN without error.
There is a system fault. More information may be found in
x x ● x x the diagnostics buffer of the CPU.
x x x ● x Variables are forced.
x x x x ● Access to the memory card.
Overall reset
○ ☼ x x x Overall reset is requested.
○ ☼* x x x * Blinking with 5Hz: Overall reset is executed.
Factory reset
● ● ○ ○ ○ Factory reset is executed.
○ ● ● ● ● Factory reset finished without error.
Firmware update
The alternate blinking indicates that there is new firmware
○ ● ☼ ☼ ● on the memory card.
The alternate blinking indicates that a firmware update is
○ ○ ☼ ☼ ● executed.
○ ● ● ● ● Firmware update finished without error.
○ ☼* ☼* ☼* ☼* * Blinking with 10Hz: Error during Firmware update.
on: ● off: ○ blinking (2Hz): ☼ not relevant: x
LEDs Ethernet The green L/A-LED (Link/Activity) indicates the physical connection of the
PG/OP channel Ethernet PG/OP channel to Ethernet. Irregular flashing of the L/A-LED
L/A, S indicates communication of the Ethernet PG/OP channel via Ethernet.
If the green S-LED (Speed) is on, the Ethernet PG/OP has a
communication speed of 100MBit/s otherwise 10MBit/s.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 3-7

LEDs Dependent on the mode of operation the LEDs show information about the
PROFIBUS/PtP state of operation of the PROFIBUS part according to the following pattern:
interface X3
Master operation
RN ER DE IF Meaning
(RUN) (ERR)
green red green red
Master has no project, this means the interface is deactivated respectively
○ ○ ○ ○ PtP is active.
● ○ ○ ○ Master has bus parameters and is in RUN without slaves.
Master is in "clear" state (safety state). The inputs of the slaves may be
● ○ ☼ ○ read. The outputs are disabled.
Master is in "operate" state, this means data exchange between master and
● ○ ● ○ slaves. The outputs may be accessed.
● ● ● ○ CPU is in RUN, at least 1 slave is missing.
● ● ☼ ○ CPU is in STOP, at least 1 slave is missing.
○ ○ ○ ● Initialization error at faulty parameterization.
○ ● ○ ● Waiting state for start command from CPU.
Slave operation
RN ER DE IF Meaning
(RUN) (ERR)
green red green red
○ ○ ○ ○ Slave has no project respectively PtP is active.
☼ ○ ○ ○ Slave is without master.
☼* ○ ☼* ○ * Alternate flashing at configuration faults.
● ○ ● ○ Slave exchanges data between master.
Operating mode With the operating mode switch you may switch the CPU between STOP
switch and RUN.
During the transition from STOP to RUN the operating mode START-UP is
driven by the CPU.
RUN
STOP
Placing the switch to MRES (Memory Reset), you request an overall reset
MRES
with following load from MMC, if a project there exists.
3-8 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Technical Data
Order number 315-2AG12

Type CPU 315SB/DPM
SPEED-Bus -
Technical data power supply
Power supply (rated value) DC 24 V
Power supply (permitted range) DC 20.4...28.8 V
Reverse polarity protection 9
Current consumption (no-load operation) 200 mA
Current consumption (rated value) 1A
Inrush current 5A
I²t 0.5 A²s
Max. current drain at backplane bus 2.5 A
Power loss 6W
Load and working memory
Load memory, integrated 2 MB
Load memory, maximum 2 MB
Work memory, integrated 1 MB
Work memory, maximal 2 MB
Memory divided in 50% program / 50% data 9
Memory card slot MMC-Card with max. 1 GB
Hardware configuration
Racks, max. 4
Modules per rack, max. 8 in multiple-, 32 in a single-
rack configuration
Number of integrated DP master 1
Number of DP master via CP 4
Operable function modules 8
Operable communication modules PtP 8
Operable communication modules LAN 8
Status information, alarms, diagnostics
Status display yes
Interrupts no
Process alarm no
Diagnostic interrupt no
Command processing times
Bit instructions, min. 0.01 µs
Word instruction, min. 0.01 µs
Double integer arithmetic, min. 0.01 µs
Floating-point arithmetic, min. 0.06 µs
Timers/Counters and their retentive
characteristics
Number of S7 counters 512
Number of S7 times 512
Data range and retentive characteristic
Number of flags 8192 Byte
Number of data blocks 4095
Max. data blocks size 64 KB
Max. local data size per execution level 510 Byte
Blocks
Number of OBs 24
Number of FBs 2048
Number of FCs 2048
Maximum nesting depth per priority class 8
Maximum nesting depth additional within an error 4
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 3-9

OB
Time
Real-time clock buffered 9
Clock buffered period (min.) 6W
Accuracy (max. deviation per day) 10 s
Number of operating hours counter 8
Clock synchronization 9
Synchronization via MPI Master/Slave
Synchronization via Ethernet (NTP) no
Address areas (I/O)
Input I/O address area 8192 Byte
Output I/O address area 8192 Byte
Input process image maximal 2048 Byte
Output process image maximal 2048 Byte
Digital inputs 65536
Digital outputs 65536
Digital inputs central 1024
Digital outputs central 1024
Integrated digital inputs -
Integrated digital outputs -
Analog inputs 4096
Analog outputs 4096
Analog inputs, central 256
Analog outputs, central 256
Integrated analog inputs -
Integrated analog outputs -
Communication functions
PG/OP channel 9
Global data communication 9
Number of GD circuits, max. 8
Size of GD packets, max. 54 Byte
S7 basic communication 9
S7 basic communication, user data per job 76 Byte
S7 communication 9
S7 communication as server 9
S7 communication as client -
S7 communication, user data per job 160 Byte
Number of connections, max. 32
Functionality Sub-D interfaces
Type X2
Type of interface RS485
Connector Sub-D, 9-pin, female
Electrically isolated 9
MPI 9
MP²I (MPI/RS232) -
DP master -
DP slave -
Point-to-point interface -
Type X3
Type of interface RS485
MPI -
MP²I (MPI/RS232) -
DP master 9
DP slave 9
3-10 HB140E - CPU - RE_315-2AG12 - Rev. 12/51


Point-to-point interface 9
CAN -
Functionality MPI
Number of connections, max. 32
PG/OP channel 9
Routing 9
Global data communication 9
S7 communication 9
Transmission speed, min. 19.2 kbit/s
Transmission speed, max. 12 Mbit/s
Functionality PROFIBUS master
PG/OP channel 9
Routing 9
S7 communication 9
Equidistance support -
Isochronous mode -
SYNC/FREEZE 9
Activation/deactivation of DP slaves 9
Direct data exchange (slave-to-slave -
communication)
DPV1 9
Number of DP slaves, max. 124
Address range inputs, max. 8 KB
Address range outputs, max. 8 KB
User data inputs per slave, max. 244 Byte
User data outputs per slave, max. 244 Byte
Functionality PROFIBUS slave
PG/OP channel 9
Routing 9
S7 communication 9
Direct data exchange (slave-to-slave -
communication)
DPV1 9
Automatic detection of transmission speed -
Transfer memory inputs, max. 244 Byte
Transfer memory outputs, max. 244 Byte
Address areas, max. 32
User data per address area, max. 32 Byte
Point-to-point communication
PtP communication 9
Interface isolated 9
RS232 interface -
RS422 interface -
RS485 interface 9
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 3-11


Transmission speed, min. 150 bit/s
Transmission speed, max. 115.5 kbit/s
Cable length, max. 500 m
Point-to-point protocol
ASCII protocol 9
STX/ETX protocol 9
3964(R) protocol 9
RK512 protocol -
USS master protocol 9
Modbus master protocol 9
Modbus slave protocol -
Special protocols -
Functionality RJ45 interfaces
Type X4
Type of interface Ethernet 10/100 MBit
Connector RJ45
PG/OP channel 9
Productive connections -
Housing
Material PPE
Mounting Rail System 300
Mechanical data
Dimensions (WxHxD) 40 x 125 x 120 mm
Weight 290 g
Environmental conditions
Operating temperature 0 °C to 60 °C
Storage temperature -25 °C to 70 °C
Certifications
UL508 certification yes
3-12 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 315-2AG12
Chapter 4 Deployment CPU 315-2AG12
Overview This chapter describes the deployment of a CPU 315-2AG12 with SPEED7
technology in the System 300. The description refers directly to the CPU
and to the deployment in connection with peripheral modules, mounted on
a profile rail together with the CPU at the standard bus.
Content Topic Page

Chapter 4 Deployment CPU 315-2AG12.......................................... 4-1
Assembly.............................................................................................. 4-2
Start-up behavior.................................................................................. 4-2
Addressing ........................................................................................... 4-3
Addressing ........................................................................................... 4-3
Hardware configuration - I/O modules .................................................. 4-6
Hardware configuration - Ethernet PG/OP channel .............................. 4-7
Setting standard CPU parameters........................................................ 4-9
Setting VIPA specific CPU parameters............................................... 4-16
Project transfer................................................................................... 4-21
Access to the internal Web page........................................................ 4-25
Operating modes................................................................................ 4-27
Overall reset....................................................................................... 4-30
Firmware update ................................................................................ 4-32
Factory reset ...................................................................................... 4-35
Slot for storage media ........................................................................ 4-36
Memory extension with MCC.............................................................. 4-37
Extended know-how protection........................................................... 4-38
MMC-Cmd - Auto commands ............................................................. 4-40
VIPA specific diagnostic entries ......................................................... 4-42
Using test functions for control and monitoring of variables................ 4-47
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-1

Chapter 4 Deployment CPU 315-2AG12 Manual VIPA System 300S SPEED7
Assembly
Note!
Information about assembly and cabling may be found at chapter
"Assembly and installation guidelines".
Start-up behavior
Turn on power After the power supply has been switched on, the CPU changes to the
supply operating mode the operating mode lever shows.
Default boot When the CPU is delivered it has been reset.

procedure, as After a STOP→RUN transition the CPU switches to RUN without program.
delivered
Boot procedure with The CPU switches to RUN with the program stored in the battery buffered
valid configuration RAM.
in the CPU
Boot procedure The accumulator/battery is automatically loaded via the integrated power
with empty battery supply and guarantees a buffer for max. 30 days. If this time is exceeded,
the battery may be totally discharged. This means that the battery buffered
RAM is deleted.
In this state, the CPU executes an overall reset. If a MMC is plugged,
program code and data blocks are transferred from the MMC into the work
memory of the CPU.
If no MMC is plugged, the CPU transfers permanent stored "protected"
blocks into the work memory if available.
Information about storing protected blocks in the CPU is to find in this
chapter at "Extended Know-how protection".
Depending on the position of the operating mode switch, the CPU switches
to RUN res. remains in STOP.
This event is stored in the diagnostic buffer as: "Start overall reset
automatically (unbuffered PowerON)".
Attention!
After a power reset and with an empty battery the CPU starts with a BAT
error and executes an overall reset.
The BAT error can be deleted again, if once during power cycle the time
between switching on and off the power supply is at least 30sec. and the
battery is fully loaded.
Otherwise with a short power cycle the BAT error still exists and an overall
reset is executed.
4-2 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Addressing
Overview To provide specific addressing of the installed peripheral modules, certain

addresses must be allocated in the CPU.
At the start-up of the CPU, this assigns automatically peripheral addresses
for digital in-/output modules starting with 0 and ascending depending on the
slot location.
If no hardware project engineering is available, the CPU stores at the
addressing analog modules to even addresses starting with 256.
Addressing The CPU 315-2AG12 provides an I/O area (address 0 ... 8191) and a
Backplane bus process image of the in- and outputs (each address 0 ... 255).
I/O devices The process image stores the signal states of the lower address (0 ... 255)
additionally in a separate memory area.
The process image this divided into two parts:
• process image to the inputs (PII)
• process image to the outputs (PIQ)
I/O area Process image

0 0
. .
. . Inputs
. . PII
. 255
255
. 0
. .
. .
Outputs
. . PIQ
8191 255
The process image is updated automatically when a cycle has been

completed.
Max. number of Maximally 8 modules per row may be configured by the CPU 315-2AG12.
pluggable For the project engineering of more than 8 modules you may use line
modules interface connections. For this you set in the hardware configurator the
module IM 360 from the hardware catalog to slot 3 of your 1. profile rail.
Now you may extend your system with up to 3 profile rails by starting each
with an IM 361 from Siemens at slot 3. Considering the max total current
with the CPU 315-2AG12 from VIPA up to 32 modules may be arranged in
a row. Here the installation of the line connections IM 360/361 from
Siemens is not required.
Define addresses You may access the modules with read res. write accesses to the
by hardware peripheral bytes or the process image.
configuration To define addresses a hardware configuration may be used. For this, click
on the properties of the according module and set the wanted address.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-3

Automatic If you do not like to use a hardware configuration, an automatic addressing

addressing comes into force.
At the automatic address allocation DIOs occupy depending on the slot
location always 4byte and AIOs, FMs, CPs always 16byte at the bus.
Depending on the slot location the start address from where on the
according module is stored in the address range is calculated with the
following formulas:
DIOs: Start address = 4⋅(slot -1)

AIOs, FMs, CPs: Start address = 16⋅(slot -1)+256
Slot number 1, 2, ...

4 5 6 7
Start
address
digital: 0 4 8 12
analog: CPU 256 272 288 304
Example for The following sample shows the functionality of the automatic address
automatic address allocation:
allocation
Slot number: 4 5 6 7 8
DIO 16xDC24V
Bus
DO 16xDC24V
DI 16xDC24V
AO 4x12Bit
AI 8x12Bit
CPU 315
PII Address Periphery area Periphery area Address PIQ

0 Input Byte 0.
.
Output Byte 8
1. Input Byte
..
.. Output Byte 9.
.. ..
12 Input Byte .
Output Byte 12
up to max. 255
13
.. Input Byte up to max. 255
. Output Byte 13
..
analog digital
analog digital
255
255
256
.. 256
..
.. .
272 Input Byte Output Byte 320
..
.. .
. Output Byte 335
287 Input Byte ..
.. ..
.. ..
2048.. 2048 ..
. .
8191 8191
4-4 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Hardware configuration - CPU
Requirements The hardware configuration of the VIPA CPU takes place at the Siemens
hardware configurator.
The hardware configurator is a part of the Siemens SIMATIC Manager. It
serves the project engineering. The modules, which may be configured
here are listed in the hardware catalog. If necessary you have to update
the hardware catalog with Options > Update Catalog.
For project engineering a thorough knowledge of the Siemens SIMATIC
manager and the Siemens hardware configurator are required!
Note!
Please consider that this SPEED7-CPU has 4 ACCUs. After an arithmetic
operation (+I, -I, *I, /I, +D, -D, *D, /D, MOD, +R, -R, *R, /R) the content of
ACCU 3 and ACCU 4 is loaded into ACCU 3 and 2.
This may cause conflicts in applications that presume an unmodified
ACCU2.
For more information may be found in the manual "VIPA Operation list
SPEED7" at "Differences between SPEED7 and 300V programming".
Proceeding To be compatible with the Siemens SIMATIC manager the following steps
should be executed:
• Start the Siemens hardware configurator with a new project.

Slot Module • Insert a profile rail from the hardware catalog.
1
2 CPU 318-2 • Place at slot 2 the following CPU from Siemens:
X2 DP CPU 318-2 (6ES7 318-2AJ00-0AB0/V3.0).
X1 MPI/DP
3 • The integrated PROFIBUS DP master (X3) is to be configured and
connected via the sub module X2 (DP).
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-5

Hardware configuration - I/O modules
Hardware After the hardware configuration place the System 300 modules in the
configuration of plugged sequence starting with slot 4.
the modules
Slot Module
1 Parameter DIO
2
X... CPU Param : ......... Param : .........
Param : ......... Param : .........
Param : ......... Param : .........
DI DO DIO AI AO Param : ......... Param : .........
CPU
3
4 DI
5 DO
6 DIO
7 AI
8 AO
9
10
11
Parameterization For parameterization double-click during the project engineering at the slot
overview on the module you want to parameterize In the appearing dialog
window you may set the wanted parameters.
Parameterization By using the SFCs 55, 56 and 57 you may alter and transfer parameters
during runtime for wanted modules during runtime.
For this you have to store the module specific parameters in so called
"record sets".
More detailed information about the structure of the record sets is to find in
the according module description.
Bus extension For the project engineering of more than 8 modules you may use line
with IM 360 and interface connections. For this you set in the hardware configurator the
IM 361 module IM 360 from the hardware catalog to slot 3 of your 1. profile rail.
Now you may extend your system with up to 3 profile rails by starting each
with an IM 361 from Siemens at slot 3. Considering the max total current
with the VIPA SPEED7 CPUs up to 32 modules may be arranged in a row.
Here the installation of the line connections IM 360/361 from Siemens is
not required.
4-6 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Hardware configuration - Ethernet PG/OP channel
Overview The CPU 315-2AG12 has an integrated Ethernet PG/OP channel. This
channel allows you to program and remote control your CPU.
The PG/OP channel also gives you access to the internal web page that
contains information about firmware version, connected I/O devices,
current cycle times etc.
With the first start-up respectively after an overall reset the Ethernet
PG/OP channel does not have any IP address.
For online access to the CPU via Ethernet PG/OP channel valid IP address
parameters have to be assigned to this by means of the Siemens SIMATIC
manager. This is called "initialization".
Assembly and • Install your System 300S with your CPU.

commissioning • Wire the system by connecting cables for voltage supply and signals.
• Connect the Ethernet jack of the Ethernet PG/OP channel to Ethernet
• Switch on the power supply.
→ After a short boot time the CP is ready for communication.
He possibly has no IP address data and requires an initialization.
"Initialization" via The initialization via PLC functions takes place with the following
PLC functions proceeding:
• Determine the current Ethernet (MAC) address of your Ethernet PG/OP
channel. This always may be found as 1. address under the front flap of
the CPU on a sticker on the left side.
Ethernet address
Ethernet PG/OP
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-7

Assign IP address You get valid IP address parameters from your system administrator. The
parameters assignment of the IP address data happens online in the Siemens
SIMATIC manager starting with version V 5.3 & SP3 with the following
proceeding:
• Start the Siemens SIMATIC manager and set via Options > Set PG/PC
interface the access path to "TCP/IP -> Network card .... ".
• Open with PLC > Edit Ethernet Node the dialog window with the same
name.
• To get the stations and their MAC address, use the [Browse] button or
type in the MAC Address. The Mac address may be found at the 1. label
beneath the front flap of the CPU.
• Choose if necessary the known MAC address of the list of found
stations.
• Either type in the IP configuration like IP address, subnet mask and
gateway. Or your station is automatically provided with IP parameters by
means of a DHCP server. Depending of the chosen option the DHCP
server is to be supplied with MAC address, equipment name or client ID.
The client ID is a numerical order of max. 63 characters. The following
characters are allowed: "hyphen", 0-9, a-z, A-Z
• Confirm with [Assign IP configuration].
Note!
Direct after the assignment the Ethernet PG/OP channel may be reached
online by these address data.
The value remains as long as it is reassigned, it is overwritten by a
hardware configuration or an factory reset is executed.
Take IP address • Open the Siemens hardware configurator und configure the Siemens
parameters in CPU 318-2 (318-2AJ00-0AB00 V3.0).
project • Configure the modules at the standard bus.
• For the Ethernet PG/OP channel you have to configure a Siemens
CP 343-1 (SIMATIC 300 \ CP 300 \ Industrial Ethernet \CP 343-1 \
6GK7 343-1EX11 0XE0) always below the really plugged modules.
• Open the property window via double-click on the CP 343-1EX11 and
enter for the CP at "Properties" the IP address data, which you have
assigned before.
• Transfer your project.
Standard bus (serial) Standard bus

Slot Module
1
Ethernet-PG/OP
2 CPU
X...
3
4 DI
DI DO DIO AI AO
CPU
5 DO
6 DIO
7 AI
Ethernet-PG/OP channel 8 AO
9 343-1EX11
10
11
4-8 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Setting standard CPU parameters
Parameterization Since the CPU from VIPA is to be configured as Siemens CPU 318-2 (CPU
via Siemens 318-2AJ00 V3.0) in the Siemens hardware configurator, the standard
CPU 318-2AJ00 parameters of the VIPA CPU may be set with "Object properties" of the
CPU 318-2 during hardware configuration.
Via a double-click on the CPU 318-2 the parameter window of the CPU
may be accessed.
Using the registers you get access to every standard parameter of the
CPU.
Parameter CPU
Slot Module Param : ......... Param : .........

1 Param : ......... Param : .........
Param : ......... Param : .........
2 CPU ... Param : ......... Param : .........
X2 DP
X1 MPI/DP
3
4
Supported The CPU does not evaluate each parameter, which may be set at the
parameters hardware configuration.
The following parameters are supported by the CPU at this time:
General
Short description The short description of the Siemens CPU 318-2AJ00 is CPU 318-2.
Order No. / Order number and firmware are identical to the details in the "hardware
Firmware catalog" window.
Name The Name field provides the short description of the CPU. If you change
the name the new name appears in the Siemens SIMATIC manager.
Plant designation Here is the possibility to specify a plant designation for the CPU. This plant
designation identifies parts of the plant according to their function. This has
a hierarchical structure and confirms to IEC 1346-1.
Comment In this field information about the module may be entered.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-9

Startup
Startup when If the checkbox for "Startup when expected/actual configuration differ" is
expected/actual deselected and at least one module is not located at its configured slot or if
configuration differs another type of module is inserted there instead, then the CPU does not
switch to RUN mode and remains in STOP mode.
If the checkbox for "Startup when expected/actual configuration differ" is
selected, then the CPU starts even if there are modules not located in their
configured slots of if another type of module is inserted there instead, such
as during an initial system start-up.
Monitoring time for This operation specifies the maximum time for the ready message of every
ready message by configured module after PowerON. Here connected PROFIBUS DP slaves
modules [100ms] are also considered until they are parameterized. If the modules do not
send a ready message to the CPU by the time the monitoring time has
expired, the actual configuration becomes unequal to the preset
configuration.
Monitoring time for The maximum time for the transfer of parameters to parameterizable
transfer of modules. If not every module has been assigned parameters by the time
parameters to this monitoring time has expired; the actual configuration becomes unequal
modules [100ms] to the preset configuration.
Cycle/Clock
memory
Update OB1 This parameter is not relevant.
process image
cyclically
Scan cycle Here the scan cycle monitoring time in milliseconds may be set. If the scan
monitoring time cycle time exceeds the scan cycle monitoring time, the CPU enters the
STOP mode. Possible reasons for exceeding the time are:
• Communication processes
• a series of interrupt events
• an error in the CPU program
Minimum scan This parameter is not relevant.

cycle time
Scan cycle load Using this parameter you can control the duration of communication
from Communi- processes, which always extend the scan cycle time so it does not exceed
cation a specified length.
If the cycle load from communication is set to 50%, the scan cycle time of
OB 1 can be doubled. At the same time, the scan cycle time of OB 1 is still
being influenced by asynchronous events (e.g. hardware interrupts) as
well.
Size of the process Here the size of the process image max. 2048 for the input/output
image input/output periphery may be fixed.
area
4-10 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

OB85 call up at I/O The preset reaction of the CPU may be changed to an I/O access error that
access error occurs during the update of the process image by the system.
The VIPA CPU is preset such that OB 85 is not called if an I/O access error
occurs and no entry is made in the diagnostic buffer either.
Clock memory Activate the check box if you want to use clock memory and enter the
number of the memory byte.
Note!
The selected memory byte cannot be used for temporary data storage.
Retentive Memory
Number of Memory Enter the number of retentive memory bytes from memory byte 0 onwards.
Bytes from MB0
Number of S7 Enter the number of retentive S7 timers from T0 onwards. Each S7 timer
Timers from T0 occupies 2bytes.
Number of S7 Enter the number of retentive S7 counter from C0 onwards.

Counters from C0
Areas These parameters are not relevant.
Interrupts
Priority Here the priorities are displayed, according to which the hardware interrupt
OBs are processed (hardware interrupt, time-delay interrupt, async. error
interrupts).
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-11

Time-of-day
interrupts
Priority Here the priorities may be specified according to which the time-of-day
interrupt is processed.
With priority "0" the corresponding OB is deactivated.
Active Activate the check box of the time-of-day interrupt OBs if these are to be
automatically started on complete restart.
Execution Select how often the interrupts are to be triggered. Intervals ranging from
every minute to yearly are available. The intervals apply to the settings
made for start date and time.
Start date / time Enter date and time of the first execution of the time-of-day interrupt.
Process image This parameter is not supported.

partition
Cyclic interrupts
Priority Here the priorities may be specified according to which the corresponding
cyclic interrupt is processed. With priority "0" the corresponding interrupt is
deactivated.
Execution Enter the time intervals in ms, in which the watchdog interrupt OBs should
be processed. The start time for the clock is when the operating mode
switch is moved from STOP to RUN.
Phase offset Enter the delay time in ms for current execution for the watch dog interrupt.
This should be performed if several watchdog interrupts are enabled.
Phase offset allows to distribute processing time for watchdog interrupts
across the cycle.
Process image This parameter is not supported.

partition
4-12 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Diagnostics/Clock
Report cause of Activate this parameter, if the CPU should report the cause of STOP to PG
STOP respectively OP on transition to STOP.
Number of Here the number of diagnostics are displayed, which may be stored in the
messages in the diagnostics buffer (circular buffer).
diagnostics buffer
Synchronization You can specify whether the CPU clock should be used to synchronize
type other clocks or not.
- as slave: The clock is synchronized by another clock.
- as master: The clock synchronizes other clocks as master.
- none: There is no synchronization
Time interval Time intervals within which the synchronization is to be carried out.
Correction factor Lose or gain in the clock time may be compensated within a 24 hour period
by means of the correction factor in ms. If the clock is 1s slow after 24
hours, you have to specify a correction factor of "+1000" ms.
Protection
Level of protection Here 1 of 3 protection levels may be set to protect the CPU from
unauthorized access.
Protection level 1 (default setting):
• No password adjustable, no restrictions
Protection level 2 with password:
• Authorized users: read and write access
• Unauthorized user: read access only
Protection level 3:
• Authorized users: read and write access
• Unauthorized user: no read and write access
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-13

Parameter for DP The properties dialog of the PROFIBUS part is opened via a double click to
the sub module DP.
General
Short description Here the short description "DP" for PROFIBUS DP is specified.
Order no. Nothing is shown here.
Name Here "DP" is shown. If you change the name, the new name appears in the
Siemens SIMATIC manager.
Interface The PROFIBUS address is shown here.
Properties With this button the properties of the PROFIBUS DP interface may be
preset.
Comment You can enter the purpose of the DP master in this box.
Addresses
Diagnostics A diagnostics address for PROFIBUS DP is to be preset here. In the case

of an error the CPU is informed via this address.
Operating mode Here the operating mode of the PROFIBUS part may be preset. More may
be found at chapter "Deployment PROFIBUS Communication".
Configuration Within the operating mode "DP-Slave" you may configure your slave
system. More may be found at chapter "Deployment PROFIBUS
communication".
Clock These parameters are not supported.
4-14 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Parameter for The properties dialog of the MPI interface is opened via a double click to
MPI/DP the sub module MPI/DP.
General
Short description Here the short description "MPI/DP" for the MPI interface is specified.
Order no. Nothing is shown here.
Name At Name "MPI/DP" for the MPI interface is shown. If you change the name,
the new name appears in the Siemens SIMATIC manager.
Type Please regard only the type "MPI" is supported by the VIPA CPU.
Interface Here the MPI address is shown.
Properties With this button the properties of the MPI interface may be preset.
Comment You can enter the purpose of the MPI interface in this box.
Addresses
Diagnostics A diagnostics address for the MPI interface is to be preset here. In the
case of an error the CPU is informed via this address.
Operating mode, These parameters are not supported.

Configuration,
Clock
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-15

Setting VIPA specific CPU parameters
Overview Except of the VIPA specific CPU parameters the CPU parameterization
takes place in the parameter dialog of the CPU 318-2AJ00.
With installing of the SPEEDBUS.GSD the VIPA specific parameters may
be set during hardware configuration.
Here the following parameters may be accessed:
• Function RS485 (PtP, Synchronization DP master and CPU)
• Token Watch
• Number remanence flag, -timer, -counter
• Priority OB 28, OB 29, OB 33, OB 34
• Execution OB 33, OB 34
• Phase offset OB 33, OB 34
Requirements Since the VIPA specific CPU parameters may be set, the installation of the
SPEEDBUS.GSD from VIPA in the hardware catalog is necessary.
The CPU may be configured in a PROFIBUS master system and the
appropriate parameters may be set after installation.
Installation of the The GSD (Geräte-Stamm-Datei) is online available in the following

SPEEDBUS.GSD language versions. Further language versions are available on inquires.
Name Language
SPEEDBUS.GSD german (default)
SPEEDBUS.GSG german
SPEEDBUS.GSE english
The GSD files may be found at www.vipa.com at the "Service" part.
The integration of the SPEEDBUS.GSD takes place with the following

proceeding:
• Browse to www.vipa.com.
• Click to Service > Download > GSD- and EDS-Files > PROFIBUS.
• Download the file Cx000023_Vxxx.
• Extract the file to your work directory. The SPEEDBUS.GSD is stored in
the directory VIPA_System_300S.
• Start the hardware configurator from Siemens.
• Close every project.
• Select Options > Install new GSD-file.
• Navigate to the directory VIPA_System_300S and select
SPEEDBUS.GSD.
The SPEED7 CPUs and modules of the System 300S from VIPA may now
be found in the hardware catalog at PROFIBUS-DP / Additional field
devices / I/O / VIPA_SPEEDBUS.
4-16 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Proceeding The embedding of the CPU 315-2AG12 happens by means of a virtual

PROFIBUS master system with the following approach:
Slot Module • Führen Sie eine Hardware-Konfiguration für die CPU

1 durch (siehe hierzu "Hardware-Konfiguration - CPU").
2 • Configure always as last module a Siemens DP master
X... CPU ... CP 342-5 (342-5DA02 V5.0). Connect and parameterize
it at operation mode "DP-Master".
• Connect the slave system "VIPA_SPEEDbus". After
3 installing the SPEEDBUS.GSD this may be found in the
hardware catalog at PROFIBUS-DP / Additional field
devices / I/O / VIPA / VIPA_SPEEDBUS.
... • For the slave system set the PROFIBUS address 100.
• Configure at slot 0 the VIPA CPU 315-2AG12 of the
hardware catalog from VIPA_SPEEDbus.
always as last module
342-5DA02 V5.0 • By double clicking the placed CPU 315-2AG12 the
properties dialog of the CPU may be opened.
virtual DP master for CPU

As soon as the project is transferred together with the PLC
user program to the CPU, the parameters will be taken after
start-up.
(100) VIPA
SPEEDbus
CPU:
Addr.:100
VIPA_SPEEDbus
Slot Order No.
0 315-2AG12 ...
Object properties
Note!
The hardware configuration, which is shown here, is only required, if you
want to customize the VIPA specific parameters.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-17

VIPA specific The following parameters may be accessed by means of the properties
parameters dialog of the VIPA-CPU.
Function RS485 Per default the RS485 interface is used for the PROFIBUS DP master.
Using this parameter the RS485 interface may be switched to PtP
communication (point to point) respectively the synchronization between
DP master system and CPU may be set:
Deactivated Deactivates the RS485 interface

PtP With this operating mode the PROFIBUS DP
master is deactivated and the RS485 interface
acts as an interface for serial point-to-point
communication.
Here data may be exchanged between two
stations by means of protocols.
More about this may be found at chapter
"Deployment RS485 for PtP communication"
in this manual.
PROFIBUS DP async PROFIBUS DP master operation
asynchronous to CPU cycle
The RS485 interface is preset at default to
PROFIBUS DP async. Here CPU cycle and
cycles of every VIPA PROFIBUS DP master
run independently.
PROFIBUS DP syncIn The CPU is waiting for DP master input data.
PROFIBUS DP syncOut The DP master system is waiting for CPU
output data.
PROFIBUS DP syncInOut CPU and DP master system are waiting on
each other and form thereby a cycle.
Default: PROFIBUS DP async
Synchronization Normally the cycles of CPU and DP master run independently. The cycle
between master time of the CPU is the time needed for one OB1 cycle and for reading
system and CPU respectively writing the inputs respectively outputs. The cycle time of a DP
master depends among others on the number of connected slaves and the
baud rate, thus every plugged DP master has its own cycle time.
Due to the asynchronism of CPU and DP master the whole system gets
relatively high response times.
The synchronization behavior between every VIPA PROFIBUS DP master
and the CPU may be configured by means of a hardware configuration as
shown above.
The different modes for the synchronization are in the following described.
4-18 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

PROFIBUS DP In PROFIBUS DP SyncInOut mode CPU and DP-Master-System are

SyncInOut waiting on each other and form thereby a cycle. Here the whole cycle is the
sum of the longest DP master cycle and CPU cycle.
By this synchronization mode you receive global consistent in-/ output data,
since within the total cycle the same input and output data are handled
successively by CPU and DP master system.
If necessary the time of the Watchdog of the bus parameters should be
increased at this mode.
RUN
SPEED7 CPU Cycle ... ...
VIPA
Cycle Cycle ... ...
DP master system
whole cycle
PROFIBUS DP In this operating mode the cycle time of the VIPA DP master system
SyncOut depends on the CPU cycle time. After CPU start-up the DP master gets
synchronized.
As soon as their cycle is passed they wait for the next synchronization
impulse with output data of the CPU. So the response time of your system
can be improved because output data were directly transmitted to the DP
master system. If necessary the time of the Watchdog of the bus para-
meters should be increased at this mode.
RUN
SPEED7 CPU Cycle

Cycle CPU > DPM
"1-tier CPU cycle" VIPA
... ... ... ...
DP master system
RUN
SPEED7 CPU Cycle

Cycle CPU < DPM
"n-tier CPU cycle" VIPA
Cycle ... ... ...
DP master system
PROFIBUS DP In the operating mode PROFIBUS DP SyncIn the CPU cycle is

SyncIn synchronized to the cycle of the VIPA PROFIBUS DP master system.
Here the CPU cycle depends on the VIPA DP master with the longest cycle
time. If the CPU gets into RUN it is synchronized with each PROFIBUS DP
master. As soon as the CPU cycle is passed, it waits for the next
synchronization impulse with input data of the DP master system.
If necessary the Scan Cycle Monitoring Time of the CPU should be in-
creased.
RUN
SPEED7 CPU Cycle ... ... ...

Cycle CPU > DPM
"n-tier longest DP master cycle" VIPA
Cycle
DP master system
RUN
SPEED7 CPU Cycle ... ... ...

Cycle CPU < DPM
"1-tier longest DP master cycle" VIPA
Cycle
DP master system
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-19

Token Watch By presetting the PROFIBUS bus parameters within the hardware
configuration a token time for the PROFIBUS results. The token time
defines the duration until the token reaches the DP master again.
Per default this time is supervised. Due to this monitoring disturbances on
the bus can affect a reboot of the DP master. Here with the parameter
Token Watch the monitoring of the token time can be switched off
respectively on.
Default: On
Number Here the number of flag bytes may be set. With 0 the value Retentive
remanence flag memory > Number of memory bytes starting with MB0 set at the
parameters of the Siemens CPU is used. Otherwise the adjusted value
(1 ... 8192) is used.
Default: 0
Phase offset and The CPU offers additional cyclic interrupts, which interrupt the cyclic
execution of OB33 processing in certain distances. Point of start of the time interval is the
and OB34 change of operating mode from STOP to RUN.
To avoid that the cyclic interrupts of different cyclic interrupt OBs receive a
start request at the same time and so a time out may occur, there is the
possibility to set a phase offset respectively a time of execution.
The phase offset (0 ... 60000ms) serves for distribution processing times
for cyclic interrupts across the cycle.
The time intervals, in which the cyclic interrupt OB should be processed
may be entered with execution (1 ... 60000ms).
Default: Phase offset: 0
Execution: OB33: 500ms
OB34: 200ms
Priority of OB28, The priority fixes the order of interrupts of the corresponding interrupt OB.
OB29, OB33 and Here the following priorities are supported:
OB34 0 (Interrupt-OB is deactivated), 2, 3, 4, 9, 12, 16, 17, 24
Default: 24
4-20 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Project transfer
Overview There are the following possibilities for project transfer into the CPU:
• Transfer via MPI/PROFIBUS
• Transfer via Ethernet
• Transfer via MMC
Transfer via For transfer via MPI/PROFIBUS there are the following 2 interfaces:
MPI/PROFIBUS • X2: MPI interface
• X3: PROFIBUS interface
Net structure The structure of a MPI net is electrically identical with the structure of a
PROFIBUS net. This means the same rules are valid and you use the
same components for the build-up. The single participants are connected
with each other via bus interface plugs and PROFIBUS cables. Per default
the MPI net runs with 187.5kbaud. VIPA CPUs are delivered with MPI
address 2.
MPI programming The MPI programming cables are available at VIPA in different variants.
cable The cables provide a RS232 res. USB plug for the PC and a bus enabled
RS485 plug for the CPU.
Due to the RS485 connection you may plug the MPI programming cables
directly to an already plugged plug on the RS485 jack. Every bus
participant identifies itself at the bus with an unique address, in the course
of the address 0 is reserved for programming devices.
Terminating resistor A cable has to be terminated with its surge impedance. For this you switch
on the terminating resistor at the first and the last participant of a network
or a segment.
Please make sure that the participants with the activated terminating
resistors are always power supplied. Otherwise it may cause interferences
on the bus.
STEP7
from Siemens
USB-MPI Adapter
VIPA
MPI
Error
Active
Power
Terminating MPI/PROFIBUS net Terminating

USB
VIPA 950-0KB31
MPI programming cable
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-21

Approach transfer • Connect your PC to the MPI jack of your CPU via a MPI programming
via MPI interface cable.
• Load your project in the SIMATIC Manager from Siemens.
• Choose in the menu Options > Set PG/PC interface
• Select in the according list the "PC Adapter (MPI)"; if appropriate you
have to add it first, then click on [Properties].
• Set in the register MPI the transfer parameters of your MPI net and type
a valid address.
• Switch to the register Local connection
• Set the COM port of the PC and the transfer rate 38400Baud for the
MPI programming cable from VIPA.
• Via PLC > Load to module you may transfer your project via MPI to the
CPU and save it on a MMC via PLC > Copy RAM to ROM if one is
plugged.
Approach transfer • Connect your PC to the DP-PB/PtP jack of your CPU via a MPI
via PROFIBUS programming cable.
interface • Load your project in the Siemens SIMATIC Manager.
• Choose in the menu Options > Set PG/PC interface
• Select in the according list the "PC Adapter (PROFIBUS)"; if appropriate
you have to add it first, then click on [Properties].
• Set in the register PROFIBUS the transfer parameters of your
PROFIBUS net and type a valid PROFIBUS address. The PROFIBUS
address must be assigned to the DP master by a project before.
• Switch to the register Local connection
• Set the COM port of the PCs and the transfer rate 38400Baud for the
MPI programming cable from VIPA.
• Via PLC > Load to module you may transfer your project via PROFIBUS
to the CPU and save it on a MMC via PLC > Copy RAM to ROM if one
is plugged.
Note!
Transfer via PROFIBUS is available by DP master, if projected as master
and assigned with a PROFIBUS address before.
Within selecting the slave mode you have additionally to select the option
"Test, commissioning, routing".
4-22 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Transfer via For transfer via Ethernet the CPU has the following interface:
Ethernet • X4: Ethernet PG/OP channel
Initialization So that you may access the Ethernet PG/OP channel you have to assign
IP address parameters by means of the "initialization"(see "hardware
configuration - Ethernet PG/OP channel".
Information about the initialization of the Ethernet PG/OP channel may be
found at "Initialization of Ethernet PG/OP channel".
Transfer • For the transfer, connect, if not already done, the appropriate Ethernet
port to your Ethernet.
• Open your project with the Siemens SIMATIC Manager.
• Set via Options > Set PG/PC Interface the access path to "TCP/IP ->
Network card .... ".
• Click to PLC > Download → the dialog "Select target module" is opened.
Select your target module and enter the IP address parameters of the
Ethernet PG/OP channel for connection. Provided that no new hardware
configuration is transferred to the CPU, the entered Ethernet connection
is permanently stored in the project as transfer channel.
• With [OK] the transfer is started.
Note!
System dependent you get a message that the projected system differs
from target system. This message may be accepted by [OK].
→ your project is transferred and may be executed in the CPU after
transfer.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-23

Transfer via The MMC (Memory Card) serves as external transfer and storage medium.
MMC There may be stored several projects and sub-directories on a MMC
storage module. Please regard that your current project is stored in the root
directory and has one of the following file names:
• S7PROG.WLD
• AUTOLOAD.WLD
With File > Memory Card File > New in the Siemens SIMATIC Manager a
new wld file may be created. After the creation copy the blocks from the
project blocks folder and the System data into the wld file.
Transfer The transfer of the application program from the MMC into the CPU takes
MMC → CPU place depending on the file name after an overall reset or PowerON.
• S7PROG.WLD is read from the MMC after overall reset.
• AUTOLOAD.WLD is read after PowerON from the MMC.
The blinking of the MCC-LED of the CPU marks the active transfer. Please
regard that your user memory serves for enough space, otherwise your
user program is not completely loaded and the SF LED gets on.
Transfer When the MMC has been installed, the write command stores the content
CPU → MMC of the battery buffered RAM as S7PROG.WLD on the MMC.
The write command is controlled by means of the block area of the
Siemens SIMATIC manager PLC > Copy RAM to ROM. During the write
process the MCC-LED of the CPU is blinking. When the LED expires the
write process is finished.
If this project is to be loaded automatically from the MMC with PowerON,
you have to rename this on the MMC to AUTOLOAD.WLD.
Transfer control After a MMC access, an ID is written into the diagnostic buffer of the CPU.
To monitor the diagnosis entries, you select PLC > Module Information in
the Siemens SIMATIC Manager. Via the register "Diagnostic Buffer" you
reach the diagnosis window.
When accessing a MMC, the following events may occur:
Event-ID Meaning
0xE100 MMC access error
0xE101 MMC error file system
0xE102 MMC error FAT
0xE104 MMC-error with storing
0xE200 MMC writing finished successful
0xE210 MMC reading finished (reload after overall reset)
0xE21F Error during reload, read error, out of memory
4-24 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Access to the internal Web page
Access to the The Ethernet PG/OP channel provides a web page that you may access
web page via an Internet browser by its IP address. The web page contains
information about firmware versions, current cycle times etc.
The current content of the web page is stored on MMC by means of the
MMC-Cmd WEBPAGE. More information may be found at "MMC-Cmd -
Auto commands".
Requirements A PG/OP channel connection should be established between PC with

Internet browser and CPU 315-2AG12. This may be tested by Ping to the
IP address of the PG/OP channel.
Web page The access takes place via the IP address of the Ethernet PG/OP
channel. The web page only serves for information output. The monitored
values are not alterable.
CPU WITH ETHERNET PG/OP

Slot 100
VIPA 315-2AG12 V3.... Px000078.pkg, Order no., firmware vers., package,
SERIALNUMBER 14361 serial no.
SUPPORTDATA : Information for support
PRODUCT V3420, HARDWARE V0111, 5679G-V10,
Hx000026.100,Bx000227 V6420, Ax000086 V1200,
Ax000056 V0000, fx000007.wld V1120,
FlashFileSystem : V102
Memorysizes (Bytes): LoadMem : 2097152, Information about memory
WorkMemCode : 524288, WorkMemData : 524288 configuration, load memory, work
memory (code/data)
OnBoardEthernet : MacAddress : 0020D5773819, Ethernet PG/OP: Addresses
IP-Address :, SubnetMask :, Gateway :
Cpu state : Stop CPU status
FunctionRS485 X2/COM1: MPI Operating mode RS485
FunctionRS485 X3/COM2: DPM-async (MPI: MPI operation, DPM: DP master)
Cycletime [microseconds] : min=0 cur=0 ave=0 CPU cycle time:
max=0 min= minimal
cur= current
max= maximal
MCC-Trial-Time: 70:23 Remaining time in hh:mm for deacti-
vation of the expansion memory if
MCC is removed.
ArmLoad [percent] : cur11, max=33 Information for support
Additional CPU components:

Slot 201 Slot 201 (DP master):
VIPA 342-1DA70 V3.1.9 Px000062.pkg, Name, firmware version, package
SUPPORTDATA : Information for support
PRODUCT V3190, BB000218 V5190, AB000068
V4160, ModuleType CB2C0010, Cycletime
[microseconds]: min=65535000 cur=0 ave=0
max=0 cnt=0
continued ...
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-25

... continue
Standard Bus Modules at the standard bus

BaudRate Read Mode1, BaudRate Write Mode1 Information for the support
Line 1: ModuleType 94F9:IM36x IM interface if exists

Rack 0 /Slot 4 Rack no. / Slot no.
ModuleType:9FC3: Digital Input 32 Type of module
Baseaddress Input 0 Configured base address
if exists firmware no. and package
Rack 0 /Slot 5 ... Rack no. / slot no.
...
Line 2: ModuleType A4FE:IM36x IM interface if exists
Rack 1 /Slot 4
ModuleType:9FC3: Digital Input 32 Type of module
Baseaddress Input 0 Configured base address
if exists firmware no. and package
Rack 1 /Slot 5 ... Rack no. / slot no.
4-26 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Operating modes
Overview The CPU can be in one of 4 operating modes:

• Operating mode STOP
• Operating mode START-UP
• Operating mode RUN
• Operating mode HOLD
Certain conditions in the operating modes START-UP and RUN require a
specific reaction from the system program. In this case the application
interface is often provided by a call to an organization block that was
included specifically for this event.
Operating mode • The application program is not processed.

STOP • If there has been a processing before, the values of counters, timers,
flags and the process image are retained during the transition to the
STOP mode.
• Outputs are inhibited, i.e. all digital outputs are disabled.
• RUN-LED off
• STOP-LED on
Operating mode • During the transition from STOP to RUN a call is issued to the start-up
START-UP organization block OB 100. The processing time for this OB is not
monitored. The START-UP OB may issue calls to other blocks.
• All digital outputs are disabled during the START-UP, i.e. outputs are
inhibited.
• RUN-LED blinks as soon as the OB 100 is operated and for at least
3s, even if the start-up time is shorter or the CPU gets to
STOP due to an error. This indicates the start-up.
• STOP-LED off
When the CPU has completed the START-UP OB, it assumes the
operating mode RUN.
Operating mode • The application program in OB 1 is processed in a cycle. Under the

RUN control of alarms other program sections can be included in the cycle.
• All timers and counters being started by the program are active and the
process image is updated with every cycle.
• The BASP-signal (outputs inhibited) is deactivated, i.e. all digital outputs
are enabled.
• RUN-LED on
• STOP-LED off
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-27

Operating mode The CPU offers up to 3 breakpoints to be defined for program diagnosis.
HOLD Setting and deletion of breakpoints happens in your programming
environment. As soon as a breakpoint is reached, you may process your
program step by step.
Precondition For the usage of breakpoints, the following preconditions have to be

fulfilled:
• Testing in single step mode is possible with STL. If necessary switch the
view via View > STL to STL.
• The block must be opened online and must not be protected.
Approach for • Activate View > Breakpoint Bar.

working with • Set the cursor to the command line where you want to insert a
breakpoints breakpoint.
• Set the breakpoint with Debug > Set Breakpoint. The according
command line is marked with a circle.
• To activate the breakpoint click on Debug > Breakpoints Active. The
circle is changed to a filled circle.
• Bring your CPU into RUN. When the program reaches the breakpoint,
your CPU switches to the state HOLD, the breakpoint is marked with an
arrow and the register contents are monitored.
• Now you may execute the program code step by step via Debug >
Execute Next Statement or run the program until the next breakpoint via
Debug > Resume.
• Delete (all) breakpoints with the option Debug > Delete All Breakpoints.
Behavior in • The RUN-LED blinks and the STOP-LED is on.

operating state • The execution of the code is stopped. No level is further executed.
HOLD
• All times are frozen.
• The real-time clock runs is just running.
• The outputs were disabled (BASP is activated).
• Configured CP connections remain exist.
Note!
The usage of breakpoints is always possible. Switching to the operating
mode test operation is not necessary.
With more than 2 breakpoints, a single step execution is not possible.
4-28 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Function The CPUs include security mechanisms like a Watchdog (100ms) and a
security parameterizable cycle time surveillance (parameterizable min. 1ms) that
stop res. execute a RESET at the CPU in case of an error and set it into a
defined STOP state.
The VIPA CPUs are developed function secure and have the following
system properties:
Event concerns Effect

RUN → STOP general BASP (Befehls-Ausgabe-Sperre, i.e. command
output lock) is set.
central digital outputs The outputs are disabled.
central analog outputs The Outputs are disabled.
- Voltage outputs issue 0V
- Current outputs 0...20mA issue 0mA
- Current outputs 4...20mA issue 4mA
If configured also substitute values may be
issued.
decentral outputs Same behavior as the central digital/analog
outputs.
decentral inputs The inputs are cyclically be read by the decentra-
lized station and the recent values are put at
disposal.
STOP → RUN general First the PII is deleted, then OB 100 is called. After
res. PowerON the execution of the OB, the BASP is reset and
the cycle starts with:
Delete PIO → Read PII → OB 1.
decentral inputs The inputs are once be read by the decentralized
station and the recent values are put at disposal.
RUN general The program execution happens cyclically and can
therefore be foreseen:
Read PII → OB 1 → Write PIO.
PII = Process image inputs

PIO = Process image outputs
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-29

Overall reset
Overview During the overall reset the entire user memory (RAM) is erased. Data
located in the memory card is not affected.
You have 2 options to initiate an overall reset:
• initiate the overall reset by means of the function selector switch
• initiate the overall reset by means of the Siemens SIMATIC Manager
Note!
You should always issue an overall reset to your CPU before loading an
application program into your CPU to ensure that all blocks have been
cleared from the CPU.
Overall reset by Condition

means of the The operating mode of the CPU is STOP. Place the function selector on
function selector the CPU in position "STOP" → the STOP-LED is on.
Overall reset
• Place the function selector in the position MRES and hold it in this
position for app. 3 seconds. → The STOP-LED changes from blinking to
permanently on.
• Place the function selector in the position STOP and switch it to MRES
and quickly back to STOP within a period of less than 3 seconds.
→ The STOP-LED blinks (overall reset procedure).
• The overall reset has been completed when the STOP-LED is on
permanently. → The STOP-LED is on.
The following figure illustrates the above procedure:
1 2 3 4
PW PW PW PW
RN RN RN RN
ST ST ST ST
SF SF SF SF
FC FC FC FC
MC MC MC MC
RUN RUN RUN RUN
3 Sec. STOP STOP STOP STOP
MRES MRES MRES MRES
3 Sec.
4-30 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Automatic reload If there is a project S7PROG.WLD on the MMC, the CPU attempts to
reload this project from MMC → the MCC LED is on.
When the reload has been completed the LED expires. The operating
mode of the CPU will be STOP or RUN, depending on the position of the
function selector.
Overall reset by Condition

means of the The operating mode of the CPU must be STOP.
Siemens SIMATIC You may place the CPU in STOP mode by the menu command
Manager PLC > Operating mode.
Overall reset
You may request the overall reset by means of the menu command PLC >
Clean/Reset.
In the dialog window you may place your CPU in STOP mode and start the
overall reset if this has not been done as yet.
The STOP-LED blinks during the overall reset procedure.
When the STOP-LED is on permanently the overall reset procedure has
been completed.
Automatic reload If there is a project S7PROG.WLD on the MMC, the CPU attempts to
reload this project from MMC → the MCC LED is on.
When the reload has been completed, the LED expires. The operating
mode of the CPU will be STOP or RUN, depending on the position of the
function selector.
Reset to factory A Factory reset deletes the internal RAM of the CPU completely and sets it
setting back to the delivery state.
Please regard that the MPI address is also set back to default 2!
More information may be found at the part "Factory reset" further below.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-31

Firmware update
Overview There is the opportunity to execute a firmware update for the CPU and its
components via MMC. For this an accordingly prepared MMC must be in
the CPU during the startup.
So a firmware files can be recognized and assigned with startup, a pkg file
name is reserved for each updateable component an hardware release,
which begins with "px" and differs in a number with six digits.
The pkg file name of every updateable component may be found at a label
right down the front flap of the module.
After PowerON and CPU STOP the CPU checks if there is a *.pkg file on
the MMC. If this firmware version is different to the existing firmware
version, this is indicated by blinking of the LEDs and the firmware may be
installed by an update request.
Firmware package and version
Latest Firmware at The latest firmware versions are to be found in the service area at
www.vipa.de www.vipa.de.
For example the following files are necessary for the firmware update of
the CPU 315-2AG12 and its components with hardware release 1:
• 315-2AG12, Hardware release 1: Px000078.pkg
• PROFIBUS DP master: Px000062.pkg
Attention!
When installing a new firmware you have to be extremely careful. Under
certain circumstances you may destroy the CPU, for example if the voltage
supply is interrupted during transfer or if the firmware file is defective.
In this case, please call the VIPA-Hotline!
Please regard that the version of the update firmware has to be different
from the existing firmware otherwise no update is executed.
4-32 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Display the The CPU has an integrated website that monitors information about
Firmware version of firmware version of the SPEED7 components. The Ethernet PG/OP
the SPEED7 system channel provides the access to this web site.
via Web Site
To activate the PG/OP channel you have to enter according IP parameters.
This can be made in Siemens SIMATIC manager either by a hardware
configuration, loaded by MMC respectively MPI or via Ethernet by means of
the MAC address with PLC > Assign Ethernet Address.
After that you may access the PG/OP channel with a web browser via the
IP address of the project engineering. More detailed information is to find in
the manual at "Access to Ethernet PG/OP channel and website".
Load firmware and • Go to www.vipa.de.

transfer it to MMC • Click on Service > Download > Firmware.
• Navigate via System 300S > CPU to your CPU and download the zip file
to your PC.
• Extract the zip file and copy the extracted pkg files to your MMC.
Attention!
With a firmware update an overall reset is automatically executed. If your
program is only available in the load memory of the CPU it is deleted! Save
your program before executing a firmware update! After the firmware
update you should execute a "Set back to factory settings" (see following
page).
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-33

Transfer firmware 1. Switch the operating mode switch of your CPU in position STOP.
from MMC into Turn off the voltage supply. Plug the MMC with the firmware files
CPU into the CPU. Please take care of the correct plug-in direction of the
MMC. Turn on the voltage supply.
2. After a short boot-up time, the alternate blinking of the LEDs SF
and FC shows that at least a more current firmware file was found
on the MMC.
3. You start the transfer of the firmware as soon as you tip the
operating mode switch downwards to MRES within 10s.
4. During the update process, the LEDs SF and FC are alternately
blinking and MCC LED is on. This may last several minutes.
5. The update is successful finished when the LEDs PW, ST, SF, FC
and MC are on. If they are blinking fast, an error occurred.
6. Turn Power OFF and ON. Now it is checked by the CPU, whether
further current firmware versions are available at the MMC. If so,
again the LEDs SF and FC flash after a short start-up period.
Continue with point 3.
If the LEDs do not flash, the firmware update is ready.
Now a factory reset should be executed (see next page). After that
the CPU is ready for duty.
1 2 3 4 5 6
Preparation Firmware Start update Update runs Update Error

recognized terminates
RUN at MMC error free
STOP PLC PLC PLC PLC PLC PLC
PW PW PW PW PW PW
MRES
RN RN RN RN RN RN
ST ST ST ST ST ST
SF SF SF SF SF SF
Insert MMC Tip RUN RUN
FC FC FC FC FC FC
STOP STOP
MC MC MC MC MC MC Power
Power OFF/ON MRES MRES OFF/ON
10 Sec.
4-34 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Factory reset
Proceeding With the following proceeding the internal RAM of the CPU is completely
deleted and the CPU is reset to delivery state. Please note that here also
the IP address of the Ethernet PG/OP channel is set to 0.0.0.0 and the MPI
address is reset to the address 2!
A factory reset may also be executed by the MMC-Cmd FACTORY_
RESET. More information may be found at "MMC-Cmd - Auto commands".
1. Switch the CPU to STOP.

2. Push the operating mode switch down to position MRES for 30s. Here
the STOP-LED flashes. After a few seconds the stop LED changes to
static light. Now the STOP LED changes between static light and
flashing. Starting here count the static light states.
3. After the 6. static light release the operating mode switch and tip it
downwards to MRES. Now the RUN LED lights up once. This means
that the RAM was deleted completely.
4. For the confirmation of the resetting procedure the LEDs PW, ST, SF,
FC and MC get ON. If not, the factory reset has failed and only an
overall reset was executed. In this case you can repeat the procedure.
A factory reset can only be executed if the stop LED has static light for
exactly 6 times.
5. The end of factory reset is shown by static light of the LEDs PW, ST,
SF, FC and MC. Switch the power supply off and on.
The proceeding is shown in the following Illustration:
1 2 3 4 5
CPU in Request factory reset Start factory reset Factory reset Error: Only
STOP executed overall reset
executed
PLC PLC PLC PLC PLC PLC
PW PW PW PW PW PW
RN RN RN RN RN RN
ST ST ST ST ST ST
SF
Tip RUN
SF
6x SF
RUN Tip RUN
SF SF SF
FC FC FC FC FC FC
STOP STOP STOP
MC MC MC MC MC MC Power
MRES MRES MRES OFF/ON
30 Sec. 1 Sec.
Note!
After the firmware update you always should execute a Factory reset.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-35

Slot for storage media
Overview At the front of the CPU there is a slot for storage media.
As external storage medium for applications and firmware you may use a
multimedia card (MMC) or a VIPA MCC memory extension card. The MCC
can additionally be used as an external storage medium.
It has the PC compatible FAT16 file format.
You can cause the CPU to load a project automatically respectively to
execute a command file by means of pre-defined file names.
Accessing the To the following times an access takes place on a storage medium:
storage medium
After overall reset • The CPU checks if there is a project S7PROG.WLD. If exists the project
is automatically loaded.
• The CPU checks if there is a project PROTECT.WLD with protected
blocks. If exists the project is automatically loaded. These blocks are
stored in the CPU until the CPU is reset to factory setting or an empty
PROTECT.WLD is loaded.
• The CPU checks if a MCC memory extension card is put. If exists the
memory extension is enabled, otherwise a memory expansion, which
was activated before, is de-activated.
After PowerON • The CPU checks if there is a project AUTOLOAD.WLD. If exists an

overall reset is established and the project is automatically loaded.
• The CPU checks if there is a command file with VIPA_CMD.MMC. If
exists the command file is loaded and the containing instructions are
executed.
• After PowerON and CPU STOP the CPU checks if there is a *.pkg file
(firmware file). If exists this is indicated by blinking of the LEDs and the
firmware may be installed by an update request (see "Firmware update).
Once in STOP • If a storage medium is put, which contains a command file

VIPA_CMD.MMC, the command file is loaded and the containing
instructions are executed.
4-36 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Memory extension with MCC
Overview There is the possibility to extend the work memory of the CPU.
For this, a MCC memory extension card is available from VIPA. The MCC
is a specially prepared MMC (Multimedia Card). By plugging the MCC into
the MCC slot and then an overall reset the according memory expansion is
released. There may only one memory expansion be activated at the time.
On the MCC there is the file memory.key. This file may not be altered or
deleted. You may use the MCC also as "normal" MMC for storing your
project.
Approach To extend the memory, plug the MCC into the card slot at the CPU labeled
with "MCC" and execute an overall reset.
CPU Overall reset

MCC Tip
3Sec.
MMC
RN
ST
MR memory is extended for the MCC memory
configuration (diagnostic entry 0xE400)
If the memory expansion on the MCC exceeds the maximum extendable

memory range of the CPU, the maximum possible memory of the CPU is
automatically used.
You may determine the recent memory extension via the integrated web
page or with the Siemens SIMATIC Manager at Module Information -
"Memory".
Attention!
Please regard that the MCC must remain plugged when you’ve executed
the memory expansion at the CPU. Otherwise the CPU switches to STOP
after 72 hours. The MCC cannot be exchanged with a MCC of the same
memory configuration.
Behavior When the MCC memory configuration has been taken over you may find
the diagnosis entry 0xE400 in the diagnostic buffer of the CPU.
After pulling the MCC the entry 0xE401 appears in the diagnostic buffer,
the SF-LED is on and after 72 hours the CPU switches to STOP. A reboot
is only possible after plugging-in the MCC again or after an overall reset.
The remaining time after pulling the MCC is always been shown with the
parameter MCC-Trial-Time on the web page.
After re-plugging the MCC, the SF-LED extinguishes and 0xE400 is
entered into the diagnostic buffer.
You may reset the memory configuration of your CPU to the initial status at
any time by executing an overall reset without MCC.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-37
Extended know-how protection
Overview Besides the "standard" Know-how protection the SPEED7-CPUs from VIPA
provide an "extended" know-how protection that serves a secure block
protection for accesses of 3. persons.
Standard protection The standard protection from Siemens transfers also protected blocks to
the PG but their content is not displayed. But with according manipulation
the Know-how protection is not guaranteed.
Extended protection The "extended" know-how protection developed by VIPA offers the
opportunity to store blocks permanently in the CPU.
At the "extended" protection you transfer the protected blocks into a WLD-
file named protect.wld. By plugging the MMC and following overall reset,
the blocks in the protect.wld are permanently stored in the CPU.
You may protect OBs, FBs and FCs.
When back-reading the protected blocks into the PG, exclusively the block
header are loaded. The block code that is to be protected remains in the
CPU and cannot be read.
PC CPU OVERALL_RESET
Tip
Blocks 3Sec.
MMC
RN
ST
MR
wld file MMC protected Blocks

are located in the CPU
protect.wld
Protect blocks Create a new wld-file in your project engineering tool with File > Memory
with protect.wld Card file > New and rename it to "protect.wld".
Transfer the according blocks into the file by dragging them with the mouse
from the project to the file window of protect.wld.
4-38 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Transfer Transfer the file protect.wld to a MMC storage module, plug the MMC into
protect.wld to CPU the CPU and execute an overall reset with the following approach:
with overall reset
1 2 3 4
PW PW PW PW
RN RN RN RN
ST ST ST ST
SF SF SF SF
FC FC FC FC
MC MC MC MC
RUN RUN RUN RUN
3 Sec. STOP STOP STOP STOP
MRES MRES MRES MRES
3 Sec.
The overall reset stores the blocks in protect.wld permanently in the CPU
protected from accesses of 3. persons.
Protection Protected blocks are overwritten by a new protect.wld.

behavior Using a PG 3. persons may access protected blocks but only the block
header is transferred to the PG. The block code that is to be protected
remains in the CPU and cannot be read.
Change respectively Protected blocks in the RAM of the CPU may be substituted at any time by
delete protected blocks with the same name. This change remains up to next overall reset.
blocks Protected blocks may permanently be overwritten only if these are deleted
at the protect.wld before.
By transferring an empty protect.wld from the MMC you may delete all
protected blocks in the CPU.
Usage of Due to the fact that reading of a "protected" block from the CPU monitors
protected blocks no symbol labels it is convenient to provide the "block covers" for the end
user.
For this, create a project out of all protected blocks. Delete all networks in
the blocks so that these only contain the variable definitions in the
according symbolism.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-39

MMC-Cmd - Auto commands
Overview A command file at a MMC is automatically executed under the following

conditions:
• CPU is in STOP and MMC is stuck
• After each PowerON
Command file The command file is a text file, which consists of a command sequence to
be stored as vipa_cmd.mmc in the root directory of the MMC.
The file has to be started by CMD_START as 1. command, followed by the
desired commands (no other text) and must be finished by CMD_END as
last command.
Text after the last command CMD_END e.g. comments is permissible,
because this is ignored. As soon as the command file is recognized and
executed each action is stored at the MMC in the log file logfile.txt. In
addition for each executed command a diagnostics entry may be found in
the diagnostics buffer.
Commands Please regard the command sequence is to be started with CMD_START

and ended with CMD_END.
Command Description Diagnostics entry
CMD_START In the first line CMD_START is to be located. 0xE801
There is a diagnostic entry if CMD_START is missing 0xE8FE
WAIT1SECOND Waits ca. 1 second. 0xE803
WEBPAGE The current web page of the CPU is stored at the MMC 0xE804
as "webpage.htm".
LOAD_PROJECT The function "Overall reset and reload from MMC" is 0xE805
executed. The wld file located after the command is
loaded else "s7prog.wld" is loaded.
SAVE_PROJECT The recent project (blocks and hardware configuration) 0xE806
is stored as "s7prog.wld" at the MMC.
If the file just exists it is renamed to "s7prog.old".
If your CPU is password protected so you have to add
this as parameter. Otherwise there is no project written.
Example: SAVE_PROJECT password
FACTORY_RESET Executes "factory reset". 0xE807
DIAGBUF The current diagnostics buffer of the CPU is stored as 0xE80B
"diagbuff.txt" at the MMC.
SET_NETWORK IP parameters for Ethernet PG/OP channel may be set 0xE80E
by means of this command.
The IP parameters are to be given in the order IP
address, subnet mask and gateway in the format
x.x.x.x each separated by a comma.
Enter the IP address if there is no gateway used.
CMD_END In the last line CMD_END is to be located. 0xE802
4-40 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Examples The structure of a command file is shown in the following. The

corresponding diagnostics entry is put in parenthesizes.
Example 1
CMD_START Marks the start of the command sequence (0xE801)

LOAD_PROJECT proj.wld Execute an overall reset and load "proj.wld" (0xE805)
WAIT1SECOND Wait ca. 1s (0xE803)
WEBPAGE Store web page as "webpage.htm" (0xE804)
DIAGBUF Store diagnostics buffer of the CPU as "diagbuff.txt" (0xE80B)
CMD_END Marks the end of the command sequence (0xE802)
... arbitrary text ... Text after the command CMD_END is not evaluated.
Example 2
CMD_START Marks the start of the command sequence (0xE801)

LOAD_PROJECT proj2.wld Execute an overall reset and load "proj2.wld" (0xE805)
SET_NETWORK 172.16.129.210,255.255.224.0,172.16.129.210 IP parameter
(0xE80E)
WEBPAGE Store web page as "webpage.htm" (0xE804)
DIAGBUF Store diagnostics buffer of the CPU as "diagbuff.txt" (0xE80B)
CMD_END Marks the end of the command sequence (0xE802)
... arbitrary text ... Text after the command CMD_END is not evaluated.
Note!
The parameters IP address, subnet mask and gateway may be received
from the system administrator.
Enter the IP address if there is no gateway used.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-41

VIPA specific diagnostic entries
Entries in the You may read the diagnostic buffer of the CPU via the Siemens SIMATIC
diagnostic buffer Manager. Besides of the standard entries in the diagnostic buffer, the VIPA
CPUs support some additional specific entries in form of event-IDs.
The current content of the diagnostics buffer is stored on MMC by means
of the MMC-Cmd DIAGBUF. More information may be found at "MMC-Cmd
- Auto commands".
Note!
Every register of the module information is supported by the VIPA CPUs.
More information may be found at the online help of the Siemens SIMATIC
manager.
Monitoring the To monitor the diagnostic entries you choose the option PLC > Module
diagnostic entries Information in the Siemens SIMATIC Manager. Via the register "Diagnostic
Buffer" you reach the diagnostic window:
Module information
Path: Accessible Nodes MPI = 2 Operating mode CPU: RUN

... Diagnostic Buffer ... ... ... ... ...
Nr. Time of day Date Event

8 ... ... ...
9 ... ... ...
10 13:18:11:370 19.12.2011 Event-ID: 16# E0CC
11 ... ... ...
VIPA-ID
12 ... ... ...
13 ... ... ...
Details:
...
... ... ... ...
The diagnosis is independent from the operating mode of the CPU. You
may store a max. of 100 diagnostic entries in the CPU.
The following page shows an overview of the VIPA specific Event-IDs.
4-42 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Overview of the
Event-IDs
Event-ID Description
0xE003 Error at access to I/O devices
Zinfo1: I/O address
Zinfo2: Slot
0xE004 Multiple parameterization of a I/O address
Zinfo1: I/O address
Zinfo2: Slot
0xE005 Internal error - Please contact the VIPA-Hotline!
0xE007 Configured in-/output bytes do not fit into I/O area
0xE009 Error at access to standard back plane bus
0xE010 Not defined module group at backplane bus recognized
Zinfo2: Slot
Zinfo3: Type ID
0xE011 Master project engineering at Slave-CPU not possible or wrong slave configuration
0xE012 Error at parameterization
0xE013 Error at shift register access to standard bus digital modules
0xE014 Error at Check_Sys
0xE015 Error at access to the master
Zinfo2: Slot of the master (32=page frame master)
0xE016 Maximum block size at master transfer exceeded
Zinfo1: I/O address
Zinfo2: Slot
0xE017 Error at access to integrated slave
0xE018 Error at mapping of the master periphery
0xE019 Error at standard back plane bus system recognition
0xE01A Error at recognition of the operating mode (8 / 9 Bit)
0xE01B Error - maximum number of plug-in modules exceeded
0xE020 Error - interrupt information is not defined
0xE030 Error of the standard bus
0xE0B0 SPEED7 is not stoppable (probably undefined BCD value at timer)
0xE0C0 Not enough space in work memory for storing code block (block size exceeded)
0xE0CC Communication error MPI / Serial
Zinfo1: Code
1: Wrong Priority
2: Buffer overflow
3: Frame format error
7: Incorrect value
8: Incorrect RetVal
9: Incorrect SAP
10: Incorrect connection type
11: Incorrect sequence number
12: Faulty block number in the telegram
13: Faulty block type in the telegram
14: Inactive function
15: Incorrect size in the telegram
20: Error writing to MMC
90: Incorrect Buffer size
98: Unknown error
99: Internal error
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-43

0xE0CD Error at DPV1 job management
0xE0CE Error: Timeout at sending of the i-slave diagnostics
0xE100 MMC access error

0xE101 MMC error file system
0xE102 MMC error FAT
0xE104 MMC error at saving
0xE200 MMC writing finished (Copy Ram2Rom)
0xE210 MMC reading finished (reload after overall reset)
0xE21F MMC reading: error at reload (after overall reset), read error, out of memory
0xE300 Internal flash writing finished (Copy Ram2Rom)

0xE310 Internal flash writing finished (reload after battery failure)
0xE400 Memory expansion MCC has been plugged

0xE401 Memory expansion MCC has been removed
0xE801 MMC-Cmd: CMD_START recognized and successfully executed

0xE802 MMC-Cmd: CMD_END recognized and successfully executed
0xE803 MMC-Cmd: WAIT1SECOND recognized and successfully executed
0xE804 MMC-Cmd: WEBPAGE recognized and successfully executed
0xE805 MMC-Cmd: LOAD_PROJECT recognized and successfully executed
0xE806 MMC-Cmd: SAVE_ PROJECT recognized and successfully executed
0xE807 MMC-Cmd: FACTORY_RESET recognized and successfully executed
0xE80B MMC-Cmd: DIAGBUF recognized and successfully executed
0xE80E MMC-Cmd: SET_NETWORK recognized and successfully executed
0xE8FB MMC-Cmd: Error: Initialization error of the Ethernet-PG/OP channel by means of
SET_NETWORK.
0xE8FC MMC-Cmd: Error: Some IP parameters are missing in SET_NETWORK.
0xE8FE MMC-Cmd: Error: CMD_START is missing
0xE8FF MMC-Cmd: Error: Error while reading CMD file (MMC error)
0xE901 Check sum error
0xEA00 Internal error - Please contact the VIPA-Hotline!

0xEA02 SBUS: Internal error (internal plugged sub module not recognized)
Zinfo1: Internal slot
0xEA03 SBUS: Communication error CPU - PROFINET-IO-Controller
Zinfo1: Slot
Zinfo2: Status (0: OK, 1: ERROR, 2: BUSSY, 3: TIMEOUT, 4: LOCKED, 5: UNKNOWN)
0xEA04 SBUS: Multiple parameterization of a I/O address
Zinfo1: I/O address
Zinfo2: Slot
Zinfo3: Data width
0xEA08 SBUS: Parameterized input data width unequal to plugged input data width
Zinfo1: Parameterized input data width
Zinfo2: Slot
Zinfo3: Input data width of the plugged module
4-44 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

0xEA09 SBUS: Parameterized output data width unequal to plugged output data width
Zinfo1: Parameterized output data width
Zinfo2: Slot
Zinfo3: Output data width of the plugged module
0xEA10 SBUS: Input address outside input area
Zinfo1: I/O address
Zinfo2: Slot
Zinfo3: Data width
0xEA11 SBUS: Output address outside output area
Zinfo1: I/O address
Zinfo2: Slot
Zinfo3: Data width
0xEA12 SBUS: Error at writing record set
Zinfo1: Slot
Zinfo2: Record set number
Zinfo3: Record set length
0xEA14 SBUS: Multiple parameterization of a I/O address (Diagnostic address)
Zinfo1: I/O address
Zinfo2: Slot
Zinfo3: Data width
0xEA18 SBUS: Error at mapping of the master I/O devices
Zinfo2: Master slot
0xEA20 Error - RS485 interface is not set to PROFIBUS DP master but there is a
PROFIBUS DP master configured.
0xEA21 Error - Project engineering RS485 interface X2/X3:
PROFIBUS DP master is configured but missing
Zinfo2: Interface x
0xEA22 Error - RS485 interface X2 - value is out of range
Zinfo: Configured value X2
0xEA23 Error - RS485 interface X3 - value is out of range
Zinfo: Configured value X3
0xEA24 Error - Project engineering RS485 interface X2/X3:
Interface/Protocol is missing, the default settings are used.
Zinfo2: Configured value X2
Zinfo3: Configured value X3

0xEA50 Error - PROFINET configuration

Zinfo1: User slot of the PROFINET IO controller
Zinfo2: IO device number
Zinfo3: IO device slot
0xEA51 Error - there is no PROFINET IO controller at the configured slot
Zinfo2: Recognized ID at the configured slot
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-45

0xEA54 Error - PROFINET IO controller reports multiple configuration at one peripheral
addr.
Zinfo1: Peripheral address
Zinfo3: Data width
0xEA64 PROFINET configuration error:
Zinfo1: error word
Bit 0: too many IO devices
Bit 1: too many IO devices per ms
Bit 2: too many input bytes per ms
Bit 3: too many output bytes per ms
Bit 4: too many input bytes per device
Bit 5: too many output bytes per device
Bit 6: too many productive connections
Bit 7: too many input bytes in the process image
Bit 8: too many output bytes in the process image
Bit 9: Configuration not available
Bit 10: Configuration not valid
0xEA65 Communication error CPU - PROFINET-IO-Controller
Pk : CPU or PROFINET-IO-Controller
Zinfo1: Service ID, with which the error arose
Zinfo2: Command, with which the error arose
0xEA67 Error - PROFINET-IO-Controller - reading record set
Pk: Error type
0: DATA_RECORD_ERROR_LOCAL
1: DATA_RECORD_ERROR_STACK
2: DATA_RECORD_ERROR_REMOTE
OBNr: PROFINET-IO-Controller slot
DatId: Device no.
Zinfo2: Record set handle
Zinfo3: Internal error code for service purposes
0xEA68 Error - PROFINET-IO-Controller - writing record set
Pk: Error type
0: DATA_RECORD_ERROR_LOCAL
1: DATA_RECORD_ERROR_STACK
2: DATA_RECORD_ERROR_REMOTE
OBNr: PROFINET-IO-Controller slot
DatId: Device no.
Zinfo2: Record set handle
Zinfo3: Internal error code for service purposes
0xEA97 Storage error SBUS service channel

Zinfo3 = Slot
0xEA98 Timeout at waiting for reboot of a SBUS module (Server)
0xEA99 Error at file reading via SBUS
0xEE00 Additional information at UNDEF_OPCODE
0xEEEE CPU was completely overall reset, since after PowerON the start-up could not be
finished.
0xEFFF Internal error - Please contact the VIPA-Hotline!
4-46 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Using test functions for control and monitoring of variables
Overview For troubleshooting purposes and to display the status of certain variables
you can access certain test functions via the menu item Debug of the
Siemens SIMATIC Manager.
The status of the operands and the VKE can be displayed by means of the
test function Debug > Monitor.
You can modify and/or display the status of variables by means of the test
function PLC > Monitor/Modify Variables.
Debug > Monitor This test function displays the current status and the VKE of the different
operands while the program is being executed.
It is also possible to enter corrections to the program.
Note!
When using the test function “Monitor” the PLC must be in RUN mode!
The processing of the states may be interrupted by means of jump

commands or by timer and process-related alarms. At the breakpoint the
CPU stops collecting data for the status display and instead of the required
data it only provides the PG with data containing the value 0.
For this reason, jumps or time and process alarms can result in the value
displayed during program execution remaining at 0 for the items below:
• the result of the logical operation VKE

• Status / AKKU 1
• AKKU 2
• Condition byte
• absolute memory address SAZ. In this case SAZ is followed by a "?".
The interruption of the processing of statuses does not change the

execution of the program. It only shows that the data displayed is no
longer.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 4-47

PLC > This test function returns the condition of a selected operand (inputs,
Monitor/Modify outputs, flags, data word, counters or timers) at the end of program-
Variables execution.
This information is obtained from the process image of the selected
operands. During the "processing check" or in operating mode STOP the
periphery is read directly from the inputs. Otherwise only the process
image of the selected operands is displayed.
Control of outputs
It is possible to check the wiring and proper operation of output-modules.
You can set outputs to any desired status with or without a control
program. The process image is not modified but outputs are no longer
inhibited.
Control of variables
The following variables may be modified:
I, Q, M, T, C and D.
The process image of binary and digital operands is modified
independently of the operating mode of the CPU.
When the operating mode is RUN the program is executed with the
modified process variable. When the program continues they may,
however, be modified again without notification.
Process variables are controlled asynchronously to the execution sequence
of the program.
4-48 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Manual VIPA System 300S SPEED7 Chapter 5 Deployment RS485 for PtP communication
Chapter 5 Deployment PtP communication
Overview Content of this chapter is the deployment of the RS485 interface for serial
PtP communication.
Here you’ll find every information about the protocols, the activation and
project engineering of the interface, which are necessary for the serial
communication using the RS485 interface.
Content Topic Page

Chapter 5 Deployment PtP communication ................................... 5-1
Principle of the data transfer ................................................................ 5-3
Deployment of RS485 interface for PtP................................................ 5-4
Parameterization .................................................................................. 5-7
Communication .................................................................................. 5-10
Protocols and procedures .................................................................. 5-16
Modbus - Function codes ................................................................... 5-20
Modbus - Example communication..................................................... 5-24
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 5-1

Chapter 5 Deployment RS485 for PtP communication Manual VIPA System 300S SPEED7
Fast introduction
General Via a hardware configuration you may de-activate the PROFIBUS part
integrated to the SPEED7 CPU and thus release the RS485 interface for
PtP (point-to-point) communication.
The RS485 interface supports in PtP operation the serial process
connection to different source res. destination systems.
Protocols The protocols res. procedures ASCII, STX/ETX, 3964R, USS and Modbus
are supported.
Switch of RS485 Per default, every CPU uses the RS485 interface for PROFIBUS
for ptp operation communication. A hardware configuration allows you to switch the RS485
interface to point-to-point operation using Object properties and the
parameter "Function RS485".
Parameterization The parameterization of the serial interface happens during runtime using
the SFC 216 (SER_CFG). For this you have to store the parameters in a
DB for all protocols except ASCII.
Communication The SFCs are controlling the communication. Send takes place via
SFC 217 (SER_SND) and receive via SFC 218 (SER_RCV).
The repeated call of the SFC 217 SER_SND delivers a return value for
3964R, USS and Modbus via RetVal that contains, among other things,
recent information about the acknowledgement of the partner station.
The protocols USS and Modbus allow to evaluate the receipt telegram by
calling the SFC 218 SER_RCV after SER_SND.
The SFCs are included in the consignment of the CPU.
Overview SFCs The following SFCs are used for the serial communication:
for serial
communication
SFC Description
SFC 216 SER_CFG RS485 parameterize
SFC 217 SER_SND RS485 send
SFC 218 SER_RCV RS485 receive
5-2 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Principle of the data transfer
Overview The data transfer is handled during runtime by using SFCs. The principle of
data transfer is the same for all protocols and is shortly illustrated in the
following.
Principle Data, which are written into the according data channel by the PLC, is
stored in a FIFO send buffer (first in first out) with a size of 2x1024byte
and then put out via the interface.
When the interface receives data, this is stored in a FIFO receive buffer
with a size of 2x1024byte and can there be read by the PLC.
If the data is transferred via a protocol, the adoption of the data to the
according protocol happens automatically.
In opposite to ASCII and STX/ETX, the protocols 3964R, USS and Modbus
require the acknowledgement of the partner.
An additional call of the SFC 217 SER_SND causes a return value in
RetVal that includes among others recent information about the
acknowledgement of the partner.
Further on for USS and Modbus after a SER_SND the acknowledgement
telegram must be evaluated by call of the SFC 218 SER_RCV.
RS485 PtP communication

Program Protocol FIFO Buffer Interface
IN RS485
SER_RCV RECEIVE 1024Byte
SFC 218
1024Byte
SER_CFG
CFG
SFC 216 OUT
1024Byte
SER_SND
SFC 217 SEND 1024Byte
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 5-3

Deployment of RS485 interface for PtP
Switch to PtP Per default, the RS485 interface X3 of the CPU is used for the PROFIBUS
operation DP master. Via hardware configuration the RS485 interfaces may be
switched to point-to-point communication via the Parameter Function
RS485 X3 of the Properties.
For this a hardware configuration of the CPU is required, which is
described below.
Requirements Since the VIPA specific CPU parameters may be set, the installation of the
SPEEDBUS.GSD from VIPA in the hardware catalog is necessary.
The CPU may be configured in a PROFIBUS master system and the
appropriate parameters may be set after installation.
Installation of the The GSD (Geräte-Stamm-Datei) is online available in the following

SPEEDBUS.GSD language versions. Further language versions are available on inquires.
Name Language
SPEEDBUS.GSD german (default)
SPEEDBUS.GSG german
SPEEDBUS.GSE english
The GSD files may be found at www.vipa.com at the "Service" part.
The integration of the SPEEDBUS.GSD takes place with the following

proceeding:
• Browse to www.vipa.com.
• Click to Service > Download > GSD- and EDS-Files > PROFIBUS.
• Download the file Cx000023_Vxxx.
• Extract the file to your work directory. The SPEEDBUS.GSD is stored in
the directory VIPA_System_300S.
• Start the hardware configurator from Siemens.
• Close every project.
• Select Options > Install new GSD-file.
• Navigate to the directory VIPA_System_300S and select
SPEEDBUS.GSD.
The SPEED7 CPUs and modules of the System 300S from VIPA may now
be found in the hardware catalog at PROFIBUS-DP / Additional field
devices / I/O / VIPA_SPEEDBUS.
5-4 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Proceeding The embedding of the CPU 315-2AG12 happens by means of a virtual

PROFIBUS master system with the following approach:
Slot Module • Führen Sie eine Hardware-Konfiguration für die CPU

1 durch (siehe hierzu "Hardware-Konfiguration - CPU").
2 • Configure always as last module a Siemens DP master
X... CPU ... CP 342-5 (342-5DA02 V5.0). Connect and parameterize
it at operation mode "DP-Master".
• Connect the slave system "VIPA_SPEEDbus". After
3 installing the SPEEDBUS.GSD this may be found in the
hardware catalog at PROFIBUS-DP / Additional field
devices / I/O / VIPA / VIPA_SPEEDBUS.
... • For the slave system set the PROFIBUS address 100.
• Configure at slot 0 the VIPA CPU 315-2AG12 of the
hardware catalog from VIPA_SPEEDbus.
always as last module
342-5DA02 V5.0 • By double clicking the placed CPU 315-2AG12 the
properties dialog of the CPU may be opened.
virtual DP master for CPU

As soon as the project is transferred together with the PLC
user program to the CPU, the parameters will be taken after
start-up.
(100) VIPA
SPEEDbus
CPU:
Addr.:100
VIPA_SPEEDbus
Slot Order No.
0 315-2AG12 ...
Object properties
Note!
The hardware configuration, which is shown here, is only required, if you
want to customize the VIPA specific parameters.
Setting PtP • By double clicking the CPU 315-2AG12 placed in the slave system the
parameters properties dialog of the CPU may be opened.
• Switch the Parameter Function RS485 X3 to "PtP".
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 5-5

Properties RS485 • Logical states represented by voltage differences between the two cores
of a twisted pair cable
• Serial bus connection in two-wire technology using half duplex mode
• Data communications up to a max. distance of 500m
• Data communication rate up to 115.2kbaud
Connection 9polige SubD-Buchse

RS485 Pin RS485
1 n.c.
5 2 M24V
9
3 RxD/TxD-P (Line B)
4
8 4 RTS
3 5 M5V
7
6 P5V
2
6 7 P24V
1 8 RxD/TxD-N (Line A)
9 n.c.
Connection CPU - RS485 Periphery
3
RxD/TxD-P (B) RxD/TxD-P (B)
RxD/TxD-N (A) 8 RxD/TxD-N (A)
shield
Periphery
RxD/TxD-P (B)
RxD/TxD-N (A)
Periphery
RxD/TxD-P (B)
RxD/TxD-N (A)
5-6 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Parameterization
SFC 216 The parameterization happens during runtime deploying the SFC 216
(SER_CFG) (SER_CFG). You have to store the parameters for STX/ETX, 3964R, USS
and Modbus in a DB.
Name Declaration Type Comment

Protocol IN BYTE 1=ASCII, 2=STX/ETX, 3=3964R
Parameter IN ANY Pointer to protocol parameters
Baudrate IN BYTE Velocity of data transfer
CharLen IN BYTE 0=5bit, 1=6bit, 2=7bit, 3=8bit
Parity IN BYTE 0=None, 1=Odd, 2=Even
StopBits IN BYTE 1=1bit, 2=1.5bit, 3=2bit
FlowControl IN BYTE 1 (fix)
RetVal OUT WORD Error Code ( 0 = OK )
Parameter All time settings for timeouts must be set as hexadecimal value. Find the
description Hex value by multiply the wanted time in seconds with the baudrate.
Example: Wanted time 8ms at a baudrate of 19200baud

Calculation: 19200bit/s x 0.008s ≈ 154bit → (9Ah)
Hex value is 9Ah.
Protocol Here you fix the protocol to be used. You may choose between:
1: ASCII
2: STX/ETX
3: 3964R
4: USS Master
5: Modbus RTU Master
6: Modbus ASCII Master
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 5-7

Parameter (as DB) At ASCII protocol, this parameter is ignored.

At STX/ETX, 3964R, USS and Modbus you fix here a DB that contains the
communication parameters and has the following structure for the
according protocols:
Data block at STX/ETX

DBB0: STX1 BYTE (1. Start-ID in hexadecimal)
DBB1: STX2 BYTE (2. Start-ID in hexadecimal)
DBB2: ETX1 BYTE (1. End-ID in hexadecimal)
DBB3: ETX2 BYTE (2. End-ID in hexadecimal)
DBW4: TIMEOUT WORD (max. delay time between 2 telegrams)
Note!
The start res. end sign should always be a value <20, otherwise the sign is
ignored!
Data block at 3964R

DBB0: Prio BYTE
(The priority of both partners must be
different)
DBB1: ConnAttmptNr BYTE (Number of connection trials)
DBB2: SendAttmptNr BYTE (Number of telegram retries)
DBW4: CharTimeout WORD (Character delay time)
DBW6: ConfTimeout WORD (Acknowledgement delay time)
Data block at USS

DBW0: Timeout WORD (Delay time in)
Data block at Modbus-Master

DBW0: Timeout WORD (Respond delay time)
Baud rate Velocity of data transfer in bit/s (baud).

04h: 1200baud 05h: 1800baud 06h: 2400baud 07h: 4800baud
08h: 7200baud 09h: 9600baud 0Ah: 14400baud 0Bh: 19200baud
0Ch: 38400baud 0Dh: 57600baud 0Eh: 115200baud
CharLen Number of data bits where a character is mapped to.

0: 5bit 1: 6bit 2: 7bit 3: 8bit
5-8 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Parity The parity is -depending on the value- even or odd. For parity control, the
information bits are extended with the parity bit that amends via its value
("0" or "1") the value of all bits to a defined status. If no parity is set, the
parity bit is set to "1", but not evaluated.
0: NONE 1: ODD 2: EVEN
StopBits The stop bits are set at the end of each transferred character and mark the
end of a character.
1: 1bit 2: 1.5bit 3: 2bit
FlowControl The parameter FlowControl is ignored. When sending RTS=1, when

receiving RTS=0.
RetVal SFC 216 Return values sent by the block:

(Error message
SER_CFG) Error code Description
0000h no error
809Ah Interface is not available or
interface is used for PROFIBUS
8x24h Error at SFC-Parameter x, with x:
1: Error at "Protocol"
2: Error at "Parameter"
3: Error at "Baudrate"
4: Error at "CharLength"
5: Error at "Parity"
6: Error at "StopBits"
7: Error at "FlowControl"
809xh Error in SFC parameter value x, where x:
1: Error at "Protocol"
3: Error at "Baudrate"
4: Error at "CharLength"
5: Error at "Parity"
6: Error at "StopBits"
7: Error at "FlowControl"
8092h Access error in parameter DB (DB too short)
828xh Error in parameter x of DB parameter, where x:
1: Error 1. parameter
2: Error 2. parameter
...
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 5-9

Communication
Overview The communication happens via the send and receive blocks SFC 217
(SER_SND) and SFC 218 (SER_RCV).
The SFCs are included in the consignment of the CPU.
SFC 217 This block sends data via the serial interface.
(SER_SND) The repeated call of the SFC 217 SER_SND delivers a return value for
3964R, USS and Modbus via RetVal that contains, among other things,
recent information about the acknowledgement of the partner station.
The protocols USS and Modbus require to evaluate the receipt telegram by
calling the SFC 218 SER_RCV after SER_SND.
Parameter
DataPtr IN ANY Pointer to Data Buffer for sending data
DataLen OUT WORD Length of data sent
DataPtr Here you define a range of the type Pointer for the send buffer where the
data that has to be sent is stored. You have to set type, start and length.
Example: Data is stored in DB5 starting at 0.0 with a length of
124byte.
DataPtr:=P#DB5.DBX0.0 BYTE 124
DataLen Word where the number of the sent bytes is stored.

At ASCII if data were sent by means of SFC 217 faster to the serial
interface than the interface sends, the length of data to send could differ
from the DataLen due to a buffer overflow. This should be considered by
the user program.
With STX/ETX, 3964R, Modbus and USS always the length set in DataPtr
is stored or 0.
5-10 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

RetVal SFC 217 Return values of the block:

(Error message
SER_SND) Error code Description
0000h Send data - ready
1000h Nothing sent (data length 0)
20xxh Protocol executed error free with xx bit pattern for
diagnosis
7001h Data is stored in internal buffer - active (busy)
7002h Transfer - active
80xxh Protocol executed with errors with xx bit pattern for
diagnosis (no acknowledgement by partner)
90xxh Protocol not executed with xx bit pattern for diagnosis (no
acknowledgement by partner)
8x24h Error in SFC parameter x, where x:
1: Error in "DataPtr"
2: Error in "DataLen"
8122h Error in parameter "DataPtr" (e.g. DB too short)
807Fh Internal error
809Ah Interface not found or interface is used for PROFIBUS
809Bh Interface not configured
Protocol specific ASCII

RetVal values Value Description
9000h Buffer overflow (no data send)
9002h Data too short (0byte)
STX/ETX
Value Description
9001h Data too long (>1024byte)
9004h Character not allowed
3964R
Value Description
2000h Send ready without error
80FFh NAK received - error in communication
80FEh Data transfer without acknowledgement of partner or error
at acknowledgement
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 5-11

... Continue USS

RetVal SFC 217 Error code Description
SER_SND
8080h Receive buffer overflow (no space for receipt)
8090h Acknowledgement delay time exceeded
80F0h Wrong checksum in respond
80FEh Wrong start sign in respond
80FFh Wrong slave address in respond
9002h Data too short (<2byte)
Modbus RTU/ASCII Master

Error code Description
2001h Send ready with error
8080h Receive buffer overflow (no space for receipt)
8090h Acknowledgement delay time exceeded
80F0h Wrong checksum in respond
80FDh Length of respond too long
80FEh Wrong function code in respond
80FFh Wrong slave address in respond
9002h Data too short (<2byte)
5-12 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Principles of The following text shortly illustrates the structure of programming a send
programming command for the different protocols.
3964R USS / Modbus
SFC 217 SFC 217

SER_SND SER_SND
Busy ? J Busy ? J
N N
RetVal 8xxxh / RetVal 8xxxh / SFC 218

J J
90xxh ? 90xxh ? SER_RCV
N N
Error evaluation Error evaluation
RetVal 2001h ? J RetVal 2001h ? J

End End
N N
SFC 218
RetVal 2000h ? J RetVal 2000h ? J
SER_RCV
N N
Data evaluation Data evaluation
End End
ASCII / STX/ETX
SFC 217
SER_SND
RetVal 900xh J
Error evaluation
N
End
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 5-13

SFC 218 This block receives data via the serial interface.
(SER_RCV) Using the SFC 218 SER_RCV after SER_SND with the protocols USS and
Modbus the acknowledgement telegram can be read.
Parameter
DataPtr IN ANY Pointer to Data Buffer for received data
DataLen OUT WORD Length of received data
Error OUT WORD Error Number
DataPtr Here you set a range of the type Pointer for the receive buffer where the
reception data is stored. You have to set type, start and length.
Example: Data is stored in DB5 starting at 0.0 with a length of 124byte.
DataPtr:=P#DB5.DBX0.0 BYTE 124
DataLen Word where the number of received Bytes is stored.

At STX/ETX and 3964R, the length of the received user data or 0 is
entered.
At ASCII, the number of read characters is entered. This value may be
different from the read telegram length.
Error This word gets an entry in case of an error. The following error messages
may be created depending on the protocol:
ASCII
Bit Error Description
0 overrun Overflow, a sign couldn’t be read fast enough from the
interface
1 framing error Error that shows that a defined bit frame is not
coincident, exceeds the allowed length or contains an
additional Bit sequence (Stopbit error)
2 parity Parity error
3 overflow Buffer is full
STX/ETX
0 overflow The received telegram exceeds the size of the receive
buffer.
1 char A sign outside the range 20h...7Fh has been received.
3 overflow Buffer is full
3964R / Modbus RTU/ASCII Master

0 overflow The received telegram exceeds the size of the receive
buffer.
5-14 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

RetVal SFC 218 Return values of the block:

(Error message
SER_RCV) Error code Description
0000h no error
1000h Receive buffer too small (data loss)
8x24h Error at SFC-Parameter x, with x:
1: Error at "DataPtr"
2: Error at "DataLen"
3: Error at "Error"
8122h Error in parameter "DataPtr" (e.g. DB too short)
809Ah Serial interface not found res. interface is used by
PROFIBUS
809Bh Serial interface not configured
Principles of The following picture shows the basic structure for programming a receive
programming command. This structure can be used for all protocols.
SFC 218
SER_RCV
RetVal 0000h ? J
N Data evaluation
End
RetVal 8xxxh ? J
N
Error evaluation
End
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 5-15

Protocols and procedures
Overview The CPU supports the following protocols and procedures:

• ASCII communication
• STX/ETX
• 3964R
• USS
• Modbus
ASCII ASCII data communication is one of the simple forms of data exchange.
Incoming characters are transferred 1 to 1.
At ASCII, with every cycle the read-SFC is used to store the data that is in
the buffer at request time in a parameterized receive data block. If a
telegram is spread over various cycles, the data is overwritten. There is no
reception acknowledgement. The communication procedure has to be
controlled by the concerning user application. An according Receive_ASCII
FB may be found within the VIPA library in the service area of www.vipa.com.
STX/ETX STX/ETX is a simple protocol with start and end ID, where STX stands for
Start of Text and ETX for End of Text.
The STX/ETX procedure is suitable for the transfer of ASCII characters. It
does not use block checks (BCC). Any data transferred from the periphery
must be preceded by a Start followed by the data characters and the end
character.
Depending of the byte width the following ASCII characters can be
transferred: 5Bit: not allowed: 6Bit: 20...3Fh, 7Bit: 20...7Fh, 8Bit: 20...FFh.
The effective data, which includes all the characters between Start and End
are transferred to the PLC when the End has been received.
When data is send from the PLC to a peripheral device, any user data is
handed to the SFC 217 (SER_SND) and is transferred with added Start-
and End-ID to the communication partner.
Message structure:
STX1 STX2 Z1 Z2 Zn ETX1 ETX2
ZVZ
You may define up to 2 Start- and End-IDs.

You may work with 1, 2 or no Start- and with 1, 2 or no End-ID. As Start-
res. End-ID all Hex values from 01h to 1Fh are permissible. Characters
above 1Fh are ignored. In the user data, characters below 20h are not
allowed and may cause errors. The number of Start- and End-IDs may be
different (1 Start, 2 End res. 2 Start, 1 End or other combinations). For not
used start and end characters you have to enter FFh in the hardware
configuration. If no End-ID is defined, all read characters are transferred to
the PLC after a parameterizable character delay time (Timeout).
5-16 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

3964R The 3964R procedure controls the data transfer of a point-to-point link
between the CPU and a communication partner. The procedure adds
control characters to the message data during data transfer. These control
characters may be used by the communication partner to verify the
complete and error free receipt.
The procedure employs the following control characters:
• STX Start of Text

• DLE Data Link Escape
• ETX End of Text
• BCC Block Check Character
• NAK Negative Acknowledge
Procedure Active partner Passive partner
STX
Monitor delayed acknowledgment
DLE
Message-data
DLE
ETX
BCC
Monitor delayed acknowledgment
DLE
You may transfer a maximum of 255byte per message.
Note!
When a DLE is transferred as part of the information it is repeated to
distinguish between data characters and DLE control characters that are
used to establish and to terminate the connection (DLE duplication). The
DLE duplication is reversed in the receiving station.
The 3964R procedure requires that a lower priority is assigned to the
communication partner. When communication partners issue simultaneous
send commands, the station with the lower priority will delay its send
command.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 5-17

USS The USS protocol (Universelle serielle Schnittstelle = universal serial

interface) is a serial transfer protocol defined by Siemens for the drive and
system components. This allows to build-up a serial bus connection
between a superordinated master and several slave systems.
The USS protocol enables a time cyclic telegram traffic by presetting a fix
telegram length.
The following features characterize the USS protocol:
• Multi point connection

• Master-Slave access procedure
• Single-Master-System
• Max. 32 participants
• Simple and secure telegram frame
You may connect 1 master and max. 31 slaves at the bus where the single
slaves are addressed by the master via an address sign in the telegram.
The communication happens exclusively in half-duplex operation.
After a send command, the acknowledgement telegram must be read by a
call of the SFC 218 SER_RCV.
The telegrams for send and receive have the following structure:
Master-Slave telegram
STX LGE ADR PKE IND PWE STW HSW BCC
02h H L H L H L H L H L
Slave-Master telegram
STX LGE ADR PKE IND PWE ZSW HIW BCC
02h H L H L H L H L H L
where STX: Start sign STW: Control word

LGE: Telegram length ZSW: State word
ADR: Address HSW: Main set value
PKE: Parameter ID HIW: Main effective value
IND: Index BCC: Block Check Character
PWE: Parameter value
Broadcast with set bit 5 A request can be directed to a certain slave ore be send to all slaves as
in ADR-Byte broadcast message. For the identification of a broadcast message you
7 6 5 4 3 2 1 0 have to set bit 5 to 1 in the ADR-Byte. Here the slave addr. (bit 0 ... 4) is
1 ignored. In opposite to a "normal" send command, the broadcast does not
require a telegram evaluation via SFC 218 SER_RCV. Only write
Broadcast commands may be sent as broadcast.
5-18 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Modbus The Modbus protocol is a communication protocol that fixes a hierarchic

structure with one master and several slaves.
Physically, Modbus works with a serial half-duplex connection.
There are no bus conflicts occurring, because the master can only
communicate with one slave at a time. After a request from the master, this
waits for a preset delay time for an answer of the slave. During the delay
time, communication with other slaves is not possible.
After a send command, the acknowledgement telegram must be read by a
call of the SFC 218 SER_RCV.
The request telegrams send by the master and the respond telegrams of a
slave have the following structure:
Start Slave Function Data Flow End

sign address Code control sign
Broadcast with A request can be directed to a special slave or at all slaves as broadcast
slave address = 0 message. To mark a broadcast message, the slave address 0 is used.
In opposite to a "normal" send command, the broadcast does not require a
telegram evaluation via SFC 218 SER_RCV.
Only write commands may be sent as broadcast.
ASCII, RTU mode Modbus offers 2 different transfer modes:

• ASCII mode: Every byte is transferred in the 2 sign ASCII code. The
data are marked with a start and an end sign. This causes a transparent
but slow transfer.
• RTU mode: Every byte is transferred as one character. This enables a
higher data pass through as the ASCII mode. Instead of start and end
sign, a time control is used.
The mode selection happens during runtime by using the SFC 216 SER_CFG.
Supported Modbus The following Modbus Protocols are supported by the RS485 interface
protocols • Modbus RTU Master
• Modbus ASCII Master
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 5-19

Modbus - Function codes
Naming Modbus has some naming conventions:

convention
Bit = IN: "Input Status"
Coil OUT: "Coil Status"
Word = IN: "Input Register"

Register OUT: "Holding Register"
• Modbus differentiates between bit and word access;

Bits = "Coils" and Words = "Register".
• Bit inputs are referred to as "Input-Status" and Bit outputs as "Coil-
Status".
• Word inputs are referred to as "Input-Register" and Word outputs as
"Holding-Register".
Range definitions Normally the access at Modbus happens by means of the ranges 0x, 1x, 3x
and 4x.
0x and 1x gives you access to digital Bit areas and 3x and 4x to analog
word areas.
For the CPs from VIPA is not differentiating digital and analog data, the
following assignment is valid:
0x: Bit area for master output data

Access via function code 01h, 05h, 0Fh
1x: Bit area for master input data
Access via function code 02h
3x: Word area for master input data
Access via function code 04h
4x: Word area for master output data
Access via function code 03h, 06h, 10h
1x0001
1x0002 1x0022
1x0003
IN
3x0001 3x0002 3x0003
0x0001
0x0002 0x0022
0x0003
OUT
4x0001 4x0002 4x0003
A description of the function codes follows below.
5-20 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Overview With the following Modbus function codes a Modbus master can access a
Modbus slave: With the following Modbus function codes a Modbus master
can access a Modbus slave. The description always takes place from the
point of view of the master:
Code Command Description

01h Read n Bits Read n Bits of master output area 0x
02h Read n Bits Read n Bits of master input area 1x
03h Read n Words Read n Words of master output area 4x
04h Read n Words Read n Words master input area 3x
05h Write 1 Bit Write 1 Bit to master output area 0x
06h Write 1 Word Write 1 Word to master output area 4x
0Fh Write n Bits Write n Bits to master output area 0x
10h Write n Words Write n Words to master output area 4x
Point of View of The description always takes place from the point of view of the master.
"Input" and Here data, which were sent from master to slave, up to their target are
"Output" data designated as "output" data (OUT) and contrary slave data received by the
master were designated as "input" data (IN).
System 200V - Slave Periphery

PtP CPU
System 300S - Master
CPU PtP OUT
write (05h,0F:bit, 06h10h:word)
0x(bit) RECEIVE FC1 OUT OUT
OUT read (01h:bit, 03h:word) 4x(word)
IN
IN read (02h:bit, 04h:word) 1x(bit) SEND FC0 IN IN

3x(wort)
Respond of the If the slave announces an error, the function code is send back with an
slave "ORed" 80h. Without an error, the function code is sent back.
Slave answer: Function code OR 80h → Error
Function code → OK
Byte sequence For the Byte sequence in a Word is always valid: 1 Word
in a Word High Low
Byte Byte
Check sum CRC, The shown check sums CRC at RTU and LRC at ASCII mode are
RTU, LRC automatically added to every telegram. They are not shown in the data
block.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 5-21

Read n Bits Code 01h: Read n Bits of master output area 0x

01h, 02h Code 02h: Read n Bits of master input area 1x
Command telegram
Slave address Function code Address Number of Check sum
1. Bit Bits CRC/LRC
1Byte 1Byte 1Word 1Word 1Word
Respond telegram
Slave address Function code Number of Data Data Check sum
read Bytes 1. Byte 2. Byte ... CRC/LRC
1Byte 1Byte 1Byte 1Byte 1Byte 1Word
max. 250Byte
Read n Words 03h: Read n Words of master output area 4x

03h, 04h 04h: Read n Words master input area 3x
Command telegram
Slave address Function code Address Number of Check sum
1. Bit Words CRC/LRC
Respond telegram
Slave address Function code Number of Data Data Check sum
read Bytes 1. Word 2. Word ... CRC/LRC
1Byte 1Byte 1Byte 1Word 1Word 1Word
max. 125 Words
Write 1 Bit Code 05h: Write 1 Bit to master output area 0x

05h A status change is via "Status Bit" with following values:
"Status Bit" = 0000h → Bit = 0

"Status Bit" = FF00h → Bit = 1
Command telegram
Slave address Function Address Status Check sum
code Bit Bit CRC/LRC
Respond telegram
Slave address Function Address Status Check sum
code Bit Bit CRC/LRC
5-22 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Write 1 Word Code 06h: Write 1 Word to master output area 4x

06h
Command telegram
Slave address Function Address Value Check sum
code word word CRC/LRC
Respond telegram
Slave address Function Address Value Check sum
code word word CRC/LRC
Write n Bits 0Fh Code 0Fh: Write n Bits to master output area 0x
Please regard that the number of Bits has additionally to be set in Byte.
Command telegram
Slave address Function Address Number of Number of Data Data Check sum
code 1. Bit Bits Bytes 1. Byte 2. Byte ... CRC/LRC
1Byte 1Byte 1Word 1Word 1Byte 1Byte 1Byte 1Byte 1Word
max. 250 Byte
Respond telegram
Slave address Function Address Number of Check sum
code 1. Bit Bits CRC/LRC
Write n Words 10h Code 10h: Write n Words to master output area 4x
Command telegram
Slave address Function Address Number of Number of Data Data Check sum
code 1. Word words Bytes 1. Word 2. Word ... CRC/LRC
1Byte 1Byte 1Word 1Word 1Byte 1Word 1Word 1Word 1Word
max. 125 Words
Respond telegram
Slave address Function Address Number of Check sum
code 1. Word Words CRC/LRC
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 5-23

Modbus - Example communication
Overview The example establishes a communication between a master and a slave

via Modbus. The following combination options are shown:
Modbus master (M) Modbus slave (S)

CPU 31xS CPU 21xSER-1
Components The following components are required for this example:

• CPU 31xS as Modbus RTU master
• CPU 21xSER-1 as Modbus RTU slave
• Siemens SIMATIC Manager and possibilities for the project transfer
• Modbus cable connection
Approach • Assemble a Modbus system consisting of a CPU 31xS as Modbus

master and a CPU 21xSER-1 as Modbus slave and Modbus cable.
• Execute the project engineering of the master!
For this you create a PLC user application with the following structure:
OB 100: Call SFC 216 (configuration as Modbus RTU master) with
timeout setting and error evaluation.
OB 1: Call SFC 217 (SER_SND) where the data is send with error
evaluation. Here you have to build up the telegram according
to the Modbus rules.
Call SFC 218 (SER_RECV) where the data is received with
error evaluation.
• Execute the project engineering of the slave!
The PLC user application at the slave has the following structure:
OB 100: Call SFC 216 (configuration as Modbus RTU slave) with
timeout setting and Modbus address in the DB and error
evaluation.
OB 1: Call SFC 217 (SER_SND) for data transport from the slave
CPU to the output buffer.
Call SFC 218 (SER_RECV) for the data transport from the
input buffer to the CPU. Allow an according error evaluation
for both directions.
The following page shows the structure for the according PLC programs for
master and slave.
5-24 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Master Slave
CPU 31xS CPU 21xSER-1

CPU Master Slave CPU
code/data
SER_SND
SER_RCV
SER_RCV
RetVal
RetVal
code
SER_SND
SER_SND
SER_RCV
data
RetVal
OB100:
Start Start
SFC 216 SFC 216

SER_CFG SER_CFG
(DB: Timeout) (DB: Timeout, slave address)
RetVal 8xxxh ? J Error evaluation RetVal 8xxxh ? J Error evaluation
N
N
OB1:
SFC 217
SER_SND
(mit Slave-Nr., Code,
Bereich) SFC 217
SER_SND
RetVal 700xh? J
RetVal 9001h ? J Error evaluation

N
RetVal 8xxxh /
J Error evaluation
90xxh ?
RetVal 0000h ? J
N
RetVal 2001h ? J
N
SFC 218
SER_RCV
RetVal 2000h ? J SFC 218

SER_RCV
RetVal 0000h ? J Data evaluation
N N
RetVal 0000h ? J
N
RetVal 8xxxh ? J Error evaluation
SER_SND Data evaluation
N
RetVal 2001h ?
N
J
RetVal 8xxxh ? J Error evaluation
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 5-25

5-26 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Manual VIPA System 300S SPEED7 Chapter 6 Deployment PROFIBUS communication
Chapter 6 Deployment PROFIBUS communication
Overview Content of this chapter is the deployment of the CPU 315-2AG12 with
PROFIBUS. After a short overview the project engineering and parameteri-
zation of a CPU 315-2AG12 with integrated PROFIBUS-Part from VIPA is
shown.
Further you get information about usage as DP master and DP slave of the
PROFIBUS part.
The chapter is ending with notes to commissioning and start-up behavior.
Content Topic Page

Chapter 6 Deployment PROFIBUS communication ....................... 6-1
Overview .............................................................................................. 6-2
Deployment as PROFIBUS DP master ................................................ 6-5
Deployment as PROFIBUS DP slave ................................................... 6-6
PROFIBUS installation guidelines ........................................................ 6-8
Commissioning and Start-up behavior................................................ 6-11
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 6-1

Chapter 6 Deployment PROFIBUS communication Manual VIPA System 300S SPEED7
Overview
PROFIBUS DP PROFIBUS is an international standard applicable to an open and serial

field bus for building, manufacturing and process automation that can be
used to create a low (sensor-/actuator level) or medium (process level)
performance network of programmable logic controllers.
PROFIBUS comprises an assortment of compatible versions. The following
details refer to PROFIBUS DP.
PROFIBUS DP is a special protocol intended mainly for automation tasks
in a manufacturing environment. DP is very fast, offers Plug'n'Play facilities
and provides a cost-effective alternative to parallel cabling between PLC
and remote I/O. PROFIBUS DP was designed for high-speed data commu-
nication on the sensor-actuator level.
The data transfer referred to as "Data Exchange" is cyclical. During one
bus cycle, the master reads input values from the slaves and writes output
information to the slaves.
CPU with The PROFIBUS DP master is to be configured in the hardware configurator

DP master from Siemens. Therefore the configuration happens by the sub module X1
(MPI/DP) of the Siemens CPU.
After the transmission of the data to the CPU, the configuration data are
internally passed on to the PROFIBUS master part.
During the start-up the DP master automatically includes his data areas
into the address range of the CPU. Project engineering in the CPU is not
required.
Deployment of the Via the PROFIBUS DP master PROFIBUS DP slaves may be coupled to
DP-Master with the CPU. The DP master communicates with the DP slaves and links up its
CPU data areas with the address area of the CPU.
At every POWER ON res. overall reset the CPU fetches the I/O mapping
data from the master. At DP slave failure, the ER-LED is on and the OB 86
is requested. If this is not available, the CPU switches to STOP and BASP
is set. As soon as the BASP signal comes from the CPU, the DP master is
setting the outputs of the connected periphery to zero. The DP master
remains in the operating mode RUN independent from the CPU.
DP slave operation For the deployment in a super-ordinated master system you first have to
project your slave system as Siemens CPU in slave operation mode with
configured in-/output areas. Afterwards you configure your master system.
Couple your slave system to your master system by dragging the CPU 31x
from the hardware catalog at Configured stations onto the master system,
choose your slave system and connect it.
6-2 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Fast introduction
Overview The PROFIBUS DP master is to be configured in the hardware

configurator. Here the configuration happens by means of the sub module
X2 (DP) of the Siemens CPU.
Steps of For the configuration of the PROFIBUS DP master please follow the
configuration following approach:
• Hardware configuration - CPU

• Deployment as DP master or Deployment as DP slave
• Transfer of the complete project to CPU
Information about transferring a project may be found at chapter
"Deployment CPU ..." at "Project transfer".
Note
To be compatible to the Siemens SIMATIC manager, the CPU 315-2AG12 from VIPA is
to be configured as
CPU 318-2 (318-2AJ00-0AB00 V3.0)
The integrated PROFIBUS DP master (X3) is to be configured and connected via the
sub module X2 (DP).
The Ethernet PG/OP channel of the CPU 315-2AG12 is always to be configured as 1.
module after the really plugged modules at the standard bus as CP343-1 (343-1EX11)
from Siemens.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 6-3

Hardware configuration - CPU
Requirements The hardware configuration of the VIPA CPU takes place at the Siemens
hardware configurator.
The hardware configurator is a part of the Siemens SIMATIC Manager. It
serves the project engineering. The modules, which may be configured
here are listed in the hardware catalog. If necessary you have to update
the hardware catalog with Options > Update Catalog.
For project engineering a thorough knowledge of the Siemens SIMATIC
manager and the Siemens hardware configurator are required!
Note!
Please consider that this SPEED7-CPU has 4 ACCUs. After an arithmetic
operation (+I, -I, *I, /I, +D, -D, *D, /D, MOD, +R, -R, *R, /R) the content of
ACCU 3 and ACCU 4 is loaded into ACCU 3 and 2.
This may cause conflicts in applications that presume an unmodified
ACCU2.
For more information may be found in the manual "VIPA Operation list
SPEED7" at "Differences between SPEED7 and 300V programming".
Proceeding To be compatible with the Siemens SIMATIC manager the following steps
should be executed:
• Start the Siemens hardware configurator with a new project.

Slot Module • Insert a profile rail from the hardware catalog.
1
2 CPU 318-2 • Place at slot 2 the following CPU from Siemens:
X2 DP CPU 318-2 (6ES7 318-2AJ00-0AB0/V3.0).
X1 MPI/DP
3 • The integrated PROFIBUS DP master (X3) is to be configured and
connected via the sub module X2 (DP).
6-4 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Deployment as PROFIBUS DP master
Precondition • The hardware configuration described before was established.
Proceeding • Open the properties dialog of the DP interface of the CPU by means of
a double-click at DP.
• Set Interface type to "PROFIBUS"
• Connect to PROFIBUS and preset an address (preferably 2) and
confirm with [OK].
• Switch at Operating mode to "DP master" and confirm the dialog with
[OK]. A PROFIBUS DP master system is inserted.
Slot Module
1
2 CPU ... PROFIBUS DP master system
X2 DP
X1 MPI/DP
3
Now the project engineering of your PROFIBUS DP master is finished.

Please link up now your DP slaves with periphery to your DP master.
• For the project engineering of PROFIBUS DP slaves you search the
concerning PROFIBUS DP slave in the hardware catalog and
drag&drop it in the subnet of your master.
• Assign a valid PROFIBUS address to the DP slave.
• Link up the modules of your DP slave system in the plugged sequence
and add the addresses that should be used by the modules.
• If needed, parameterize the modules.
• Save, compile and transfer your project. More detailed information about
project transfer may be found at chapter "Deployment CPU ...".
Slot Module
1
2 CPU ... PROFIBUS DP master system
X2 DP
X1 MPI/DP
3
Slot Module Order number

1 ...
2 Module
3 ...
4
5
...
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 6-5

Deployment as PROFIBUS DP slave
Fast introduction In the following the deployment of the PROFIBUS section as "intelligent"
DP slave on master system is described, which exclusively may be
configured in the Siemens SIMATIC manager.
The following steps are required:
• Configure a station with a CPU with operating mode DP slave.
• Connect to PROFIBUS and configure the in-/output area for the slave
section.
• Save and compile your project.
• Configure another station with another CPU with operating mode DP
master.
• Connect to PROFIBUS and configure the in-/output ranges for the
master section
• Save, compile and transfer your project to your CPU.
Project • Start the Siemens SIMATIC manager and configure a CPU as described
engineering of the at "Hardware configuration - CPU".
slave section • Designate the station as "...DP slave"
• Add your modules according to the real hardware assembly.
• Open the properties dialog of the DP interface of the CPU by means of
• Set Interface type to "PROFIBUS"
confirm with [OK].
• Switch at Operating mode to "DP slave"
• Via Configuration you define the in-/output address area of the slave
CPU, which are to be assigned to the DP slave.
Slave section
Standard bus Object properties

Slot Module
Operating mode: DP slave
1
Connect: PROFIBUS
2 CPU ...
DP PROFIBUS address: > 1
X2
X1 MPI/DP
3 Configuration:
4 ... Input area
5 Modules Output area
...
6
6-6 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Project • Insert another station and configure a CPU.

engineering of the • Designate the station as "...DP master".
master section
• Add your modules according to the real hardware assembly.
• Open the properties dialog of the DP interface of the CPU by means of
• Set Interface: type to "PROFIBUS".
confirm with [OK].
• Switch at Operating mode to "DP master" and confirm the dialog with
[OK].
• Connect your slave system to this master system by dragging the
"CPU 31x" from the hardware catalog at Configured stations onto the
master system and select your slave system to be coupled.
• Open the Configuration at Object properties of your slave system.
• Via double click to the according configuration line you assign the
according input address area on the master CPU to the slave output
data and the output address area to the slave input data.
Master section
Standard bus
Slot Module
1
2 CPU ...
DP master system
X2 DP
X1 MPI/DP
3 ... 2
Modules S7-300
1 ... Hardware catalog: CPU 31x
from configured stations
3
Object properties Object properties
Operating mode: DP master Configuration:
Connect: PROFIBUS Input area slave CPU = Output area master-CPU
PROFIBUS address: > 1 Output area slave CPU = Input area Master-CPU
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 6-7

PROFIBUS installation guidelines
PROFIBUS in • A PROFIBUS DP network may only be built up in linear structure.

general • PROFIBUS DP consists of minimum one segment with at least one
master and one slave.
• A master has always been deployed together with a CPU.
• PROFIBUS supports max. 126 participants.
• Per segment a max. of 32 participants is permitted.
• The max. segment length depends on the baud rate:
9.6 ... 187.5kbaud → 1000m
500kbaud → 400m
1.5Mbaud → 200m
3 ... 12Mbaud → 100m
• Max. 10 segments may be built up. The segments are connected via
repeaters. Every repeater counts for one participant.
• The bus respectively a segment is to be terminated at both ends.
• All participants are communicating with the same baud rate. The slaves
adjust themselves automatically on the baud rate.
Transfer medium As transfer medium PROFIBUS uses an isolated twisted-pair cable based
upon the RS485 interface.
The RS485 interface is working with voltage differences. Though it is less
irritable from influences than a voltage or a current interface. You are able
to configure the network as well linear as in a tree structure.
Max. 32 participants per segment are permitted. Within a segment the
members are linear connected. The segments are connected via
repeaters. The maximum segment length depends on the transfer rate.
PROFIBUS DP uses a transfer rate between 9.6kbaud and 12Mbaud, the
slaves are following automatically. All participants are communicating with
the same transfer rate.
The bus structure under RS485 allows an easy connection res.
disconnection of stations as well as starting the system step by step. Later
expansions don’t have any influence on stations that are already
integrated. The system realizes automatically if one partner had a fail down
or is new in the network.
6-8 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Bus connection The following picture illustrates the terminating resistors of the respective
start and end station.
Master Slave Slave
6 6
P5V P5V
330 330
RxD/TxD-P(B) 3 3 RxD/TxD-P(B) 3 3 RxD/TxD-P(B)
220 220
RxD/TxD-N(A) 8 8 RxD/TxD-N(A) 8 8 RxD/TxD-N(A)
330 330
5 5
M5V M5V
Shield Shield Shield
Note!
The PROFIBUS line has to be terminated with its ripple resistor. Please
make sure to terminate the last participants on the bus at both ends by
activating the terminating resistor.
EasyConn In PROFIBUS all participants are wired parallel. For that purpose, the bus
bus connector cable must be feed-through.
Via the order number VIPA 972-0DP10 you may order the bus connector
"EasyConn". This is a bus connector with switchable terminating resistor
and integrated bus diagnostic.
0° 45° 90°
A A A
B B B C
0° 45° 90°
A 64 61 66
B 34 53 40
C 15.8 15.8 15.8
all in mm
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 6-9

Note!
To connect this EasyConn plug, please use the standard PROFIBUS cable
type A (EN50170). Starting with release 5 you also can use highly flexible
bus cable: Lapp Kabel order no.: 2170222, 2170822, 2170322.
With the order no. 905-6AA00 VIPA offers the "EasyStrip" de-isolating tool
that makes the connection of the EasyConn much easier.
11 6
Dimensions in mm
Termination with The "EasyConn" bus connector is provided with a switch that is used to
"EasyConn" activate a terminating resistor.
Wiring
1./last further Attention!
bus participant participants The terminating resistor is only
effective, if the connector is installed at
a bus participant and the bus participant
is connected to a power supply.
Note!
A complete description of installation
and deployment of the terminating
resistors is delivered with the connector.
Assembly • Loosen the screw.

• Lift contact-cover.
• Insert both wires into the ducts
provided (watch for the correct
line color as below!)
• Please take care not to cause a
short circuit between screen and
data lines!
• Close the contact cover.
• Tighten screw
(max. tightening torque 4Nm).
Please note: The green line must be connected to A, the red line to B!
6-10 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Commissioning and Start-up behavior
Start-up on In delivery the CPU is overall reset. The PROFIBUS part is deactivated and
delivery its LEDs are off after Power ON.
Online with bus The DP master can be served with bus parameters by means of a
parameter without hardware configuration. As soon as these are transferred the DP master
slave project goes online with his bus parameter. This is shown by the RUN LED. Now
the DP master can be contacted via PROFIBUS by means of his
PROFIBUS address. In this state the CPU can be accessed via
PROFIBUS to get configuration and DP slave project.
Slave If the master has received valid configuration data, he switches to Data
configuration Exchange with the DP Slaves. This is indicated by the DE-LED.
CPU state controls After PowerON respectively a receipt of a new hardware configuration the
DP master configuration data and bus parameter were transferred to the DP master.
Dependent on the CPU state the following behavior is shown by the DP
master:
Master behavior at • The global control command "Clear" is sent to the slaves by the master.
CPU STOP Here the DE-LED is blinking.
• DP slaves with fail safe mode were provided with output telegram length
"0".
• DP slaves without fail safe mode were provided with the whole output
telegram but with output data = 0.
• The input data of the DP slaves were further cyclically transferred to the
input area of the CPU.
Master behavior at • The global control command "Operate" is sent to the slaves by the
CPU RUN master. Here the DE-LED is on.
• Every connected DP slave is cyclically attended with an output telegram
containing recent output data.
• The input data of the DP slaves were cyclically transferred to the input
area of the CPU.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 6-11

LEDs Dependent on the mode of operation the LEDs show information about the
PROFIBUS/PtP state of operation of the PROFIBUS part according to the following pattern:
interface X3
Master operation
RN ER DE IF Meaning
(RUN) (ERR)
green red green red
Master has no project, this means the interface is deactivated respectively
○ ○ ○ ○ PtP is active.
● ○ ○ ○ Master has bus parameters and is in RUN without slaves.
Master is in "clear" state (safety state). The inputs of the slaves may be
● ○ ☼ ○ read. The outputs are disabled.
Master is in "operate" state, this means data exchange between master and
● ○ ● ○ slaves. The outputs may be accessed.
● ● ● ○ CPU is in RUN, at least 1 slave is missing.
● ● ☼ ○ CPU is in STOP, at least 1 slave is missing.
○ ○ ○ ● Initialization error at faulty parameterization.
○ ● ○ ● Waiting state for start command from CPU.
Slave operation
RN ER DE IF Meaning
(RUN) (ERR)
green red green red
○ ○ ○ ○ Slave has no project respectively PtP is active.
☼ ○ ○ ○ Slave is without master.
☼* ○ ☼* ○ * Alternate flashing at configuration faults.
● ○ ● ○ Slave exchanges data between master.
6-12 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Manual VIPA System 300S SPEED7 Chapter 7 WinPLC7
Chapter 7 WinPLC7
Overview In this chapter the programming and simulation software WinPLC7 from
®
VIPA is presented. WinPLC7 is suited for every with Siemens STEP 7
programmable PLC.
Besides the system presentation and installation here the basics for using
the software is explained with a sample project.
More information concerning the usage of WinPLC7 may be found in the
online help respectively in the online documentation of WinPLC7.
Content Topic Page

Chapter 7 WinPLC7 .......................................................................... 7-1
System presentation............................................................................. 7-2
Installation ............................................................................................ 7-3
Example project engineering ................................................................ 7-4
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 7-1

Chapter 7 WinPLC7 Manual VIPA System 300S SPEED7
System presentation
General WinPLC7 is a programming and simulation software from VIPA for every
®
PLC programmable with Siemens STEP 7.
This tool allows you to create user applications in FBD, LAD and STL.
Besides of a comfortable programming environment, WinPLC7 has an
integrated simulator that enables the simulation of your user application at
the PC without additional hardware.
This “Soft-PLC” is handled like a real PLC and offers the same error
behavior and diagnosis options via diagnosis buffer, USTACK and
BSTACK.
Note!
Detailed information and programming samples may be found at the online
help respectively in the online documentation of WinPLC7.
Alternatives There is also the possibility to use according configuration tools from
Siemens instead of WinPLC7 from VIPA.
Here the proceeding is part of this manual.
System • Pentium with 233MHz and 64Mbyte work space

requirements • Graphics card with at least 16bit color - we recommend a screen
resolution of at least 1024x768 pixel.
• Windows 98SE/ME, Windows 2000,
Windows XP (Home and Professional), Windows Vista
Source You may receive a demo version from VIPA. Without any activation with
the demo version the CPUs 11x of the System 100V from VIPA may be
configured.
To configure the SPEED7 CPUs a license for the "profi" version is
necessary. This may be online received and activated.
There are the following sources to get WinPLC7:
Online At www.vipa.com in the service area at Downloads a link to the current

demo version and the updates of WinPLC7 may be found.
CD Order no. Description

SW211C1DD WinPLC7 Single license, CD, with documentation in german
SW211C1ED WinPLC7 Single license, CD, with documentation in english
SW900T0LA ToolDemo
VIPA software library free of charge respectively demo
versions, which may be activated
7-2 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Installation
Preconditions The project engineering of a SPEED7 CPU from VIPA with WinPLC7 is
only possible using an activated "Profi" version of WinPLC7.
Installation The installation and the registration of WinPLC7 has the following
WinPLC7 approach:
Demo • For installation of WinPLC7 start the setup program of the
corresponding CD respectively execute the online received exe file.
• Choose the according language.
• Agree to the software license contract.
• Set an installation directory and a group assignment and start the
installation.
Activation of the • Start WinPLC7. A "Demo" dialog is shown.

"Profi" version • Click at [Activate Software]. The following dialog for activation is shown:
• Fill in the following fields:

Email-Addr., Your Name und Serial number. The serial number may be
found on a label at the CD case.
• If your computer is connected to Internet you may online request the
Activation Key by [Get activation key via Internet]. Otherwise click at
[This PC has no access to the internet] and follow the instructions.
• With successful registration the activation key is listed in the dialog
window respectively is sent by email.
• Enter the activation key and click to [OK]. Now, WinPLC7 is activated as
"Profi" version.
Installation of To find a station via Ethernet (accessible nodes) you have to install the
WinPCAP for WinPCAP driver. This driver may be found on your PC in the installation
station search via directory at WinSPS-S7-V5/WinPcap_... .exe.
Ethernet Execute this file and follow the instructions.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 7-3

Example project engineering
Job definition In the example a FC 1 is programmed, which is cyclically called by the

OB 1. By setting of 2 comparison values (value1 and value2) during the FC
call, an output of the PLC-System should be activated depending on the
comparison result.
Here it should if value1 = value2 activate output Q 124.0

apply: if value1 > value2 activate output Q 124.1
if value1 < value2 activate output Q 124.2
Precondition • You have administrator rights for your PC.

• WinPLC7 is installed and activated as "Profi" version.
• One CPU and one digital output module are installed and cabled.
• The Ethernet PG/OP channel of the CPU is connected to your Ethernet
network. Your CPU may be connected to your PC with an Ethernet
cable either directly or via hub/switch.
• WinPCap for station search via Ethernet is installed.
• The power supply of the CPU and the I/O periphery are activated and
the CPU is in STOP state.
Project • Start WinPLC7 ("Profi" version)

engineering • Create and open a new project with [Create a new solution].
Hardware • For the call of the hardware configurator it is necessary to set WinPLC7
configuration from the Simulator-Mode to the Offline-Mode. For this and the communi-
cation via Ethernet set "Target: TCP/IP Direct".
• Double click to "Hardware stations" and here at "Create new".
• Enter a station name. Please consider that the name does not contain
any spaces.
• After the load animation choose in the register Select PLC-System the
system "VIPA SPEED7" and click to [Create]. A new station is created.
• Save the empty station.
• By double click or drag&drop the according VIPA CPU in the hardware
catalog at CPU SPEED7 the CPU is inserted to your configuration.
• For output place a digital output module and assign the start address 124.
• Save the hardware configuration.
7-4 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Online access via • Open the CPU-Properties, by double clicking to the CPU at slot 2 in the
Ethernet PG/OP hardware configurator.
channel • Click to the button [Ethernet CP-Properties (PG/OP-channel)]. The
Properties CP343 is opened.
• Chose the register Common Options.
• Click to [Properties Ethernet].
• Choose the subnet "PG_OP_Ethernet".
• Enter a valid IP address-and a subnet mask. You may get this from your
system administrator.
• Close every dialog window with [OK].
• Select, if not already done, "Target: External TCP/IP direct".
• Open with Online > Send configuration to the CPU a dialog with the
same name.
• Click to [Accessible nodes]. Please regard to use this function it is
necessary to install WinPCap before!
• Choose your network card and click to [Determining accessible nodes].
After a waiting time every accessible station is listed. Here your CPU
with IP 0.0.0.0 is listed, too. To check this the according MAC address is
also listed. This MAC address may be found at a label beneath the front
flap of the CPU.
• For the temporary setting of an IP address select you CPU and click to
[Temporary setting of the IP parameters]. Please enter the same IP
parameters, you configured in the CPU properties and click to [Write
Parameters].
• Confirm the message concerning the overall reset of the CPU. The IP
parameters are transferred to the CPU and the list of accessible stations
is refreshed.
• Select you CPU and click to [Confirm]. Now you are back in the dialog
"Send configuration".
Transfer hardware • Choose your network card and click to [Send configuration]. After a
configuration short time a message is displayed concerning the transfer of the
configuration is finished.
Note!
Usually the online transfer of the hardware configuration happens within
the hardware configurator.
With File > Save active station in the WinPL7 sub project there is also the
possibility to store the hardware configuration as a system file in WinPLC7
to transfer it from WinPLC7 to the CPU.
The hardware configuration is finished, now and the CPU may always be
accessed by the IP parameters as well by means of WinPLC7.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 7-5

Programming of The PLC programming happens by WinPLC7. Close the hardware

the FC 1 configurator and return to your project in WinPLC7.
The PLC program is to be created in the FC 1.
Creating block FC 1 • In "Project content" choose New > FC.
• Enter "FC1" as block and confirm with [OK]. The editor for FC 1 is
called.
Creating In the upper part of the editor there is the parameter table. In this example
parameters the 2 integer values value1 und value2 are to be compared together. Since
both values are read only by the function, these are to be defined as "in".
• Select the "in -->" row at the parameter table and enter at the field
Name "value1". Press the [Return] key. The cursor jumps to the column
with the data type.
• The data type may either directly be entered or be selected from a list of
available data types by pressing the [Return] key. Set the data type to
INT and press the [Return] key. Now the cursor jumps to the Comment
column.
• Here enter "1. compare value" and press the [Return] key. A new "in -->"
row is created and the cursor jumps to Name.
• Proceed for value2 in the same way as described for value1.
• Save the block. A note that the interface of the block was changed may
be acknowledged with [Yes].
The parameter table shows the following entries, now:
7-6 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Enter the program As requested in the job definition, the corresponding output is activated
depending on the comparison of value1 and value2. For each comparison
operation a separate network is to be created.
• The program is to be created as FBD (function block diagram). Here
change to the FBD view by clicking at FBD.
• Click to the input field designated as "<empty>".

The available operations may be added to your project by drag&drop
from the hardware catalog or by double click at them in the hardware
catalog.
• Open in the catalog the category "Comparator" and add the operation
"CMP==I" to your network.
• Click to the input left above and insert value1. Since these are block
parameters a selection list of block parameters may be viewed by
entering "#".
• Type in "#" and press the [Return] key.
• Choose the corresponding parameter and confirm it with the [Return]
key.
• Proceed in the same way with the parameter value2.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 7-7

The allocation to the corresponding output, here Q 124.0, takes place with
the following proceeding:
• Click to the output at the right side of the operator.
• Open in the catalog the category "Bit logic" and select the function
"--[=]". The inserting of "--=" corresponds to the WinPLC7 shortcut [F7].
• Insert the output Q 124.0 by clicking to the operand.
Network1 is finished, now.
Adding a new For further comparisons the operations "CMP>I" at Q 124.1 and "CMP<I"
network at Q 124.2 are necessary. Create a network for both operations with the
following proceeding:
• Move your mouse at an arbitrary position on the editor window and

press the right mouse key.
• Select at the context menu "Insert new network". A dialog field is
opened to enter the position and number of the networks. Or click at
[Add a network at the end of the block].
• Proceed as described for "Network 1".
• Save the FC 1 with File > Save content of focused window respectively
press [Strg]+[S].
7-8 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

FC1 After you have programmed the still missing networks, the FC 1 has the
following structure:
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 7-9

Creating the block The FC 1 is to be called from the cycle OB 1.

OB 1 • Go to OB 1, which was automatically created with starting the project.
• Go to "Project content" or to "Solution" and open the OB 1 by a double
click.
• Change to the STL view.
• Type in "Call FC 1" and press the [Return] key. The FC parameters are
automatically displayed and the following parameters are assigned:
• Save the OB 1 with or [Strg]+[S].
Test the PLC With WinPLC7 there is the possibility to test your project in a simulator.
program in the • Here select "Target: Simulator".
Simulator
• Transfer the blocks to the simulator with [Load all blocks into the PLC].
• Switch the CPU to RUN, by clicking at RUN in the "CPU Control Center"
of "Edit project". The displayed state changes from STOP to RUN.
• To view the process image select View > Display process image
window or click at . The various areas are displayed.
• Double click to the process image and enter at "Line 2" the address
PQB 124. Confirm with [OK]. A value marked by red color corresponds
to a logical "1".
• Open the OB 1.
• Change the value of one variable, save the OB 1 and transfer it to the
simulator. According to your settings the process image changes
immediately. The status of your blocks may be displayed with Block >
Monitoring On/Off.
7-10 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Visualization via A further component of the simulator is the PLC mask. Here a CPU is
PLC mask graphically displayed, which may be expanded by digital and analog
peripheral modules.
As soon as the CPU of the simulator is switched to RUN state, inputs may
be activated by mouse and outputs may be displayed.
• Open the PLC mask with view > PLC mask. A CPU is graphically
displayed.
• Double-click to the output module, open its properties dialog and enter
the Module address 124.
• Switch the operating mode switch to RUN by means of the mouse. Your
program is executed and displayed in the simulator, now.
Transfer PLC • For transfer to the CPU set the transfer mode to "Target: TCP/IP-
program to CPU Direct".
and its execution • If there are more network adapters in your PC, the network adapter may
be selected via Extras > Select network adapter.
• For presetting the Ethernet data click to [...] and click to
[Accessible nodes].
• Click at [Determining accessible nodes]. After a waiting time every

accessible station is listed.
• Choose your CPU, which was provided with TCP/IP address parameters
during the hardware configuration and click to [Confirm].
• Close the "Ethernet properties" dialog with [OK].
• Transfer your project to your CPU with PLC > Send all blocks.
• Switch your CPU to RUN state.
• Open the OB 1 by double click.
• Change the value of one variable, save the OB 1 and transfer it to the
CPU. According to your settings the process image changes imme-
diately. The status of your blocks may be displayed with Block >
Monitoring On/Off.
HB140E - CPU - RE_315-2AG12 - Rev. 12/51 7-11
7-12 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

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VIPA System 300S

SPEED7 - CPU | 315-2AG12 | Manual

Information product support

Chapter 6 Deployment PROFIBUS communication ....................... 6-1

ii HB140E - CPU - RE_315-2AG12 - Rev. 12/51

About this manual

Overview Chapter 1: Basics

HB140E - CPU - RE_315-2AG12 - Rev. 12/51 1

Guide to the The following guides are available in the manual:

Availability The manual is available in:

2 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Applications The SPEED7 CPU is constructed and produced for:

Documentation The manual must be available to all personnel in the

The following conditions must be met before using or commissioning

• Hardware modifications to the process control system should only be

• Installation and hardware modifications only by properly trained

• The national rules and regulations of the respective country must be

HB140E - CPU - RE_315-2AG12 - Rev. 12/51 3

4 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Content Topic Page

HB140E - CPU - RE_315-2AG12 - Rev. 12/51 1-1

Safety Information for Users

Handling of VIPA modules make use of highly integrated components in MOS-

The Symbol is located on the module, the module rack or on packing

Shipping of Modules must be shipped in the original packing material.

Measurements and When you are conducting measurements on electrostatic sensitive

1-2 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Operating structure of a CPU

HB140E - CPU - RE_315-2AG12 - Rev. 12/51 1-3

Applications The program that is present in every CPU is divided as follows:

1-4 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

HB140E - CPU - RE_315-2AG12 - Rev. 12/51 1-5

MPI Adapter MPI CPU DP

firmware wld file

1-6 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Operation Security • Wiring by means of spring pressure connections (CageClamps) at the

Environmental • Operating temperature: 0 ... +60°C

Dimensions/ • Dimensions of the basic enclosure:

HB140E - CPU - RE_315-2AG12 - Rev. 12/51 1-7

1-8 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Chapter 2 Assembly and installation guidelines

Content Topic Page

HB140E - CPU - RE_315-2AG12 - Rev. 12/51 2-1

Dimensions 1tier width (WxHxD) in mm: 40 x 125 x 120

2-2 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

Assembly standard bus

Profile rail Order number A B C

HB140E - CPU - RE_315-2AG12 - Rev. 12/51 2-3

• lying assembly: from 0 to 40°C

• Click the CPU downwards and bolt it like shown.

2-4 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

[1] Test point for 2mm test tip

HB140E - CPU - RE_315-2AG12 - Rev. 12/51 2-5

What means Electromagnetic digestibility (EMC) means the ability of an electrical

2-6 HB140E - CPU - RE_315-2AG12 - Rev. 12/51

HB140E - CPU - RE_315-2AG12 - Rev. 12/51 2-7

Isolation of Electrical, magnetically and electromagnetic interference fields are

When isolating cables you have to regard the following:

Please regard at installation!

2-8 HB140E - CPU - RE_315-2AG12 - Rev. 12/51