Tushar Taru - Logbook - Power Electronics - 2021

ELEE1165: Power Electronics and Converters
Tutor: Dr Yehdego Habtay

[TUSHAR RAVINDRA TARU]
[Student ID: 001129783]
[Date:29-04-2021]
2021-2022
ELECTRICAL POWER ENGINEERING WITH INDUSTRIAL PRACTICE MSc
Lab2: Design and Simulation of a Buck Converter
Part I: Pre-laboratory tasks:
(a) Design of Inductor:

We can derive a simplified differential equation based on the assumption that the voltage
across the load, and thereby across the capacitor, is fairly constant. The differential
equation in terms of the current through the inductor, when the switch is closed, may now
be written as:
d i L (t)
L =V d −V o (1)
dt
Assuming that the circuit has assumed steady state hence there may already be some
current in the inductor, I L ,min, just prior to the closing of switch S. Hence for a time
interval 0 ≤ t ≤ T ON =DT , gives:
V d −V o
i L ( t )= t + I L ,min (2)
L
The inductor current increases linearly with time and attains its maximum value
I L ,max as t →T ON =DT such that
V d−V o
I L ,max = DT + I L ,min (3)
L
Defining the change in the current from its minimum to maximum value as the peak-to-
peak current ripple∆ I L , the equation 4-6 yields an expression for∆ I L, as
V d −V o
∆ I L=I L,max −I L ,min = DT (4)
L
Figure 1: Buck Convertor with Load Resistor
Design of Capacitor:
The output capacitor is assumed to be so large as to yield v o ( t )=V o. However, the ripple
in the output voltage with a practical value of capacitance can be calculated by
considering the waveforms shown in Figure below for a continuous conduction mode of
operation. Assuming that all of the ripple component in i L flows through the capacitor
and its average component flows through the load resistor, the shaded area in Figure
below represents an additional charge ΔQ.
Figure.2: Output Ripple Voltage in Step-down Converter
Therefore, the peak-to-peak voltage ripple ΔVo can be written as:

∆ V ∆Q 1 1 ∆ I T L S
o=¿ = (5)¿
C C2 2 2
From above Figure during t off

Vo
∆ I L= ( 1−D ) T S (6)
L
From Equation (6) substituting the value of ∆ I L into Equation (5):
TS Vo
∆ V o= (1−D ) T S (7)
8C L
∆ V o 1 T 2S (1− D) π 2
Vo 8
=
LC
= ( 1−D )
2
fc 2
fs
(8) ( )
Where switching frequency f s=1 /T s and
1
f c= (9)
2 π √ LC
Equation (8) shows that the voltage ripple can be minimized by selecting a corner
frequency fc of the low pass filter at the output such that f c ≪ f s .
Values of L&C:
For 1 % Ripple and f sw =125 KHz the following formula can be used:
2
( 1/f sw ) (0.1667)
LC=
8 × 0.01
LC=13 exp ⁡( −9)
For 5% Ripple and f sw =125 KHz , the following formula can be used:
2
( 1/f sw ) (0.1667)
LC=
8 × 0.05
LC=3 exp ⁡( −11)
(b) Topology uses the complementary switches to transfer energy to the filter inductance
from the power source.
Figure 3: Complementary Switches
The synchronous buck converter is essentially the same as the buck step-down converter
with the substitution of the “catch” diode for another FET switch, or Synchronous
Rectifier (SR). The upper MOSFET conducts to transfer energy from the input (same as
the conventional buck converter) and charges the inductor current. When the switch
control is off, the lower MOSFET switch turns on to circulate the inductor current and
provides a current path for the inductor when discharging.
The control and driver circuits synchronize the timing of both MOSFETs with the
switching frequency. The synchronous Pulse Width Modulator (PWM) control block
regulates the output voltage by modulating the conduction intervals of the upper and
lower MOSFETs. This topology improves efficiency with faster switch turn-on time and
lower FET series resistance ( R Dson) versus the diode. Under light loads, the control block
usually turns the lower MOSFET off to emulate a diode this is because more power is
lost in turning a large FET switch on and off, then lost due to the resistance of the switch
itself.
(c) Synchronous rectification increases the efficiency of a buck converter by replacing the
Schottky diode with a low-side NMOS FET. The resultant voltage drop across the
MOSFET can be smaller than the forward voltage drop of the Schottky diode. To show
that the efficiency is greatly increased by replacing the diode with a MOSFET can be
shown with the following set of equations. First consider the case when we have a diode.
The equation for power loss across a diode can be calculated with Equation (10).
P D=V D . ( 1−D ) . I O (10)
Note that it is multiplied with (1-D) for the OFF time. Because the diode conducts in the
OFF state. Assume that the input is 5V and the output is 3.3 V, and the load current is
10A. In this case the duty cycle will be 66% and the diode will be ON for 34% of the
time. A typical diode with a 0.7V would suffer a power loss of 2.38 W.
Now we take the equation for a switch
2
PS 2=I o . R DSON . ( 1−D )(11)
It can be seen that the power loss is very much dependent upon the duty cycle. A
synchronous rectifier generally has lower losses than a conventional or Schottky diode,
and so its use is quite popular in low voltage DC/DC converters. Also for increased
efficiency the following relation must be true I 2o . R DSON ≪V D .
(d) Power Efficiency of a Buck Converter changes with a change in the load. Efficiency of a
Buck Converter is affected by resistive impedances and the switching losses due to the
capacitive parasitic impedances of the circuit components:
Output Power Output Voltage ×Output Current
Efficiency= = ( 12)
Input Power Input Voltage × Input Current
(e)
Figure 4: Steady-State Voltage Waveform
Figure.5: Steady-State Current Waveform
(f) And (g) Continuous Conduction Mode (CCM) and Discontinuous Conduction
Mode (DCM):
 Occurs because switching ripple in inductor current or capacitor voltage causes
polarity of applied switch current or voltage to reverse, such that the current- or
voltage-unidirectional assumptions made in realizing the switch are violated.
Figure 6: Step-Down Converter Circuit States Switch On and Off
Mode Boundary:
 I >∆ i L for CCM .
 I <∆ i L for DCM .
Critical load resistance Rcrit :
 R< R crit ( D ) for CCM .

 R> R crit ( D ) for DCM .
2L
Where Rcrit ( D )= '
D TS
Part II: In-laboratory simulation tasks

Results:
Conclusion:
Basic insight into how a buck converter could be manufactured on the chip. Although some of
the problems were not solved, they were highlighted as possible areas for further refinements.
The system influence was also observed when RL switches from one value to another. While we
have only considered the ideal cases, we would see that ripple would increase and efficiency
decrease if all non-idealities were taken into account.
Lab3: Simulation of a Flyback Converter (Matlab/Simulink)
The DC voltage at the input is transferred to the DC voltage on the output by a flyback converter.
The operating principle is similar to the buck-boost converter; however, a further transformer is
used to galvanise input and output isolation.
The output voltage across Resistor R is given by V out=-N 2/N 1. D/ for a flyback converter in
continuous drive mode (1-D). V in The number of turns of primary and secondary windings is
where D is the duty cycle and N1 and N2.
Results:
Conclusion:
• Active snubber circuits in the main power switches are included to prevent excessive voltages.
There are descriptions and mathematical analysis of various operating modes of the converter. A
simple voltage control system is proposed in order to achieve good performance under load
effects and variations in voltage, considering discontinuous driving mode.
• The fundamental waveform of the flyback topology shows sudden transitions and changes for
primary and secondary currents.

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ELEE1165: Power Electronics and Converters

Tutor: Dr Yehdego Habtay

Part I: Pre-laboratory tasks:

(a) Design of Inductor:

Figure 1: Buck Convertor with Load Resistor

Figure.2: Output Ripple Voltage in Step-down Converter

Therefore, the peak-to-peak voltage ripple ΔVo can be written as:

From above Figure during t off

Figure 3: Complementary Switches

Figure.5: Steady-State Current Waveform

Critical load resistance Rcrit :

 R< R crit ( D ) for CCM .

Part II: In-laboratory simulation tasks

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