Lic LP 2023-24
Lic LP 2023-24
Lic LP 2023-24
FMTH0301/Rev.5.3
Course Plan
Semester: 4thSemester Year:2023-24
Course Title: Linear Integrated Circuits Course Code: 19EECC203
Total Contact Hours: 50 Duration of ESA: 3 Hours
ISA Marks: 50 ESA Marks: 50
Lesson Plan Authors: Shraddha B Hiremath Date: 20/02/2024
R. V. Hangal
Jyoti Patil
Poornima Patil
Pallavi Hiremath
Checked By: Date: 21/02/2024
i. Analyze the operation of current mirror, differential amplifier using MOSFET and evaluate the
respective performance parameters.
ii. Design and analyze the linear applications of Op-Amp for the given specifications.
iii. Design and analyze the non-linear applications of Op-Amp for the given specifications.
iv. Design and simulate a functional block for a given application using linear IC’s.
Course Articulation Matrix: Mapping of Course Outcomes (COs) with Program Outcomes (POs)
Course Title: Linear Integrated Circuits Semester: 4 - Semester
Course Code: 19EECC203 Year:2023-24
Course P P P P P P P P P PO PO PO PO PO PO
Outcomes O O2 O3 O4 O5 O6 O7 O8 O9 110 111 112 113 114 115
(COs) / 1
Program
Outcomes
(POs)
Analyze M
the
operation
of current
mirror,
differential
Amplifier
using
MOSFET
and
evaluate
the
respective
performanc
e
parameters
.
Design and M H
analyze the
operations
of linear
application
s using Op-
amp for the
given
specificatio
ns.
Design and M H
analyze the
operations
of non-
linear
application
s using Op-
amp for the
given
specificatio
n.
Design and M M M L L
simulate a
functional
block for a
given
application
using linear
IC’s.
Eg: 1.2.3: Represents Program Outcome ‘1’, Competency ‘2’ and Performance Indicators ‘3’.
Course Content
1. Behzad Razavi, Design of Analog CMOS Integrated Circuits McGraw-Hill, 2nd edition, 2016
2. Phillip E. Allen, Douglas R. Holberg, CMOS Analog Circuit Design, Oxford University Press,
USA, 2010
3. Ramakant A. Gayakwad, Op - Amps and Linear Integrated Circuits, 4th Edition
References
1. A.S. Sedra & K.C. Smith, Microelectronic Circuits, 7th Edition, 2017
2. Design With Operational Amplifiers and Analog Integrated Circuits, Sergio Franco, 4th
edition ,Tata McGraw Hill 2014
3. David A. Bell, Operational Amplifiers and Linear IC’s, 3rd ed., Oxford University Press, 2011
4. B. Razavi, Fundamentals of Microelectronics, 2nd edition.
Evaluation Scheme
ISA Scheme
Assessment Weightage in Marks
ISA-I 20
ISA-II 20
Simulation/Written 05
Assignment
ESA 50
Total 100
Note
1. Each Question carries 20 marks and may consists of sub-questions.
2. Mixing of sub-questions from different chapters within a unit (only for Unit I and Unit II) is allowed in
Minor I, II and ESA.
3. Answer 5 full questions of 20 marks each (two full questions from Unit I, II and one full question
from Unit III) out of 8 questions in ESA.
Simulation/
Written
Assignment
II. Advantages:
● Excellent video lectures from Academia and Industry experts: Customized to our needs
● Improving the self-learning capability and enhancing attention towards individual students
III. Resources:
Videos are available online on internet and on KLE Tech intranet
Internet KLE Tech Intranet
or
http://caf.bvb.edu
IV. Procedure:
1. Student Enrollment:
Students are enrolled to the course and instructions to access the video and assessment
details will be shared in the first class.
2. Before Class:
Videos can be watched any number of times at home or in Campus. Access is open for the
entire semester
3. Assessment:
Pre-test: Should be taken before coming to the class. It can be taken at home or in campus.
Passing Criteria is 40% and can be taken as many as 5 attempts to track their improvement.
Best of all attempts would be the final score.
4. Class Details:
Each class is of 02 hours duration:
● Summary of portion covered through video ………………
● In class (template):
Op-Amp Characteristics 06
22. Linear Applications – Active filters – 2nd order low pass filter 7
VI. Pre-test:
Op-Amp Characteristics
VII. Post-Test:
S.No Chapters No. of Questions
2. Current Mirrors 05
Chapter-wise Plan
Course Code and Title: 19EECC203 / Linear Integrated Circuits
Chapter Number and Title: 1.Op-Amp Characteristics Planned Hours: 4 hrs
Learning Outcomes:
At the end of the topic the student should be able to:
TLO's CO's BL CA Code
List the characteristics and compare the performance of an ideal and 1 2 1.4
non ideal Op-Amp.
Describe the differential and common mode signals. 1 2 1.4
Discuss the importance of output offset voltage, input and output 1 2 1.4
impedances, small signal and large signal bandwidth of ap-amp.
Lesson Schedule
Class No. - Portion covered per hour
1. Ideal and non-ideal OP-AMP terminal characteristics
2. Input and output impedance
3. Output Offset voltage.
4. Small signal and Large signal bandwidth.
Review Questions
Sr.No. - Questions TLO BL PI Code
1. List the ideal characteristics of an Op-Amp. Give its symbolical 1 1 1.4.1
representation and explain the functions of each terminal. Tabulate the
ideal Op-Amp terminal characteristics.
2. Explain the terms input impedance, output impedance; output offset 2 2 1.4.1
voltage, common mode and difference mode gain.
Learning Outcomes:
At the end of the topic the student should be able to:
Design & analyze the performance characteristics of the current mirror 1 2 1.4
in terms of figure of merit. 2.1
output impedance.
Lesson Schedule
Class No. - Portion covered per hour
1. Introduction: Current Mirror circuits
2. Current Mirror circuits: Current source and current sink.
3. Figures of merit (output impedance, voltage swing)
4. Widlar Current Mirrors
5. Cascode Current Mirrors
6. Wilson current Mirrors
7. Numerical on Mirrors
8. Numerical on Mirrors
Review Questions
Sr.No. - Questions TLO B PI
L Cod
e
1. Differentiate between current source and current sink? Illustrate with the help of a TLO4 L 1.3.
single MOS transistor. 2 1
2. Describe the working principle of a standard cascode current sink. Compare its TLO3 L 1.4.
performance with basic current sink. 2 1
3. Derive the equation of output impedance of a standard cascode current sink. TLO3 L 1.3.
(small signal model approach) 2 1
4. Explain the working of Wilson and Widlar current mirror with neat diagram TLO3 L 1.4.
2 2
5. Derive the expression for output impedance of Wilson and Widlar current mirror. TLO5 L 1.3.
2 1
6. In basic current mirror circuit using two transistor having equal lengths, widths TLO1 L 1.4.
related by W2/W1 = 5, design a current mirror to obtain I= 0.5 mA, let V DD= -VSS= 5V, 3 2
k’n(W/L)1 = 0.8 mA / V2, VT= 1 V, find the value of R.
7. Design an NMOS current mirror with VDD= 5 V, VSS= 0 V and Iref = 100 µA. For the TLO2 L 1.4.
matched MOSFETS L= 10 µm, W = 100 µm, VT = 1V and Kn’ = 20 µA/ V2. 3 1
8. Determine a suitable circuit configuration to mirror the current from a reference TLO5 L 1.4.
current of 200µA with high input impedance to drive a differential amplifier with 2 2
common mode input voltage for the following parameters: R = 2KΩ, k’ n2= 10, k’n1=
250 µA/ V2,VDD= 5V.
9. Compute the value of output voltage Vo for the circuit shown below TLO1 L 2.1.
3 2
10. Below figure shows an arrangement where M1 and M2 serve as current sources TLO3 L 2.1.
for circuits 1 and 2. Design the circuit for the power budget of 3mW. 3 2
Learning Outcomes:
At the end of the topic the student should be able to:
TLO's CO's BL CA Code
Describe the working of a basic differential amplifier and Design the 1 2 2.1
differential amplifier for the given specifications.
Define common mode gain, difference mode gain and CMRR. 1 2 1.4
Analyze the limitations of the slew rate & understand what is instability 1 2 1.4
and compensation
Lesson Schedule
Class No. - Portion covered per hour
1. Basic differential amplifier
2. Common mode and difference mode gain
3. Numericals
4. CMRR
5. 5-pack differential amplifier –small signal analysis.
6. 5-pack differential amplifier design.
7. 7-pack operational amplifier.
8. 7-pack operational amplifier-small signal analysis
9. Numerical on Differential Amplifiers
Review Questions
Sr.No. - Questions TLO BL PI Code
1. Describe the working principle of a basic differential amplifier, with 1 L2 1.4.1
common mode and differential input voltages.
2. Explain small signal operation of the MOS differential pair with 2 L2 1.4.2
differential and common mode gain. Explain CMRR and ICMR.
3. For the 5 pack differential amplifier using NMOS device as input and 4 L2 2.1.2
PMOS loads obtain the expression for small signal differential voltage
gain.
4. Design the currents and W/L values of the current mirror load 1 L2 1.4.2
differential amplifier to satisfy the following specifications:
VDD= -VSS =2.5V,SR 10V/µs(C load=5pf),
f-3db 100KHz(C L=5pF),a small signal voltage gain of 100,
-1.5ICMR2V and Pdiss1mW.
Use model parameters of k’n= 110µA/V2, k’p= 50µA/V 2, VTP=-0.7V,
VTN=0.7V,λn=0.04V-1 , λp= 0.05V-1.
5. Draw the architecture of a two stage operational amplifier. And explain 4 L2 1.4.1
the function of each block..
6. For a MOS differential pair with a common mode voltage VCM 1 L2 1.4.2
applied ,let VDD =-VSS= 1.5V,k’n(W/L)=4mA/V2,
VT =0.5V,ID=0.4mA and RD =2.5KΩ
Neglect the channel length modulation.
Find VOV and VGS for each MOSFET’s.
For VCM=-0.2V find Vs, ID1, ID2, VD1 and VD2.
What is the highest value of VCM for which M1 and M2 remain in
saturation.
7. Compute VD,VS, VDS and VGS if ID = 2 mA, RD= 500 Ω, VOV3 = 0.5 1 L3 1.4.1
V, and identical Q1& Q2 with μnCox(W/L ) = 8 mA/V2, Vt= 0.5 V, λ = 0.
4 L3 2.1.2
9. (W/L) 1-4 =50/0.5, I =1mA, λn=0.1and λp=0.2, what is the small
SS
UNIT II
Learning Outcomes:
At the end of the topic the student should be able to:
TLO's CO's BL CA Code
Discuss the significance of negative feedback and explain the four basic 2 2 1.4
feedback topologies.
Describe the effect of inversion and follower property under linear mode 2 3 2.1
operation and design a suitable signal conditioning circuit for given
applications.
Lesson Schedule
Class No. - Portion covered per hour
1. Op-Amp under negative and positive feedback,
2. Impact of negative feedback on bandwidth,
3. Input and output impedances,
4. Offset voltage under negative feedback,
Review Questions
Sr.No. - Questions TLO BL PI Code
1. Discuss the effect of negative feedback on the performance 2 2 1.4.1
characteristics of Op-Amp.
4. Derive the expressions for input and output impedances with respect 1 2 1.4.1
to voltage series feedback amplifier and voltage shunt feedback
amplifier.
6. Explain voltage shunt feedback amplifier and derive the equation for 3 2 1.3.1
Learning Outcomes:
At the end of the topic the student should be able to:
List and explain the different configurations of OPAMP. Design inverting 2 2 1.4
and non inverting amplifier for the given specifications.
Design and explain the working principle of Integrator and Differentiator. 2 2 1.4,
2.1
Design the Instrumentation amplifier to obtain the expression for voltage 2 3 1.4,
gain for given specifications. 2.1
Derive the expression of gain & cutoff frequency for first and second 2 3 1.4
order low pass and high pass filters and verify the filter response for a
given frequency.
Discuss the basic principle of oscillator. Design and analyze the 2 2 1.4
operation of Phase shift oscillator, Tuned oscillator and RC oscillators.
Lesson Schedule
Class No. - Portion covered per hour
1. DC Amplifiers, AC Amplifiers,
2. Summing, Scaling and Averaging amplifiers (Inverting, Non-inverting and Differential
configuration),
3. Summing, Scaling and Averaging amplifiers (Inverting, Non-inverting and Differential
configuration)…contd
4. Integrator and Differentiator,
5. Current amplifiers,
6. Instrumentation amplifier,
7. Phase shift oscillator, Tuned Oscillators, Crystal Oscillator,
8. Active Filters –First order low pass &high pass filters.
9. Active filters- Second order low pass & high pass filters
Review Questions
Sr.No. - Questions TLO BL PI Code
1. Briefly explain the difference between the DC and AC amplifiers. 1 2 1.4.1
3. Explain the difference between (a) inverting and differential summing 2 2 1.4.1
amplifier and (b) inverting and non-inverting averaging amplifier.
6. It is required to measure the weight of the vehicle using weigh bridge 4 2 2.1.2
system, suggest and explain suitable signal conditioning circuit for
measuring the weight in terms of voltage.
11. An integrating circuit as shown below has the following components 3 3 1.4.1
12. Determine the value of CN for the circuit given below to ensure VX = VY 1 3 2.1.2
assuming ideal Op-Amp. Given input VX is a sinusoid.
14. In the figure shown below, the operational amplifier is ideal and its 2 3 1.4.2
output can swing between – 15 and + 15 volts.
The input Vi, which is zero for t<0, is switched to 5 volts at the instant t =
0. Given that the output Vo is + 15 volts for t<0, sketch the waveforms of
Vo and Vi. You must give the values of important parameters of the
sketch.
15. The circuit of figureshown below uses an ideal operational amplifier. 2 3 1.4.2
For small positive values of Vin explain the working of the circuit.
16. Design a non inverting amplifier with a gain of 2.At a maximum 2 3 1.4.2
output voltage of 10V the current in the voltage divider is to be 10µA.
17. An Op-Amp having a 106-db gain at dc and a single pole frequency 5 3 1.4.2
response with ft=2Mhz is used to design a non inverting amplifier
with nominal dc gain of 100.Find the 3-db frequency of the closed
loop.
20. For the following circuit if δ=0.05, Determine the output VO 2 3 1.4.1
Unit III
Course Code and Title: 19EECC203 / Linear Integrated Circuits
Chapter Number and Title: 6. Nonlinear Applications of Op-Amp Planned Hours: 10
hrs
Learning Outcomes:
At the end of the topic the student should be able to:
TLO's CO's BL CA Code
Construct and describe the operation of comparators, Zero crossing 3 2 1.4
detectors Voltage Controlled Oscillators, triangular and square wave
generator and sample and hold circuit.
With neat block schematic explain the working of Flash ADC. 3 2 1.4
2.1
Lesson Schedule
Review Questions
Sr.No. - Questions TLO BL PI Code
1. What is comparator? What is the difference between a basic 1 1 1.4.2
comparator and the Schmitt trigger?
4. Explain sample and hold circuit with neat circuit schematic. 1 2 1.4.2
5. For an 8-bit R-2R ladder DAC, the nominal full-scale voltage is 10V. 6 3 1.4.2
Calculate the analog o/p for i) 10100000 ii) 11101010.
6. A triangular wave which goes from -12V to +12V is applied to the 2 3 1.4.2
inverting input of the Op-Amp. Calculate the voltage that switches
between the non-inverting input.
7. Vin = 20V ±20%, Vout = 10V, Calculate the maximum power 2 3 1.4.2
dissipation in Q1if load current through RL is 200m
Duration: 75min
Max. Marks: 40
PI
Q.N Questions Marks CLO BL
Code
o
Describe the working principle of a standard cascode current 06 1 1.4.2 2
1a sink and compare its performance in terms of impedance with
simple current sink.
Identify the following current mirror configuration and determine 06 1 1.4.2 3
the drain current of M4 if all the transistors are in saturation.
For two transistor with equal lengths and widths related by 08 1 1.4.2 3
W2:W1 = 5,design a basic current mirror to obtain I= 0.5 mA. , let
c
VDD= -VSS= 5 V, k’n (W/L) 1 = 0.8 mA / V2, VT= 1 V also determine
the appropriate load resistor.
Draw non-inverting and inverting open loop configuration using 06 1 1.4.1 2
Op-Amp, determine the output voltage swing for the following
inputs:
2a Vin1=2µV
Vin2= 0.5V
Vin3= -3.5µV
Given that VCC= -VSS=12V
In the differential amplifier circuit given below the width of M2 is 06 1 1.3.1
b twice as that of M1. Find the expression for small signal gain of
the amplifier if the input voltages Vin1 and Vin2 are equal.. 3
3a
Duration: 75min
Max. Marks: 40
PI B
Questions Marks CLO
Q.No Code L
Find the output voltage Vo, assuming the Op-Amps are ideal. 06 2 1.4.2 2
1a
For the following Op-Amp configuration, with three inputs V1,V2 and 08 2 1.4.2 3
c
V3 , compute the value of feedback resistor R to obtain v out =100V.
For the circuit shown below with the values of R1=10KΩ, Rf=100 KΩ, 06 2 1.4.2 2
Cf=1nF.Find
1.Lower frequency limit of integration and
2. Response for the step, square and sine inputs.
c For the non inverting amplifier shown below with Rin=50Ω, Ci= 08 2 1.4.2 3
C1=0.1µF, R1=R2=R3=100k Ω, Rf=1M Ω and VCC=+15V.Determine a)
Bandwidth of the amplifier
Compute output voltage Vout for the circuit shown below Amplifier with 06 2 1.4.2 3
Buffer Circuit.
3a
Find the output voltage Vo, assuming the Op-Amps are ideal. 06 2 1.4.2 3
Duration: 3 hrs
Note: Answer five questions; any two full questions from each unit-I and unit-II and one full
Unit-I
Q. Ma PI
Questions CLO BL
rks Code
No
Differentiate between a current source and current sink? Illustrate with the 06 1 1.4.1 2
1a help of a single MOS transistor.
Determine a suitable circuit configuration to mirror the current from a
reference current of 200ua with high input impedance to drive a differential 06 1 1.4.2 3
b
amplifier with common mode input voltage for the following parameters:
R = 2K Ω, kn2= 10 µA/ V2, kn1= 250 µA/ V2 VDD= 5V.
For a MOS differential pair with a common mode voltage VCM applied, let
VDD = VSS= 1.5V, k’n (W/L)=4mA/V2, VT =0.5V ,I=0.4mA and RD =2.5KΩ
neglect the channel length modulation. 08 1 2.1.2 3
c
i. Find VOV and VGS for each MOSFET’s
ii. For VCM=-0.2 find vs,iD1,iD2,vD1 and vD2
What is the highest value of vcm for which M1 and M2 remain in saturation?
Design an NMOS current mirror with V DD= 5 V, VSS= 0 V and Iref = 100 µA.
06 1 1.4.1 3
2a for the matched MOSFETS L= 10 µm, W = 100 µm, V T = 1 V and k’n = 20
µA/ V2.
Draw the circuti configuration of a two stage operational amplifier and 06 1 1.4.1 2
b explain the different sub circuits in it.
Compute the power dissipated by 8Ω resistor if δ=
i. 0V, ii. 1nV and iii. 2.5µV
08 1 1.4.1 2
c
Define: Input bias current, input offset current, input offset voltage, output
offset voltage, PSRR, CMRR and slew rate. 06 1 1.4.1 2
3a
It is required to measure the room temperature of the food processing unit 2.1.2 3
in order to maintain the constant temperature using LM35. Design a circuit
06 2
4a to measure the temperature of the food processing unit in order to
generate a voltage proportional to change in measured temperature.
[Change in voltage for per degree rise in temperature is 3mV.]
The circuit shown below uses 1N750 diode, which is characterized by a 1.4.2 1
Zener voltage of 4.7V. Determine the voltages labeled V1, V2 and V3.
06 2
b
1.4.2 3
c Design an Op-Amp circuit that will provide an output voltage equal to the average of08 2 input voltages. Assume that
the three
in +10V
v out
a) If an inverting amplifier is used with avoltage gain of =1000 and
v¿
± 15V dc supplies, what is the expected output voltage range? 08 2
c
b) If a non-inverting amplifier is used with ± 15V dc supplies, what is the
Rf
maximum resistance ratio that can be used without the op amp
R1
saturating?
It is required to measure the weight of the vehicle using weigh bridge 2.1.2 2
system, Suggest and explain suitable signal conditioning circuit for 06 2
6a
measuring the weight interms of voltage.
A sinusoidal signal is riding on a 2V dc offset ie. the average value of the 2.1.2 3
total sinusoidal signal is 2V. Design a circuit to remove the dc offset, and 06 2
b
amplify the sinusoidal signal without phase reversal by a factor of 100.
Design a voltage shunt feedback amplifier using Op-Amp for gain of 5. 08 2 1.4.1 2
c
Unit III
Draw the circuit configuration to generate Square wave and triangular 1.4.2 2
10 3
b wave. Explain the circuit operation using waveforms.
ImWith a neat block diagram explain the working of SAR ADC. A 10 3 1.4.2 3
nd calculate the output of 3-bit SAR ADC for input voltage of 2.5V and
8a
5.5V.Assume V REF =8 V
With neat block diagram explain the working of R-2R DAC and design a 3- 1.4.2 3
bit R-2R DAC with R=1KΩ and R F=2KΩ and V REF =5 V . Assume that the
10 3
b resistance of the switches are negligible. Determine the value of i TOT for
each digital input and the corresponding output voltage, vOUT.