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STS1NK60Z

N-CHANNEL 600V - 13Ω - 0.25A - SO-8


Zener-Protected SuperMESH™ Power MOSFET

TYPE VDSS RDS(on) ID Pw


STS1NK60Z 600 V < 15 Ω 0.25 A 2W
 TYPICAL RDS(on) = 13Ω
 EXTREMELY HIGH dv/dt CAPABILITY
 ESD IMPROVED CAPABILITY
 100% AVALANCHE TESTED
 NEW HIGH VOLTAGE BENCHMARK SO-8
 GATE CHARGE MINIMIZED

DESCRIPTION
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established strip- INTERNAL SCHEMATIC DIAGRAM
based PowerMESH™ layout. In addition to pushing
on-resistance significantly down, special care is tak-
en to ensure a very good dv/dt capability for the
most demanding applications. Such series comple-
ments ST full range of high voltage MOSFETs in-
cluding revolutionary MDmesh™ products.

APPLICATIONS
 AC ADAPTORS AND BATTERY CHARGERS
 SWITH MODE POWER SUPPLIES (SMPS)

ORDERING INFORMATION
SALES TYPE MARKING PACKAGE PACKAGING
STS1NK60Z S1NK60Z SO-8 TAPE & REEL

June 2003 1/8


STS1NK60Z

ABSOLUTE MAXIMUM RATINGS


Symbol Parameter Value Unit
VDS Drain-source Voltage (VGS = 0) 600 V
VDGR Drain-gate Voltage (RGS = 20 kΩ) 600 V
VGS Gate- source Voltage ± 30 V
ID Drain Current (continuous) at TC = 25°C 0.25 A
ID Drain Current (continuous) at TC = 100°C 0.16 A
IDM () Drain Current (pulsed) 1 A
PTOT Total Dissipation at TC = 25°C 2 W
Derating Factor 0.016 W/°C
VESD(G-S) Gate source ESD(HBM-C=100pF, R=1.5KΩ) 800 V
dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns
Tj Operating Junction Temperature -55 to 150 °C
Tstg Storage Temperature -55 to 150 °C
( ) Pulse width limited by safe operating area
(1) ISD ≤0.3A, di/dt ≤200A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX.

THERMAL DATA
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W

GATE-SOURCE ZENER DIODE


Symbol Parameter Test Conditions Min. Typ. Max. Unit
BVGSO Gate-Source Breakdown Igs=± 1mA (Open Drain) 30 V
Voltage

PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES


The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.

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STS1NK60Z

ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)


ON/OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source ID = 1 mA, VGS = 0 600 V
Breakdown Voltage
IDSS Zero Gate Voltage VDS = Max Rating 1 µA
Drain Current (VGS = 0) VDS = Max Rating, TC = 125 °C 50 µA
IGSS Gate-body Leakage VGS = ± 20V ±10 µA
Current (VDS = 0)
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 50 µA 3 3.75 4.5 V
RDS(on) Static Drain-source On VGS = 10V, ID = 0.4 A 13 15 Ω
Resistance

DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (1) Forward Transconductance VDS = V, ID = 0.4 A 0.5 S
Ciss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 94 pF
Coss Output Capacitance 17.6 pF
Crss Reverse Transfer 2.8 pF
Capacitance
Coss eq. (3) Equivalent Output VGS = 0V, VDS = 0V to 480V 11 pF
Capacitance
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on) Turn-on Delay Time VDD = 300V, ID = 0.4 A 5.5 ns
tr Rise Time RG = 4.7Ω VGS = 10 V 5 ns
(Resistive Load see, Figure 3)
Qg Total Gate Charge VDD = 480V, ID = 0.8 A, 4.9 6.9 nC
Qgs Gate-Source Charge VGS = 10V 1 nC
Qgd Gate-Drain Charge 2.7 nC

SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(off) Turn-off Delay Time VDD = 300V, ID = 0.4A 13 ns
tf Fall Time RG = 4.7Ω VGS = 10 V 28 ns
(Resistive Load see, Figure 3)
tr(Voff) Off-voltage Rise Time VDD =480V, ID = 0.8A, 28 ns
tf Fall Time RG = 4.7Ω, VGS = 10V 12.5 ns
tc Cross-over Time (Inductive Load see, Figure 5) 48 ns

SOURCE DRAIN DIODE


Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD Source-drain Current 0.25 A
ISDM (2) Source-drain Current (pulsed) 1 A
VSD (1) Forward On Voltage ISD = 0.25A, VGS = 0 1.6 V
trr Reverse Recovery Time ISD = 0.8 A, di/dt = 100A/µs 140 ns
Qrr Reverse Recovery Charge VDD = 20V, Tj = 150°C 224 nC
IRRM Reverse Recovery Current (see test circuit, Figure 5) 3.2 A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80%
VDSS.

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STS1NK60Z

Safe Operating Area Thermal Impedance

Output Characteristics Transfer Characteristics

Transconductance Static Drain-source On Resistance

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STS1NK60Z

Gate Charge vs Gate-source Voltage Capacitance Variations

Normalized Gate Threshold Voltage vs Temp. Normalized On Resistance vs Temperature

Source-drain Diode Forward Characteristics Normalized BVDSS vs Temperature

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STS1NK60Z

Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform

Fig. 3: Switching Times Test Circuit For Fig. 4: Gate Charge test Circuit
Resistive Load

Fig. 5: Test Circuit For Inductive Load Switching


And Diode Recovery Times

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STS1NK60Z

SO-8 MECHANICAL DATA

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 1.75 0.068
a1 0.1 0.25 0.003 0.009
a2 1.65 0.064
a3 0.65 0.85 0.025 0.033
b 0.35 0.48 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.25 0.5 0.010 0.019
c1 45 (typ.)
D 4.8 5.0 0.188 0.196
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 3.81 0.150
F 3.8 4.0 0.14 0.157
L 0.4 1.27 0.015 0.050
M 0.6 0.023
S 8 (max.)

0016023

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STS1NK60Z

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
© The ST logo is a registered trademark of STMicroelectronics

© 2003 STMicroelectronics - Printed in Italy - All Rights Reserved


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STS1NK60Z

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