Lecture # 5A - Function of Combinational Logic Final Version
Lecture # 5A - Function of Combinational Logic Final Version
INFORMATION TECHNOLOGY
The first three operations produce a sum of one digit, but when both augend and addend
bits are equal to 1, the binary sum consists of two digits.
The higher significant bit of this result is called a carry .
When the augend and addend numbers contain more significant digits, the carry
obtained from the addition of two bits is added to the next higher order pair of significant
bits.
A combinational circuit that performs the addition of two bits is called a half adder .
One that performs the addition of three bits (two significant bits and a previous carry) is a
full adder. The names of the circuits stem from the fact that two half adders can be
employed to implement a full adder.
Half Adder
The half-adder accept two binary digits on its inputs and produces two binary
digits on its outputs.
The input variables designate the augend and addend bits; the output variables
produce the sum and carry
Half Adder
Half Adder Logic
From the operation of the half-adder, expression can be derived for the sum and
output carry as function of inputs.
The output carry (Cout) is 1 only when A and B is 1. the Cout can be expressed as
the AND of the input variable
Cout = AB
The sum output is a 1 only input variable, are not equal. The sum can be
expressed as the exclusive-OR of the input variables.
Σ=A EXCLISIVE-OR B
Half Adder
Half Adder Logic
Full Adder
A full adder is a combinational circuit that forms the arithmetic sum of three
bits.
It consists of three inputs and two outputs. Two of the input variables, denoted
by x and y , represent the two significant bits to be added. The third input, z ,
represents the carry from the previous lower significant position.
The two outputs are designated by the symbols S for sum and C for carry. The
binary variable S gives the value of the least significant bit of the sum.
The binary variable C gives the output carry formed by adding the input carry
and the bits of the words.
Full Adder
The output variables are determined from the arithmetic sum of the input bits.
When all input bits are 0, the output is 0. The S output is equal to 1 .
when only one input is equal to 1 or when all three inputs are equal to 1. The C
output has a carry of 1 if two or three inputs are equal to 1.
Full Adder
Full Adder Logic
The Full adder must add the two inputs and input carry. From the half-adder you
know that the sum of the input bits A and B is the exclusive-OR of those two
variables, A (exclusive-or) B.
For the input Cin to be added to its input bits it must be exclusive-ored with A
(exclusive-or) B.
A single full-adder is capable of adding two 1-bit numbers and an input carry.
To add binary numbers with more than one bit, you must use additional full-
adders.
When one binary numbers is added to another, each column generate a sum bit
and 1 or 0 carry bit to the next column to the left.
1-- carry
11
+ 01
100
sum bit
Parallel Binary Adder
2-bit parallel adder
To add two binary numbers, a full-adder is required for each bit in the numbers.
The carry output of each adder is connected to the carry input of the next
higher-order adder.
Parallel Binary Adder
3-bit parallel adder
Determine the sum generated by the parallel added. The intermediate carries
when the binary numbers 101 and 011 are being added.
Parallel Binary Adder
4-bit parallel adder
A group of four bit is called a nibble a basic 4-bit parallel adder is implemented
with four full-adder
The LSBs (A1 and B1) in each number being added go into the right-most full-
adder. The MSBs are (A4, B4).
The carry output of each adder is connected to the carry input of the next
higher-order adder.
A4A3A2A1 = 1100
B4B3B2B1 = 1100
____+__________
11000
Parallel Binary Adder
8-bit parallel adder Truth table
4-bit parallel bit adder can be expanded to handle the addition of two 8 bit
number by using 4 bit adders.
END
Q/A