1 2 3 4 5 6 7 8

A A

Digtal Signal Process Board MASTER) Channel 1#-4#

CPU CARD
auto gain control
DATA
interface logic first arrival pick up
Hign Pass
selectable bandpass low pass filter
DSP systerm logic
SYSTEM MEMORY wave stack delat-T wave signal

CPU 16bit fire signal

CMD+
T1 MODE5 BUFFER acquire control Low Pass CBL wave signal
UDI/
N0UDI/

control logic
data buffer MODE7 BUFFER CONTROL Gain Control MULTIPLEXER
CMD-

T2
M2+ BZO/
N0BZO/

data buffer BUO/

N0BUO/ A/D CHANNER CONTROL
M2-
1M serial signal
EDIB interface logic
T3
M5+ BZO5/
N0BZO5/
1M serial signal
data buffer BUO5/
N0BUO5/
FIRE SIGNAL
N0FIRE SIGNAL 16BITS A/D CHANNEL
B
M5- system logic B

T4
M7+ BZO7/
N0BZO7/
100K serial logic
data buffer BUO7/
N0BUO7/

M7-P0M70
system reset Band Pass Filter
drive circuit
auto gain control
other three DSP functional module
Staus Control Register

receive transducer array

delat-T wave signal

CBL wave signal
delat-T wave signal
delat-T wave signal
Other three channels

MDAT
C 100K serial signal MCLK C

MR/W
FIRE
FIRE CONTROL

transmit transducer

FIRE POWER SUPPLY FIRE CONTROL

2009-5-8

2009-5-12
D
EDAT61XA SCHEMATIC D

2009-5-12 EDAT SYSTEM

2009-5-12

9241 D 9241-E-3001 A

9241-E-3001 A.schdoc 1 1
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