74 HC 4067
74 HC 4067
74 HC 4067
DATA SHEET
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
Philips Semiconductors
Product specication
74HC/HCT4067
The 74HC/HCT4067 are 16-channel analog multiplexers/demultiplexers with four address inputs (S0 to S3) , an active LOW enable input (E), sixteen independent inputs/outputs (Y0 to Y15) and a common input/output (Z). The 4067 contains sixteen bidirectional analog switches, each with one side connected to an independent input/output (Y0 to Y15) and the other side connected to a common input/output (Z). With E LOW, one of the sixteen switches is selected (low impedance ON-state) by S0 to S3. All unselected switches are in the high impedance OFF-state. With E HIGH, all switches are in the high impedance OFF-state, independent of S0 to S3. The analog inputs/outputs (Y0 to Y15, and Z) can swing between VCC as a positive limit and GND as a negative limit. VCC to GND may not exceed 10 V.
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf = 6 ns TYPICAL SYMBOL tPZL/ tPZH turn-on time E to Vos Sn to Vos tPLZ/ tPHZ turn-off time E to Vos Sn to Vos CI CPD CS input capacitance power dissipation capacitance per switch max. switch capacitance independent (Y) common (Z) Notes 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD VCC2 fi + { (CL + CS) VCC2 fo} where: fi = input frequency in MHz fo = output frequency in MHz {(CL + CS) VCC2 fo} = sum of outputs CL = output load capacitance in pF CS = max. switch capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC 1.5 V 5 45 5 45 pF pF notes 1 and 2 27 29 3.5 29 26 30 3.5 29 ns ns pF pF PARAMETER CONDITIONS HC CL = 15 pF; RL = 1 k; VCC = 5 V 26 29 32 33 ns ns HCT UNIT
September 1993
Philips Semiconductors
Product specication
74HC/HCT4067
independent inputs/outputs address inputs ground (0 V) enable input (active LOW) positive supply voltage
September 1993
Philips Semiconductors
Product specication
74HC/HCT4067
FUNCTION TABLE INPUTS E L L L L L L L L L L L L L L L L H Notes 1. H = HIGH voltage level L = LOW voltage level X = dont care S3 L L L L L L L L H H H H H H H H X S2 L L L L H H H H L L L L H H H H X S1 L L H H L L H H L L H H L L H H X S0 L H L H L H L H L H L H L H L H X CHANNEL ON Y0 Z Y1 Z Y2 Z Y3 Z Y4 Z Y5 Z Y6 Z Y7 Z Y8 Z Y9 Z Y10 Z Y11 Z Y12 Z Y13 Z Y14 Z Y15 Z none
September 1993
Philips Semiconductors
Product specication
74HC/HCT4067
September 1993
Philips Semiconductors
Product specication
74HC/HCT4067
for VI < 0.5 or VI > VCC + 0.5 V for VS < 0.5 or VS > VCC + 0.5 V for 0.5 V < VS < VCC + 0.5 V
for temperature range: 40 to +125 C 74HC/HCT above +70 C: derate linearly with 12 mW/K above +70 C: derate linearly with 8 mW/K
1. To avoid drawing VCC current out of terminal Z, when switch current flows in terminals Yn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VCC current will flow out of terminals Yn. In this case there is no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed VCC or GND. RECOMMENDED OPERATING CONDITIONS 74HC SYMBOL PARAMETER min. typ. max. min. typ. max. VCC VI VS Tamb Tamb tr, tf DC supply voltage DC input voltage range DC switch voltage range 2.0 GND GND 5.0 10.0 VCC VCC +85 4.5 GND GND 40 5.0 5.5 VCC VCC +85 V V V C see DC and AC CHARACTERISTICS VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VCC = 10.0 V 74HCT UNIT CONDITIONS
operating ambient temperature range 40 operating ambient temperature range 40 input rise and fall times 6.0
+125 C
6.0
500
ns
September 1993
Philips Semiconductors
Product specication
74HC/HCT4067
TEST CONDITIONS UNIT V CC (V) 2.0 4.5 6.0 9.0 2.0 4.5 6.0 9.0 2.0 4.5 6.0 9.0 IS (A) 100 1000 1000 1000 100 1000 1000 1000
Vis
VI
VCC VIH to or GND VIL GND VIH or or VCC VIL VCC VIH to or GND VIL
RON
ON-resistance (rail)
RON
Notes 1. At supply voltages (VCC GND) approaching 2 V, the analog switch ON-resistance becomes extremely non-linear. Therefore it is recommended that these devices be used to transmit digital signals only, when using these supply voltages. 2. For test circuit measuring RON see Fig.7.
September 1993
Philips Semiconductors
Product specication
74HC/HCT4067
Fig.10 Typical ON-resistance (RON) as a function of input voltage (Vis) for Vis = 0 to VCC GND.
DC CHARACTERISTICS FOR 74HC Voltages are referenced to GND (ground = 0 V) Tamb (C) 74HC SYMBOL PARAMETER min. VIH
HIGH level input voltage
+25 typ. 1.2 2.4 3.2 4.7 0.8 2.1 2.8 4.3 0.50 1.35 1.80 2.70 0.1 0.2 0.1 max.
40 to +85 min. 1.5 3.15 4.2 6.3 0.50 1.35 1.80 2.70 1.0 2.0 1.0 max.
40 to +125 min. 1.5 3.15 4.2 6.3 0.50 1.35 1.80 2.70 1.0 2.0 1.0 max.
2.0 4.5 6.0 9.0 2.0 4.5 6.0 9.0 6.0 10.0 10.0
VCC or GND
VIL
II
input leakage current analog switch OFF-state current per channel analog switch OFF-state current all channels analog switch ON-state current quiescent supply current
IS
VS = VCC GND (see Fig.8) VS = VCC GND (see Fig.9) VS = VCC GND (see Fig.9)
IS
0.8
8.0
8.0
10.0
IS
0.8
8.0
8.0
10.0
ICC
8.0 16.0
80.0 160
160 320
6.0 10.0
September 1993
Philips Semiconductors
Product specication
74HC/HCT4067
TEST CONDITIONS VCC (V) 2.0 4.5 6.0 9.0 2.0 4.5 6.0 9.0 2.0 4.5 6.0 9.0 2.0 4.5 6.0 9.0 2.0 4.5 6.0 9.0 2.0 4.5 6.0 9.0 2.0 4.5 6.0 9.0 2.0 4.5 6.0 9.0 2.0 4.5 6.0 9.0 2.0 4.5 6.0 9.0 OTHER
min. typ. max. min. tPHL/ tPLH propagation delay Vis to Vos; Yn to Z propagation delay Vis to Vos; Z to Yn turn-off time E to Yn 25 9 7 5 18 6 5 4 74 27 22 20 83 30 24 21 85 31 25 24 94 34 27 25 80 29 23 17 88 32 26 18 85 31 25 18 94 34 27 19 75 15 13 9 60 12 10 8 250 50 43 38 250 50 43 38 275 55 47 42 290 58 47 45 275 55 47 42 300 60 51 45 275 55 47 42 300 60 51 45
tPHL/ tPLH
ns
RL = ; CL = 50 pF (see Fig.16)
tPHZ/ tPLZ
ns
tPHZ/ tPLZ
turn-off time Sn to Yn
ns
tPHZ/ tPLZ
turn-off time E to Z
ns
tPHZ/ tPLZ
turn-off time Sn to Z
ns
tPZH/ tPZL
turn-on time E to Yn
ns
RL = 1 k; CL = 50 pF (see Fig.17)
tPZH/ tPZL
turn-on time Sn to Yn
ns
tPZH/ tPZL
turn-on time E to Z
ns
tPZH/ tPZL
turn-on time Sn to Z
ns
September 1993
Philips Semiconductors
Product specication
74HC/HCT4067
1. Due to higher Z terminal capacitance (16 switches versus 1) the delay figures to the Z terminal are higher than those to the Y terminal. DC CHARACTERISTICS FOR 74HCT Voltages are referenced to GND (ground = 0 V) Tamb (C) 74HCY SYMBOL PARAMETER +25 40 to +85 40 to +125 UNIT V CC VI (V) V 4.5 to 5.5 4.5 to 5.5 5.5
VCC or GND
TEST CONDITIONS
OTHER
2.0
1.6
2.0
2.0
VIL
1.2
0.8
0.8
0.8
II
0.1
1.0
1.0
IS
analog switch OFF-state current per channel analog switch OFF-state current all channels analog switch ON-state current quiescent supply current additional quiescent supply current per input pin for unit load coefcient is 1 (note 1)
0.1
1.0
1.0
5.5
VS = VCC GND (see Fig.8) VS = VCC GND (see Fig.9) VS = VCC GND (see Fig.9) Vis = GND or VCC; Vos = VCC or GND other inputs at VCC or GND
IS
0.8
8.0
8.0
5.5
IS
0.8
8.0
8.0
5.5
ICC
8.0
80.0
160
ICC
100 360
450
490
Note 1. The value of additional quiescent supply current (ICC) for a unit load of 1 is given here. To determine ICC per input, multiply this value by the unit load coefficient shown in the table below. INPUT E Sn UNIT LOAD COEFFICIENT 0.6 0.5
September 1993
10
Philips Semiconductors
Product specication
74HC/HCT4067
min. typ. max. min. tPHL/ tPLH propagation delay Vis to Vos; Yn to Z propagation delay Vis to Vos; Z to Yn turn-off time E to Yn turn-off time Sn to Yn turn-off time E to Z turn-off time Sn to Z turn-on time E to Yn turn-on time Sn to Yn turn-on time E to Z turn-on time Sn to Z 9 15
tPHL/ tPLH
12
15
18
ns
4.5
tPHZ/ tPLZ tPHZ/ tPLZ tPHZ/ tPLZ tPHZ/ tPLZ tPZH/ tPZL tPZH/ tPZL tPZH/ tPZL tPZH/ tPZL Note
26 31 30 35 32 35 38 38
55 55 60 60 60 60 65 65
69 69 75 75 75 75 81 81
83 83 90 90 90 90 98 98
ns ns ns ns ns ns ns ns
RL = 1 k; CL = 50 pF (see Fig.17)
1. Due to higher Z terminal capacitance (16 switches versus 1) the delay figures to the Z terminal are higher than those to the Y terminal.
September 1993
11
Philips Semiconductors
Product specication
74HC/HCT4067
CONDITIONS RL = 10 k; CL = 50 pF (see Fig.14) RL = 10 k; CL = 50 pF (see Fig.14) RL = 600 ; CL = 50 pF f = 1 MHz (see Figs 11 and 15) RL = 50 ; CL = 10 pF (see Figs 12 and 13)
Notes 1. Vis is the input voltage at Yn or Z terminal, whichever is assigned as an input. 2. Vos is the output voltage at Yn or Z terminal, whichever is assigned as an output. 3. Adjust input voltage Vis is 0 dBm level (0 dBm = 1 mW into 600 ). 4. Adjust input voltage Vis is 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 ).
September 1993
12
Philips Semiconductors
Product specication
74HC/HCT4067
Adjust input voltage to obtain 0 dBm at Vos when fin = 1 MHz. After set-up frequency of fin is increased to obtain a reading of 3 dB at Vos.
September 1993
13
Philips Semiconductors
Product specication
74HC/HCT4067
AC WAVEFORMS
Fig.16 Waveforms showing the input (Vis) to output (Vos) propagation delays.
September 1993
14
Philips Semiconductors
Product specication
74HC/HCT4067
CL
load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values). termination resistance should be equal to the output impedance ZO of the pulse generator. tf = 6 ns, when measuring fmax, there is no constraint on tr, tf with 50% duty factor. Fig.18 Test circuit for measuring AC performance.
RT
tr
1.3 V < 2 ns