Universal Gates: Digital Electronics Bca Sem Ii Jims
Universal Gates: Digital Electronics Bca Sem Ii Jims
Universal Gates: Digital Electronics Bca Sem Ii Jims
Digital Electronics
BCA Sem II
JIMS
1
• NAND Gate as an Inverter
The Universal Property of
NAND Gates
• NAND Gate as an Inverter
• Since A.A = A therefore (A.A)' = A'
• Two NAND Gates as an AND Gate
The Universal Property of
NAND Gates
• Two NAND Gates as an AND Gate
• To create an AND gate we apply the Involution
• law,
• (A')' = A
• Three NAND Gates as an OR Gate
The Universal Property of
NAND Gates
• Three NAND Gates as an OR Gate
• To make an OR gate we need to apply de
• Morgan's theorem:
• A+B = (A' . B')'
NAND / NOR GATE
IMPLEMENTATION
:
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Implementation using NAND
gates
Possible to implement any Boolean expression using
NAND gates.
Procedure:
(i) Obtain sum-of-products Boolean expression:
e.g. F3 = xy'+x'z
(ii) Use DeMorgan theorem to obtain expression
using 2-level NAND gates
e.g. F3 = xy'+x'z
= (xy'+x'z)' ' involution
= ((xy')' . (x'z)')' DeMorgan
xy' + x'z
x
xy'
y'
y
xy' + x'z
x' (x'z
z )'
x
(xy')'
y'
xy' + x'z
x' (x'z)'
z
Implementation using NAND gates
x
(xy')'
y'
F3
x'
(x'z)'
z
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• Y= B’C’+A’C’+A’B’ USING BASIC GATES
• Y= [A+B][A’+C][B+D] USING BASIC
GATES
• Y= [AB]’ + A + [B+C]’ USING NAND
GATES
NAND Implementation
Example:
Design a NAND Logic Circuit that is equivalent to the circuit
shown below.
BC A C
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NAND Implementation
Solution – Step 3
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NAND Implementation
Solution – Step 4
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NAND Implementation
Solution – Step 5
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Proof of Equivalence
C BC
BCAC
Z BCAC
AC
Z BCA C
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REALISE XNOR equation = A’B’ + AB USING
NAND
(ab’)’
e’
((CD)’e’)’ [((CD)’e’)’. (ab’)’]’
The Universal Property of NOR
Gates
• NOR Gate as an Inverter
The Universal Property of NOR
Gates
• Two NOR Gates as an OR Gate
The Universal Property of NOR
Gates
• Three NOR Gates as an AND Gate
Implementation using NOR gates
Possible to implement any Boolean expression using
NOR gates.
Procedure:
(i) Obtain product-of-sums Boolean expression:
e.g. F6 = (x+y').(x'+z)
(ii) Use DeMorgan theorem to obtain expression
using 2-level NOR gates.
e.g. F6 = (x+y').(x'+z)
= ((x+y').(x'+z))' ' involution
= ((x+y')'+(x'+z)')' DeMorgan
Implementation using NOR gates
x (x+y')'
y'
F6
x'
z (x'+z)'
F6 = ((x+y')'+(x'+z)')'
= (x+y').(x'+z)
• G = (A+B).(C+D).E
Implementation of POS Expressions
• G = (A+B).(C+D).E
A
B
C
G
D
E'
IMPLEMENT THE FOLLOWING USING NAND
GATE ONLY:
A+BC+CD’
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IMPLEMENT THE FOLLOWING USING NAND GATE ONLY:
A+BCD’
USING DOUBLE INVERSION:
A+BCD’
= (A) (BCD’)
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