Scribd
Upload
8 views23 pages

Implementation of Boolean Expression With Logic Gates

DE

Uploaded by

Ankur Saharia
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
Download as pptx, pdf, or txt
8 views23 pages

Implementation of Boolean Expression With Logic Gates

DE

Uploaded by

Ankur Saharia
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
Download as pptx, pdf, or txt
Download as pptx, pdf, or txt
You are on page 1/ 23

B.

TECH FIRST YEAR


ACADEMIC YEAR: 2022-2023

COURSE NAME: BASIC ELECTRONICS


COURSE CODE : EC 1001
LECTURE SERIES NO : 01(ONE)
CREDITS : 3
MODE OF DELIVERY : ONLINE (POWER POINT PRESENTATION)
FACULTY :
EMAIL-ID :
PROPOSED DATE OF DELIVERY:
“USE OF LOGIC
GATES TO
SESSION OUTCOME IMPLEMENT ANY
LOGIC IN DIGITAL ”
ASSIGNMENT
QUIZ ASSESSMENT
MID TERM EXAMINATION –II
END TERM EXAMINATION
CRITERIA’S
PROGRAM
OUTCOMES
MAPPING WITH
CO4

[PO1]

DEMONSTRATE DIFFERENT NUMBER SYSTEMS,


BOOLEAN EXPRESSIONS AND DIFFERENT
ELEMENTS OF COMMUNICATION SYSTEMS AND
TO PROMOTE DIFFERENT SKILLS TOWARDS
ELECTRONICS INDUSTRIES.
PROBLEM

 Draw the logic circuit for the Boolean expression. G = WXY + YZ

5
Obtain the AND-OR implementation for F.

F = X’Y’Z’ + XYZ’ Use not gates to design X’,


Y’ and Z’

6
COMBINATIONAL LOGIC CIRCUIT FROM LOGIC
FUNCTION (CONT.)
C

A F

F=A’ + B•C’ + A’•B’ B


F= A’ (1+ B’) + B•C’

G=A’+BC’ where F=G

C
B
A G
NAND CIRCUITS

 To easily derive a NAND implementation of a Boolean


function:
 Find a simplified SOP
 Design SOP with basic gates
 Change AND-OR circuit to a NAND circuit using bubble
 Use the alternative symbols below
AND-OR (SOP) EMULATION
USING NANDS

Two-level implementations

a) Original SOP
b) Implementation with NANDs
AND-OR (SOP) EMULATION
USING NANDS (CONT.)

Verify:
(a) G = WXY + YZ
(b) G = ( (WXY)’ • (YZ)’ )’
= (WXY)’’ + (YZ)’’ = WXY + YZ
MULTILEVEL NAND CIRCUITS
Starting from a multilevel circuit:
1. Convert all AND gates to NAND gates with AND-NOT
graphic symbols.
2. Convert all OR gates to NAND gates with NOT-OR graphic
symbols.
3. Check all the bubbles in the diagram. For every bubble that
is not counteracted by another bubble along the same line,
insert a NOT gate or complement the input literal from its
original appearance.
SOP WITH NAND

(a) Original SOP


(b) Double inversion and grouping AND-NOT
(c) Replacement with NANDs
NOT-OR
TWO-LEVEL NAND GATE IMPLEMENTATION -
EXAMPLE

F (X,Y,Z) = m(0,6)
1. Express F in SOP form:
F = X’Y’Z’ + XYZ’
2. Obtain the AND-OR implementation for F.
3. Add bubbles and inverters to transform AND-OR to
NAND-NAND gates.
EXAMPLE (CONT.)

Two-level implementation with NANDs


F = X’Y’Z’ + XYZ’
EXAMPLE
Use NAND gates
and NOT gates to implement
Z=E’F(AB+C’+D’)+GH

AB
AB+C’+D’
E’F(AB+C’+D’)
E’F(AB+C’+D’)+GH
ANOTHER EXAMPLE!
NOR GATE

 Also a “universal” gate because ANY digital circuit can be implemented with NOR
gates alone.
 This can be similarly proven as with the NAND gate.
NOR CIRCUITS

 To easily derive a NOR implementation of a Boolean


function:
 Find a simplified POS
 Design POS using basic gates
 Change OR-AND circuit to a NOR circuit
 Use the alternative symbols below
EXAMPLE (CONT.)

Two-level implementation with NORs


F = (F’)' = (X'+Y)(X+Y')Z'
XOR AND XNOR
X Y F = XY
0 0 0
0 1 1
X F 1 0 1
Y 1 1 0

X Y F = XY
0 0 1
0 1 0
X F
1 0 0
Y 1 1 1
EXCLUSIVE-OR (XOR) FUNCTION
 XOR (also ) : the “not-equal” function
 XOR(X,Y) = X  Y = X’Y + XY’
 Identities:
 X0=X
 X  1 = X’
 XX=0
 X  X’ = 1
 Properties:
 XY=YX
 (X  Y)  W = X  ( Y  W)
XOR FUNCTION IMPLEMENTATION

 XOR(a,b) = ab’ + a’b


 Straightforward: 5 gates
 2 inverters, two 2-input ANDs, one 2-input OR
 2 inverters & 3 2-input NANDs

 Nonstraightforward:
 4 NAND gates
XOR CIRCUIT WITH 4 NANDS

You might also like