LIC Unit IV
LIC Unit IV
LIC Unit IV
4 Special ICs
Vc = Vcc (1 -
At t=T, Vc = (2/3)Vcc
Therefore, (2/3)Vcc = Vcc (1 -
Or, T=RC ln (1/3)
Or, T=1.1RC (seconds)
IC 555 TIMER: Mono-stable Mode Operation
Example: Graph of RC combinations for
different time delays
R=100K, time delay T=100ms.
Calculate the value of Capacitor C.
Solution:
IC 555 TIMER: Mono-stable Mode Operation
Example:
Design a monostable multivibrator using
555 Timer for a pulse period of 1ms.
Solution:
Time period of pulse T=1.1RC
Let C=0.01µF
T=1 x 10-3
R=T/1.1 x C
Therefore, R=8.2kΩ
IC 555 TIMER: Mono-stable Mode :- Applications
The important applications of monostable multivibrator are (i) Frequency divider, (ii) Pulse
Width Modulation (PWM) and (iii) Ramp generation.
Frequency Divider:
A continuously triggered mono-stable circuit when triggered by a square wave generator can be
used as a frequency divider, if timing interval T of monostable multivibrator is designed to be
longer than the period of the triggering square wave input signal.
Solution:
From circuit, RA = 6.8K, RB = 3.3K and C = 0.1µF,
calculate
tHIGH = 0.69(RA+RB)C =
tLOW = 0.69RBC =
T = 0.69 (RA+2RB)C =
Duty cycle,
D = tHIGH / (tLOW + tHIGH ) x 100 =
IC 555 TIMER: Astable Mode - Applications
The importance applications of the astable multivibrator are i) Frequency Shift Keying (FSK)
generator, ii) Pulse Position Modulator (PPM) and iii) Schmitt Trigger.
FSK Generator:
In digital data communication, binary code is transmitted by
shifting a carrier frequency between two preset frequencies.
This type of transmission is called frequency shift keying
(FSK) technique.
When input is HIGH, transistor Q1 is OFF and timer
works as normal astable mode operation. The frequency
of the output waveform written as
f1 =
When input is LOW, Q1 goes ON and connects the
resistance RC across RA. Now the output frequency is given
by f2 =
Resistance RC can be adjusted to get the output frequency
1270Hz.
IC 555 TIMER: Astable Mode - Applications
Pulse Position Modulator (PPM):
The PPM can be constructed by applying modulating signal to pin-5 of timer connected for astable
operation. The output position varies with the modulating signal, since the threshold voltage and hence
the time delay is varied.
IC 555 TIMER: Astable Mode - Applications
Schmitt Trigger:
In Schmitt trigger circuit using 555 timer, two internal comparators are tied together and externally biased at
Vcc/2 through R1 and R2. Since the upper comparator will trip at (2/3)Vcc and lower comparator at (1/3)Vcc, the
bias provided by R1 and R2 is centered within these two thresholds. Thus a sine wave of sufficient amplitude
(>Vcc/6 = 2/3Vcc-Vcc/2) to exceed the reference levels causes the internal flip-flop to alternatively set and reset,
providing a square wave output.
IC 566 Voltage Controlled Oscillator (VCO)
Voltage controlled oscillator is a type of oscillator where the frequency of the output oscillations can be varied by
varying the amplitude of an input voltage signal. Voltage controlled oscillators are commonly used in Frequency
Modulator (FM), Pulse Modulator (PM) and Phase Locked Loop (PLL).
Features:
The maximum operating voltage is 10V to 24V
High temperature stability
Operating temperature is 0˚C to 70˚C
The frequency can be controlled by means of current, voltage, resistor or capacitor
Power dissipation is 300mV
Excellent power supply rejection
Applications:
Function / Signal generator (square or triangular)
FM modulation
Frequency shift keying i.e., FSK demodulator
Converting low frequency signals such as EEG
(ElectroEncephaloGram) and EKG
(ElectroCardioGram) into audio frequency range
signals.
IC 566 Voltage Controlled Oscillator (VCO)
The timing capacitor CT is linearly charged or discharged by a constant current source/sink. The amount of
current can be controlled by changing the control voltage VC applied at the modulating input (pin 5) or by changing
the timing resistor RT external to the IC chip. The voltage at pin 6 is held at the same voltage as pin 5. Thus, if the
modulating voltage at pin 5 is increased, the voltage at pin 6 also increases, resulting in less voltage across RT and
thereby decreasing the charging current.
The voltage across the capacitor CT is applied to the inverting input terminal of Schmitt trigger via buffer amplifier.
The output voltage swing of the Schmitt trigger is designed to V CC and 0.5VCC.
If Ra = Rb in the positive feedback
loop, the voltage at the non-inverting
input terminal of Schmitt trigger
swings from 0.5VCC to 0.25VCC.
When the voltage on the capacitor CT
exceeds 0.5VCC during charging, the
output of the Schmitt trigger goes
LOW (0.5VCC). The capacitor now
discharges and when it is at 0.25VCC,
the output of Schmitt trigger goes
HIGH (VCC).
IC 566 Voltage Controlled Oscillator (VCO)
Since the source and sink currents are equal, capacitor charges and
discharges for the same amount of time. This gives a triangular voltage
waveform across CT which is also available at pin 4. The square wave
output of the Schmitt trigger is inverted by buffer amplifier and is available
at pin 3.
The output frequency of the VCO can be changed either by (i) RT, (ii) CT or
(iii) the voltage VC at the modulating input terminal pin 5. The voltage VC
can be varied by connecting a R1R2 circuit as shown in the figure below.
Refer book
Complete derivation
IC 565 Phase Locked Loop (PLL) Applications
Important applications are i) Frequency Multiplier, ii) Frequency Synthesizer,
iii) FM Demodulator and iv) FSK Demodulator.
Frequency Multiplier:
The block diagram for a frequency multiplier using PLL 565. Here, a divide by N network is
inserted between the VCO output (pin 4) and the phase comparator input (pin 5).
Since the output of the divider is locked to the input frequency fS, the VCO is actually running at
a multiple of the input frequency. Therefore, in the locked state, the VCO output frequency fO is
given by, fO = NfS
By selecting proper divider by N
network, we can obtain desired
multiplication.
For example, to obtain output
frequency fO = 6fS, a divide by N
should be equal to 6.
IC 565 Phase Locked Loop (PLL) Applications
Frequency Synthesizer / Translation:
The PLL can be used as the basis for frequency synthesizer that can produce a precise series of frequencies that are
derived from a stable crystal controlled oscillator.
It is similar to frequency multiplier circuit except that divided by M network is added at the input of phase lock
loop. The frequency of the crystal-controlled oscillator is divided by an integer factor M by divider network to
produce a frequency fosc /M, where fosc is the frequency of the crystal controlled oscillator.
Features
• Function: analog multiplier
• Number of stages: four quadrant
• Voltage supply: ±8 V to ±18 V
• Temperature operating range:
• AD633J: 0°C to +70°C
• AD633A: -40°C to +85°C
• Package / case: 8-PDIP, 8-SOIC
Applications
• Voltage controlled amplifiers / attenuators
• Multiplication, division, squaring
• Modulation / demodulation, phase detection
AD633 Analog Multiplier
The AD633 is a low cost multiplier comprising a translinear core, a buried Zener reference, and a unity-gain
connected output amplifier with an accessible summing node. The differential X and Y inputs are converted to
differential currents by voltage-to-current converters. The product of these currents is generated by the multiplying
core. A buried Zener reference provides an overall scale factor of 10 V. The sum of (X × Y)/10 + Z is then applied
to the output amplifier. The amplifier summing Node Z allows the user to add two or more multiplier outputs,
convert the output voltage to a current, and configure various analog computational functions.
The functional block diagram shows the overall transfer function is
AD633 Analog Multiplier
Application : MULTIPLIER Application : SQUARING
The X and Y inputs normally have their negative nodes The squaring of an input signal, E, is achieved simply
grounded, but they are fully differential, and in many by connecting the X and Y inputs in parallel to
applications, the grounded inputs may be reversed (to produce an output of E2/10 V. The input can have
facilitate interfacing with signals of a particular polarity either polarity, but the output is positive. However, the
while achieving some desired output polarity), or both output polarity can be reversed by interchanging the X
may be driven. or Y inputs. The Z input can be used to add a further
signal to the output.
AD633 Analog Multiplier
Application : FREQUENCY DOUBLING
When the input is a sine wave E sin ωt, this squarer behaves as a frequency doubler, because
Equation 2 shows a dc term at the output that varies strongly with the amplitude of the input, E. This can be avoided using the
connections shown in Figure 14, where an RC network is used to generate two signals whose product has no dc term. It uses the
identity
At ωo = 1/CR, the X input leads the input signal by 45° (and is attenuated
by √2), and the Y input lags the X input by 45° (and is also attenuated by
√2). Because the X and Y inputs are 90° out of phase, the response of the
circuit is (satisfying Equation 3)