Introduction to Intel 8085 Microprocessor

Basic functions of the microprocessor, System bus, Architecture, Pin Configuration and Programmer s model of Intel 8085 Microprocessor. Overview of the instruction groups of 8085 and the addressing modes. (No programming based on 8085).

DATA BUS CONTROL BUS I/O PORTS OUTPUT DEVICES ADDRESS BUS CENTRAL PROCESSING UNIT (CPU) CONTROL BUS MEMORY (RAM & ROM)

INPUT DEVICES

BLOCK DIAGRAM OF A SIMPLE MICROCOMPUTER

Processor System Architecture

The typical processor system consists of:


 

CPU (central processing unit)  ALU (arithmetic-logic unit)  Control Logic  Registers, etc Memory Input / Output interfaces

Interconnections between these units:

  

Address Bus Data Bus Control Bus

Bus and CPU

Bus: A shared group of wires used for communicating signals among devices
address bus: the device and the location within the device that is being accessed data bus: the data value being communicated control bus: describes the action on the address and data buses

CPU: Core of the processor, where instructions are executed

High-level language: a = b + c Assembly language: add r1 r2 r3 Machine language: 0001001010111010101

Memory and I/O

Memory: Where instructions (programs) and data are stored
Organized in arrays of locations (addresses), each storing one byte (8 bits) in general A read operation to a particular location always returns the last value stored in that location

I/O devices: Enable system to interact with the world

Device interface (controller or adapter) hardware connects actual device to bus The CPU views the I/O device registers just like memory that can be accessed over the bus. However, I/O registers are connected to external wires, device control logic, etc.

8085 Microprocessor Architecture

Now we will examine these components more closely by using the Intel 8085 microprocessor architecture as an example:

8085 Functional Block Diagram

The 8085 Bus Structure

The 8-bit 8085 CPU (or MPU Micro Processing Unit) communicates with the other units using a 16-bit address bus, an 8-bit data bus and a control bus.

The 8085 Bus Structure

Address Bus
 

Consists of 16 address lines: A0 A15 Operates in unidirectional mode: The address bits are always sent from the MPU to peripheral devices, not reverse. 16 address lines are capable of addressing a total of 216 = 65,536 (64k) memory locations. Address locations: 0000 (hex) FFFF (hex)

 

The 8085 Bus Structure

Data Bus
 

Consists of 8 data lines: D0 D7 Operates in bidirectional mode: The data bits are sent from the MPU to peripheral devices, as well as from the peripheral devices to the MPU. Data range: 00 (hex) FF (hex)

Control Bus


Consists of various lines carrying the control signals such as read / write enable, flag bits.

The 8085: CPU Internal Structure

The internal architecture of the 8085 CPU is capable of performing the following operations:
    

Store 8-bit data (Registers, Accumulator) Perform arithmetic and logic operations (ALU) Test for conditions (IF / THEN) Sequence the execution of instructions Store temporary data in RAM during execution

The 8085: CPU Internal Structure

Simplified block diagram

The 8085: Registers

Programmers model of Intel 8085 Microprocessor.

The 8085: CPU Internal Structure

Registers
  

Six general purpose 8-bit registers: B, C, D, E, H, L They can also be combined as register pairs to perform 16-bit operations: BC, DE, HL Registers are programmable (data load, move, etc.)

Accumulator
 

Single 8-bit register that is part of the ALU ! Used for arithmetic / logic operations the result is always stored in the accumulator.

Flag Register
S Z

AC

X P

Sign Zero Auxiliary Carry

Carry Parity

XUnspecified

The sign flag, S, indicates the sign of a value calculated by an arithmetic or logical instruction. The zero flag, Z, is set to 1 if an arithmetic or logical operation produces a result of 0; otherwise set to 0. The parity flag, P, is set to 1 if the result of an arithmetic or logical operation has an even number of 1s; otherwise it is set to 0. The carry flag, CY, is set when an arithmetic operation generates a carry out. The auxiliary carry flag, AC, very similar to CY, but it denotes a carry from the lower half of the result to the upper half.

The 8085: CPU Internal Structure

Flag Bits
  

Indicate the result of condition tests. Carry, Zero, Sign, Parity, etc. Conditional operations (IF / THEN) are executed based on the condition of these flag bits.

Program Counter (PC)



Contains the memory address (16 bits) of the instruction that will be executed in the next step.

Stack Pointer (SP)

 is an 16-bit register, which contains the address of the top of the stack.

The 8085 Microprocessor

The 8085 Microprocessor

address (8 bits)

The 8085 Microprocessor

address and data (8 bits)

dual - use pins !!

The 8085 and Its Busses

The 8085 is an 8-bit general purpose microprocessor that can address 64K Byte of memory. It has 40 pins and uses +5V for power. It can run at a maximum frequency of 3 MHz. The pins on the chip can be grouped into 6 groups: Address Bus. Data Bus. Control and Status Signals. Power supply and frequency. Externally Initiated Signals. Serial I/O ports.

The Control and Status Signals

There are 4 main control and status signals. These are: ALE: Address Latch Enable. This signal is a pulse that become 1 when the AD0 AD7 lines have an address on them. It becomes 0 after that. This signal can be used to enable a latch to save the address bits from the AD lines. RD: Read. Active low. WR: Write. Active low. IO/M: This signal specifies whether the operation is a memory operation (IO/M=0) or an I/O operation (IO/M=1). S1 and S0 : Status signals to specify the kind of operation being performed .Usually un-used in small systems.

Frequency Control Signals

There are 3 important pins in the frequency control group. X0 and X1 are the inputs from the crystal or clock generating circuit. The frequency is internally divided by 2. So, to run the microprocessor at 3 MHz, a clock running at 6 MHz should be connected to the X0 and X1 pins. CLK (OUT): An output clock pin to drive the clock of the rest of the system. We will discuss the rest of the control signals as we get to them.

The 8085 Microprocessor

16

Demultiplexing the address / data bus

Example: Memory Read Operation

Example: Instruction Fetch Operation

 

All instructions (program steps) are stored in memory. To run a program, the individual instructions must be read from the memory in sequence, and executed.
 Program counter puts the 16-bit memory address of the instruction on the address bus  Control unit sends the Memory Read Enable signal to access the memory  The 8-bit instruction stored in memory is placed on the data bus and transferred to the instruction decoder  Instruction is decoded and executed

Example: Instruction Fetch Operation

Example: Instruction Fetch Operation

Example: Instruction Fetch Operation

Instruction (opcode) reaches the instruction decoder now !

It takes four clock cycles to get one instruction into the CPU.

Execution of an Instruction
Now consider the execution of a simple instruction:
  

Instruction 3E (hex) means: Load a data byte into the accumulator The instruction is followed by the data byte 32 (hex) Two-byte instruction !

Execution of an Instruction

Execution of an Instruction

Put the first memory location on the address bus (2000 h)

Execution of an Instruction

Get the instruction (opcode) byte from memory

Execution of an Instruction

Interpret the instruction: Wait for the data byte !

Execution of an Instruction

Put the next memory location on the address bus (2001 h)

Execution of an Instruction

Get the data byte from the memory

Put into accumulator

Execution of an Instruction
How long does it take to execute this two-byte instruction (op-code) ?

It is quite possible to accurately predict the time that is required to run each instruction, and to run the entire program !

8085 Instruction Set

The 8085 instructions can be classified as follows:


Data transfer operations

Between registers Between memory location and a register Direct write to a register / memory Between I/O device and accumulator

  

Arithmetic operations (ADD, SUB, INR, DCR) Logic operations Branching operations (JMP, CALL, RET)

8085 Instruction Types

8085 Instruction Types

8085 Instruction Types

A VERY Simple Program

Add two hexadecimal numbers:
    

Load register A (accumulator) with 32 (hex) Load register B with 48 (hex) Add the two numbers and save the sum in A Display accumulator (A) contents at port (01) End

A VERY Simple Program

Instruction Set
y y y Data movement instructions Data operation instructions Program control instructions

8085 Addressing Modes

Immediate Addressing Mode
MVI A, A0 H LXI H, C200 H

Register Addressing Mode

MOV D, B ADD B PCHL

Direct Addressing Mode

LDA C200 H STA C200 H

Indirect Addressing Mode

MOV A, M

Implied ( Implicit ) Addressing Mode

RAL ( Rotate Accumulator Left ) CMC ( Complement Carry Flag )

Data movement instruction for the 8085 microprocessor

Instruction MOV r1, r2 MVI r1,90h LDA + LDAX B LHLD 2050H LXI B, 2050H STA + PUSH rp PUSH PSW POP rp POP PSW Operation r1 = r2 r1=90h A = M[+] B=20H,C=50H & [2050]=9F H then A= 9F H H=[2051] & L=[2050] B=20H & C=50H M[+] = A Stack = rp (rp { SP) Stack = A, flag register rp = Stack (rp { SP) A, flag register = Stack

Data movement instruction for the 8085 microprocessor

Instruction IN n OUT n HLT Operation A = input port n Output port n =A Stop execution & enters wait state

r, r1, r2 any 8-bits register + / M[+] memory location rp register pair BC, DE, HL, SP(Stack pointer) n 8-bit address or data value

Data operation instruction for the 8085 microprocessor

Instruction ADD/SUB r ADI/SUI 90h ADD M INR r IN M DCR r DCR M Operation A = A + r / A=A-r A=A+90/ A=A-90 A = A + M[HL] r=r+1 M[HL] = M[HL] + 1 r=r-1 M[HL] = M[HL] - 1 Flags All All All Not CY Not CY Not CY Not CY

CY carry flag

Data operation instruction for the 8085 microprocessor

Instruction ANA r ANI 90H ORA r ORI 90H XRA r XRI 90h CMA CMP r CPI 90H Operation A AND r A AND 90H A OR r A OR 90H A XOR r A XOR 90H A = Ad Compare A and r Compare A and 90H Flags All All All All All All None All All

Data operation instruction for the 8085 microprocessor

Instruction RLC RAL RRC RAR Operation Rotate Ac Left Rotate Ac Left through CY Flags All All

Rotate Ac Right All Rotate Ac Right through CY All

Program control instruction for the 8085 microprocessor

Instruction Operation JUMP + Jcond + CALL + Ccond + RET Rcond GOTO + If condition is true then GOTO + Call subroutine at + If condition is true then call subroutine at + Return from subroutine If condition is true then return from subroutine

cond conditional instructions NZ (Z = 0) Z (Z = 1) P (S = 0) N (S = 1) PO (P = 0) PE (P = 1) NC (CY = 0) C (CY = 1) Z zero flag, S sign flag, P parity flag, C carry flag

Note:
Each instruction is having an 8-bit instruction code.

Some instructions have fields to specify registers, while others are fixed.

Instruction formats for the Relatively Simple CPU

Two-byte Example: 25: MVI r, n Specifies r byte 1 byte 2 Instruction code value

instruction stored in memory: 25th byte 25: 00xxx110 (MVI r) 26th byte 26: xxxx xxxx (low-order memory)

byte 1 Three-byte byte 2 byte 3

Instruction code o -order 8 bits igh-order 8 bits

Example: 25: LXI rp, + Specifies rp

instruction stored in memory: 25th byte 25: 00rp 0001 (LXI rp) 26th byte 26: xxxx xxxx (low-order memory) 27th byte 27: yyyy yyyy (high-order memoy)

Example: 25: MOV r1, r2

instruction stored in memory: 25th byte 25: 0000 0001 (MOV) 26th byte 26: xxxx xxxx (specifies r1) 27th byte 27: yyyy yyyy (specifies r2)

 Example program using 8085 microprocessor coding The Algorithm of the program 1: total = 0, i = 0 n + (n - 1) + + 1 2: i=i+1 3: total = total + i 4: IF i { n THEN GOTO 2The 8085 coding of the program LDA n i=n MOV B, A XRA A Loop: ADD B DCR B JNZ Loop STA total sum = A A = 0 sum = sum + i i=i-1 IF i { 0 THEN GOTO Loop= sum total