MOS Field-Effect

Transistors (MOSFETs)
Chapter 5

Shao-Ku Kao

Department of Electrical Engineering

Chang Gung University
 Symbol

PMOS NMOS

on: VSG  Vt on: VGS  Vt

Triode: VSD  VSG  Vt Triode: VDS  VGS  Vt
Saturation: VSD  VSG  Vt Saturation: VDS  VGS  Vt
kaosk 2
C-Lab.
 ID vs VDS in the triode region

W  1 
I D   nCOX    VGS  Vt VDS  VDS 2  @in the triode region.
 L  2 
n : mobility of electrons (m/V.s)
COX : oxide capacitance per unit gate area(F/m 2 )
W : transistor width
L : transistor length

kaosk 3
C-Lab.
 Derivation of the iD-vDS Relationship

In the saturation region VGS-VDS=Vt, therefore, VDS=VGS-Vt

1 W 
I D   nCOX    VGS  Vt 
2

2 L
nCOX is known as the process transconductance parameter.
It is denoted as Kn’ = nCOX, and the dimension is A/V2.
W/L is called the aspect ratio.

kaosk 4
C-Lab.
 The p-channel MOSFET
 dopted with p+ at drain and source
 vGS, vDS, and Vt are all negative.
 iD enter source and leave drain
Cross-section of a CMOS integrated circuit [CMOS (complementary MOS)]

kaosk 5
C-Lab.
 Example -1

kaosk 6
C-Lab.
 Example -2

VGS-Vth=VDS
@ edge of SAT

kaosk 7
C-Lab.
 MOS in Amplifier design

kaosk 8
C-Lab.
 Small signal gain in Amplifier

Voltage gain:
Slop of the transfer curve
Make sure MOS in
saturation region

kaosk 9
C-Lab.
 Small signal of MOS

kaosk 10
C-Lab.
 gm

At small signal condition:

1 'W
i D  kn (VGS  Vt ) 2
2 L
iD W
gm  =kn ' (VGS  Vt )
vGS L

kaosk 11
C-Lab.
 Channel Length modulation
 The effect of channel modulation, the iD is modified as:
1 'W
I D  kn (GS  Vt ) 2 (1   vDS )
2 L
 when extrapolated they intercept the vDS -axis at point
vDS = -VA
VA is a process-technology parameter with dimension of V

At ID=0 , -1/  -VA

Output resistance
-1 ro : 1
 i D   kn' W 2
ro     
 2 L GS(v  Vt ) 
v
 DS v  
GS  constant

VA 1
ro  =
ID ID Ignore ro if =0
kaosk 12
C-Lab.
 Small signal equivalent circuit model - NMOS
 Channel length modulation ro:
VA 1
ro  = (  10K  ~ 1M  ) Ignore ro if =0
ID ID
where VA  1 / 

Hybrid- model

(a) neglecting the dependence of iD on vDS in saturation (the channel-length modulation

effect); and
(b) including the effect of channel-length modulation, modeled by output resistance ro =
|VA| /ID.
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C-Lab.
 Basic MOS amplifier

kaosk 14
C-Lab.
 Three Basic configurations
One of the terminal connect to GND,
this terminal is common to input an output
 resistor (RD, RL) is load

kaosk 15
C-Lab.
 Common source amplifier

Input resistance :

Rin  

Open-circuit voltage gain Avo :

Vgs=vi
Avo   g m RD

output resistance :

Ro  RD

kaosk 16
C-Lab.
 Common source amplifier

Input resistance :

Rin  

Output voltage at amplifier vo :

vo   g m vgs ( RD // rO )

Avo   gvoltage
Open-circuit m ( RD // rO ) Avo :
gain
Vgs=vi

Ro  ( RD // rO )
 output resistance :

kaosk 17
C-Lab.
 Common gate amplifier

Input resistance :

Rin  1/ g m

Open-circuit voltage gain Avo :

Avo  g m RD

 Output resistance :

Ro  RD
kaosk 18
C-Lab.
 Common drain amplifier (Source Follower)

With loading much small RL, vsig

reduce to1mV
How to fix this problem?
 add source follower
Large Rin, small Rout
vo reduce a little

kaosk 19
C-Lab.
 Common drain amplifier (Source Follower)

Input resistance :

Rin  
Open-circuit voltage gain Avo :

vo RL
Avo  
vi RL  1/ g m
 output resistance :

Ro  1/ g m

kaosk 20
C-Lab.
 Exercise – II

Calculate the voltage gain of the circuits. Assume =0

kaosk 21
C-Lab.
 Exercise – II - answer

Calculate the voltage gain of the circuits. Assume =0

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C-Lab.
 Exercise – III

Calculate the voltage gain of the circuits. Assume ≠0

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C-Lab.
 Exercise – III - answer

Calculate the voltage gain of the circuits. Assume ≠0

kaosk 24
C-Lab.